arm-syscon-icst.txt 2.5 KB

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  1. ARM System Controller ICST clocks
  2. The ICS525 and ICS307 oscillators are produced by Integrated Devices
  3. Technology (IDT). ARM integrated these oscillators deeply into their
  4. reference designs by adding special control registers that manage such
  5. oscillators to their system controllers.
  6. The various ARM system controllers contain logic to serialize and initialize
  7. an ICST clock request after a write to the 32 bit register at an offset
  8. into the system controller. Furthermore, to even be able to alter one of
  9. these frequencies, the system controller must first be unlocked by
  10. writing a special token to another offset in the system controller.
  11. Some ARM hardware contain special versions of the serial interface that only
  12. connects the low 8 bits of the VDW (missing one bit), hardwires RDW to
  13. different values and sometimes also hardwire the output divider. They
  14. therefore have special compatible strings as per this table (the OD value is
  15. the value on the pins, not the resulting output divider):
  16. Hardware variant: RDW OD VDW
  17. Integrator/AP 22 1 Bit 8 0, rest variable
  18. integratorap-cm
  19. Integrator/AP 46 3 Bit 8 0, rest variable
  20. integratorap-sys
  21. Integrator/AP 22 or 1 17 or (33 or 25 MHz)
  22. integratorap-pci 14 1 14
  23. Integrator/CP 22 variable Bit 8 0, rest variable
  24. integratorcp-cm-core
  25. Integrator/CP 22 variable Bit 8 0, rest variable
  26. integratorcp-cm-mem
  27. The ICST oscillator must be provided inside a system controller node.
  28. Required properties:
  29. - compatible: must be one of
  30. "arm,syscon-icst525"
  31. "arm,syscon-icst307"
  32. "arm,syscon-icst525-integratorap-cm"
  33. "arm,syscon-icst525-integratorap-sys"
  34. "arm,syscon-icst525-integratorap-pci"
  35. "arm,syscon-icst525-integratorcp-cm-core"
  36. "arm,syscon-icst525-integratorcp-cm-mem"
  37. - lock-offset: the offset address into the system controller where the
  38. unlocking register is located
  39. - vco-offset: the offset address into the system controller where the
  40. ICST control register is located (even 32 bit address)
  41. - #clock-cells: must be <0>
  42. - clocks: parent clock, since the ICST needs a parent clock to derive its
  43. frequency from, this attribute is compulsory.
  44. Example:
  45. syscon: syscon@10000000 {
  46. compatible = "syscon";
  47. reg = <0x10000000 0x1000>;
  48. oscclk0: osc0@0c {
  49. compatible = "arm,syscon-icst307";
  50. #clock-cells = <0>;
  51. lock-offset = <0x20>;
  52. vco-offset = <0x0c>;
  53. clocks = <&xtal24mhz>;
  54. };
  55. (...)
  56. };