zx296718-clk.txt 944 B

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  1. Device Tree Clock bindings for ZTE zx296718
  2. This binding uses the common clock binding[1].
  3. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
  4. Required properties:
  5. - compatible : shall be one of the following:
  6. "zte,zx296718-topcrm":
  7. zx296718 top clock selection, divider and gating
  8. "zte,zx296718-lsp0crm" and
  9. "zte,zx296718-lsp1crm":
  10. zx296718 device level clock selection and gating
  11. - reg: Address and length of the register set
  12. The clock consumer should specify the desired clock by having the clock
  13. ID in its "clocks" phandle cell. See include/dt-bindings/clock/zx296718-clock.h
  14. for the full list of zx296718 clock IDs.
  15. topclk: topcrm@1461000 {
  16. compatible = "zte,zx296718-topcrm-clk";
  17. reg = <0x01461000 0x1000>;
  18. #clock-cells = <1>;
  19. };
  20. usbphy0:usb-phy0 {
  21. compatible = "zte,zx296718-usb-phy";
  22. #phy-cells = <0>;
  23. clocks = <&topclk USB20_PHY_CLK>;
  24. clock-names = "phyclk";
  25. status = "okay";
  26. };