ti,omap-dss.txt 4.5 KB

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  1. Texas Instruments OMAP Display Subsystem
  2. ========================================
  3. Generic Description
  4. -------------------
  5. This document is a generic description of the OMAP Display Subsystem bindings.
  6. Binding details for each OMAP SoC version are described in respective binding
  7. documentation.
  8. The OMAP Display Subsystem (DSS) hardware consists of DSS Core, DISPC module and
  9. a number of encoder modules. All DSS versions contain DSS Core and DISPC, but
  10. the encoder modules vary.
  11. The DSS Core is the parent of the other DSS modules, and manages clock routing,
  12. integration to the SoC, etc.
  13. DISPC is the display controller, which reads pixels from the memory and outputs
  14. a RGB pixel stream to encoders.
  15. The encoder modules encode the received RGB pixel stream to a video output like
  16. HDMI, MIPI DPI, etc.
  17. Video Ports
  18. -----------
  19. The DSS Core and the encoders have video port outputs. The structure of the
  20. video ports is described in Documentation/devicetree/bindings/graph.txt,
  21. and the properties for the ports and endpoints for each encoder are
  22. described in the SoC's DSS binding documentation.
  23. The video ports are used to describe the connections to external hardware, like
  24. panels or external encoders.
  25. Aliases
  26. -------
  27. The board dts file may define aliases for displays to assign "displayX" style
  28. name for each display. If no aliases are defined, a semi-random number is used
  29. for the display.
  30. Example
  31. -------
  32. A shortened example of the DSS description for OMAP4, with non-relevant parts
  33. removed, defined in omap4.dtsi:
  34. dss: dss@58000000 {
  35. compatible = "ti,omap4-dss";
  36. reg = <0x58000000 0x80>;
  37. status = "disabled";
  38. ti,hwmods = "dss_core";
  39. clocks = <&dss_dss_clk>;
  40. clock-names = "fck";
  41. #address-cells = <1>;
  42. #size-cells = <1>;
  43. ranges;
  44. dispc@58001000 {
  45. compatible = "ti,omap4-dispc";
  46. reg = <0x58001000 0x1000>;
  47. interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
  48. ti,hwmods = "dss_dispc";
  49. clocks = <&dss_dss_clk>;
  50. clock-names = "fck";
  51. };
  52. hdmi: encoder@58006000 {
  53. compatible = "ti,omap4-hdmi";
  54. reg = <0x58006000 0x200>,
  55. <0x58006200 0x100>,
  56. <0x58006300 0x100>,
  57. <0x58006400 0x1000>;
  58. reg-names = "wp", "pll", "phy", "core";
  59. interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
  60. status = "disabled";
  61. ti,hwmods = "dss_hdmi";
  62. clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
  63. clock-names = "fck", "sys_clk";
  64. };
  65. };
  66. A shortened example of the board description for OMAP4 Panda board, defined in
  67. omap4-panda.dts.
  68. The Panda board has a DVI and a HDMI connector, and the board contains a TFP410
  69. chip (MIPI DPI to DVI encoder) and a TPD12S015 chip (HDMI ESD protection & level
  70. shifter). The video pipelines for the connectors are formed as follows:
  71. DSS Core --(MIPI DPI)--> TFP410 --(DVI)--> DVI Connector
  72. OMAP HDMI --(HDMI)--> TPD12S015 --(HDMI)--> HDMI Connector
  73. / {
  74. aliases {
  75. display0 = &dvi0;
  76. display1 = &hdmi0;
  77. };
  78. tfp410: encoder@0 {
  79. compatible = "ti,tfp410";
  80. gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; /* 0, power-down */
  81. pinctrl-names = "default";
  82. pinctrl-0 = <&tfp410_pins>;
  83. ports {
  84. #address-cells = <1>;
  85. #size-cells = <0>;
  86. port@0 {
  87. reg = <0>;
  88. tfp410_in: endpoint@0 {
  89. remote-endpoint = <&dpi_out>;
  90. };
  91. };
  92. port@1 {
  93. reg = <1>;
  94. tfp410_out: endpoint@0 {
  95. remote-endpoint = <&dvi_connector_in>;
  96. };
  97. };
  98. };
  99. };
  100. dvi0: connector@0 {
  101. compatible = "dvi-connector";
  102. label = "dvi";
  103. i2c-bus = <&i2c3>;
  104. port {
  105. dvi_connector_in: endpoint {
  106. remote-endpoint = <&tfp410_out>;
  107. };
  108. };
  109. };
  110. tpd12s015: encoder@1 {
  111. compatible = "ti,tpd12s015";
  112. pinctrl-names = "default";
  113. pinctrl-0 = <&tpd12s015_pins>;
  114. gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */
  115. <&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */
  116. <&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */
  117. ports {
  118. #address-cells = <1>;
  119. #size-cells = <0>;
  120. port@0 {
  121. reg = <0>;
  122. tpd12s015_in: endpoint@0 {
  123. remote-endpoint = <&hdmi_out>;
  124. };
  125. };
  126. port@1 {
  127. reg = <1>;
  128. tpd12s015_out: endpoint@0 {
  129. remote-endpoint = <&hdmi_connector_in>;
  130. };
  131. };
  132. };
  133. };
  134. hdmi0: connector@1 {
  135. compatible = "hdmi-connector";
  136. label = "hdmi";
  137. port {
  138. hdmi_connector_in: endpoint {
  139. remote-endpoint = <&tpd12s015_out>;
  140. };
  141. };
  142. };
  143. };
  144. &dss {
  145. status = "ok";
  146. pinctrl-names = "default";
  147. pinctrl-0 = <&dss_dpi_pins>;
  148. port {
  149. dpi_out: endpoint {
  150. remote-endpoint = <&tfp410_in>;
  151. data-lines = <24>;
  152. };
  153. };
  154. };
  155. &hdmi {
  156. status = "ok";
  157. vdda-supply = <&vdac>;
  158. pinctrl-names = "default";
  159. pinctrl-0 = <&dss_hdmi_pins>;
  160. port {
  161. hdmi_out: endpoint {
  162. remote-endpoint = <&tpd12s015_in>;
  163. };
  164. };
  165. };