kryo3xx-edac.txt 983 B

123456789101112131415161718192021222324252627282930313233
  1. * Kryo 3xx EDAC node
  2. Kryo3xx EDAC node is defined to describe on-chip error detection and correction
  3. for the Kryo3xx core.
  4. Kryo3xx will report all SBE and DBE found in L1/L2/L3/SCU caches in two registers:
  5. ERRXSTATUS - Error Record Primary Status Register
  6. ERRXMISC0 - Error Record Miscellaneous Register
  7. Current implementation of Kryo 3xx ECC mechanism does not have interrupts setup,
  8. and so requires polling of the registers to check if a error has been reported.
  9. The following section describes the DT node binding for kryo_3xx_cpu_erp.
  10. Required properties:
  11. - compatible : Shall be "arm,arm64-kryo3xx-cpu-erp".
  12. - interrupts : Interrupt-specifier for L1/L2, L3/SCU error IRQ(s)
  13. - interrupt-names : Descriptive names of the interrupts
  14. Example:
  15. kryo3xx-erp {
  16. compatible = "arm,arm64-kryo3xx-cpu-erp";
  17. interrupts = <1 6 4>,
  18. <1 7 4>,
  19. <0 34 4>,
  20. <0 35 4>;
  21. interrupt-names = "l1-l2-faultirq",
  22. "l1-l2-errirq",
  23. "l3-scu-errirq",
  24. "l3-scu-faultirq";
  25. };