nvidia,gk20a.txt 2.1 KB

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  1. NVIDIA Tegra Graphics Processing Units
  2. Required properties:
  3. - compatible: "nvidia,<gpu>"
  4. Currently recognized values:
  5. - nvidia,gk20a
  6. - nvidia,gm20b
  7. - reg: Physical base address and length of the controller's registers.
  8. Must contain two entries:
  9. - first entry for bar0
  10. - second entry for bar1
  11. - interrupts: Must contain an entry for each entry in interrupt-names.
  12. See ../interrupt-controller/interrupts.txt for details.
  13. - interrupt-names: Must include the following entries:
  14. - stall
  15. - nonstall
  16. - vdd-supply: regulator for supply voltage.
  17. - clocks: Must contain an entry for each entry in clock-names.
  18. See ../clocks/clock-bindings.txt for details.
  19. - clock-names: Must include the following entries:
  20. - gpu
  21. - pwr
  22. If the compatible string is "nvidia,gm20b", then the following clock
  23. is also required:
  24. - ref
  25. - resets: Must contain an entry for each entry in reset-names.
  26. See ../reset/reset.txt for details.
  27. - reset-names: Must include the following entries:
  28. - gpu
  29. Optional properties:
  30. - iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.
  31. Example for GK20A:
  32. gpu@57000000 {
  33. compatible = "nvidia,gk20a";
  34. reg = <0x0 0x57000000 0x0 0x01000000>,
  35. <0x0 0x58000000 0x0 0x01000000>;
  36. interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
  37. <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
  38. interrupt-names = "stall", "nonstall";
  39. vdd-supply = <&vdd_gpu>;
  40. clocks = <&tegra_car TEGRA124_CLK_GPU>,
  41. <&tegra_car TEGRA124_CLK_PLL_P_OUT5>;
  42. clock-names = "gpu", "pwr";
  43. resets = <&tegra_car 184>;
  44. reset-names = "gpu";
  45. iommus = <&mc TEGRA_SWGROUP_GPU>;
  46. status = "disabled";
  47. };
  48. Example for GM20B:
  49. gpu@57000000 {
  50. compatible = "nvidia,gm20b";
  51. reg = <0x0 0x57000000 0x0 0x01000000>,
  52. <0x0 0x58000000 0x0 0x01000000>;
  53. interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
  54. <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
  55. interrupt-names = "stall", "nonstall";
  56. clocks = <&tegra_car TEGRA210_CLK_GPU>,
  57. <&tegra_car TEGRA210_CLK_PLL_P_OUT5>,
  58. <&tegra_car TEGRA210_CLK_PLL_G_REF>;
  59. clock-names = "gpu", "pwr", "ref";
  60. resets = <&tegra_car 184>;
  61. reset-names = "gpu";
  62. iommus = <&mc TEGRA_SWGROUP_GPU>;
  63. status = "disabled";
  64. };