qcom,ath10k.txt 3.7 KB

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  1. * Qualcomm Atheros ath10k wireless devices
  2. Required properties:
  3. - compatible: Should be one of the following:
  4. * "qcom,ath10k"
  5. * "qcom,ipq4019-wifi"
  6. PCI based devices uses compatible string "qcom,ath10k" and takes calibration
  7. data along with board specific data via "qcom,ath10k-calibration-data".
  8. Rest of the properties are not applicable for PCI based devices.
  9. AHB based devices (i.e. ipq4019) uses compatible string "qcom,ipq4019-wifi"
  10. and also uses most of the properties defined in this doc (except
  11. "qcom,ath10k-calibration-data"). It uses "qcom,ath10k-pre-calibration-data"
  12. to carry pre calibration data.
  13. In general, entry "qcom,ath10k-pre-calibration-data" and
  14. "qcom,ath10k-calibration-data" conflict with each other and only one
  15. can be provided per device.
  16. Optional properties:
  17. - reg: Address and length of the register set for the device.
  18. - resets: Must contain an entry for each entry in reset-names.
  19. See ../reset/reseti.txt for details.
  20. - reset-names: Must include the list of following reset names,
  21. "wifi_cpu_init"
  22. "wifi_radio_srif"
  23. "wifi_radio_warm"
  24. "wifi_radio_cold"
  25. "wifi_core_warm"
  26. "wifi_core_cold"
  27. - clocks: List of clock specifiers, must contain an entry for each required
  28. entry in clock-names.
  29. - clock-names: Should contain the clock names "wifi_wcss_cmd", "wifi_wcss_ref",
  30. "wifi_wcss_rtc".
  31. - interrupts: List of interrupt lines. Must contain an entry
  32. for each entry in the interrupt-names property.
  33. - interrupt-names: Must include the entries for MSI interrupt
  34. names ("msi0" to "msi15") and legacy interrupt
  35. name ("legacy"),
  36. - qcom,msi_addr: MSI interrupt address.
  37. - qcom,msi_base: Base value to add before writing MSI data into
  38. MSI address register.
  39. - qcom,ath10k-calibration-data : calibration data + board specific data
  40. as an array, the length can vary between
  41. hw versions.
  42. - qcom,ath10k-pre-calibration-data : pre calibration data as an array,
  43. the length can vary between hw versions.
  44. Example (to supply the calibration data alone):
  45. In this example, the node is defined as child node of the PCI controller.
  46. pci {
  47. pcie@0 {
  48. reg = <0 0 0 0 0>;
  49. #interrupt-cells = <1>;
  50. #size-cells = <2>;
  51. #address-cells = <3>;
  52. device_type = "pci";
  53. ath10k@0,0 {
  54. reg = <0 0 0 0 0>;
  55. device_type = "pci";
  56. qcom,ath10k-calibration-data = [ 01 02 03 ... ];
  57. };
  58. };
  59. };
  60. Example (to supply ipq4019 SoC wifi block details):
  61. wifi0: wifi@a000000 {
  62. compatible = "qcom,ipq4019-wifi";
  63. reg = <0xa000000 0x200000>;
  64. resets = <&gcc WIFI0_CPU_INIT_RESET>,
  65. <&gcc WIFI0_RADIO_SRIF_RESET>,
  66. <&gcc WIFI0_RADIO_WARM_RESET>,
  67. <&gcc WIFI0_RADIO_COLD_RESET>,
  68. <&gcc WIFI0_CORE_WARM_RESET>,
  69. <&gcc WIFI0_CORE_COLD_RESET>;
  70. reset-names = "wifi_cpu_init",
  71. "wifi_radio_srif",
  72. "wifi_radio_warm",
  73. "wifi_radio_cold",
  74. "wifi_core_warm",
  75. "wifi_core_cold";
  76. clocks = <&gcc GCC_WCSS2G_CLK>,
  77. <&gcc GCC_WCSS2G_REF_CLK>,
  78. <&gcc GCC_WCSS2G_RTC_CLK>;
  79. clock-names = "wifi_wcss_cmd",
  80. "wifi_wcss_ref",
  81. "wifi_wcss_rtc";
  82. interrupts = <0 0x20 0x1>,
  83. <0 0x21 0x1>,
  84. <0 0x22 0x1>,
  85. <0 0x23 0x1>,
  86. <0 0x24 0x1>,
  87. <0 0x25 0x1>,
  88. <0 0x26 0x1>,
  89. <0 0x27 0x1>,
  90. <0 0x28 0x1>,
  91. <0 0x29 0x1>,
  92. <0 0x2a 0x1>,
  93. <0 0x2b 0x1>,
  94. <0 0x2c 0x1>,
  95. <0 0x2d 0x1>,
  96. <0 0x2e 0x1>,
  97. <0 0x2f 0x1>,
  98. <0 0xa8 0x0>;
  99. interrupt-names = "msi0", "msi1", "msi2", "msi3",
  100. "msi4", "msi5", "msi6", "msi7",
  101. "msi8", "msi9", "msi10", "msi11",
  102. "msi12", "msi13", "msi14", "msi15",
  103. "legacy";
  104. qcom,msi_addr = <0x0b006040>;
  105. qcom,msi_base = <0x40>;
  106. qcom,ath10k-pre-calibration-data = [ 01 02 03 ... ];
  107. };