qcom,pmic-gpio.txt 7.9 KB

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  1. Qualcomm PMIC GPIO block
  2. This binding describes the GPIO block(s) found in the 8xxx series of
  3. PMIC's from Qualcomm.
  4. - compatible:
  5. Usage: required
  6. Value type: <string>
  7. Definition: must be one of:
  8. "qcom,pm8018-gpio"
  9. "qcom,pm8038-gpio"
  10. "qcom,pm8058-gpio"
  11. "qcom,pm8916-gpio"
  12. "qcom,pm8917-gpio"
  13. "qcom,pm8921-gpio"
  14. "qcom,pm8941-gpio"
  15. "qcom,pm8994-gpio"
  16. "qcom,pma8084-gpio"
  17. And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio"
  18. if the device is on an spmi bus or an ssbi bus respectively
  19. - reg:
  20. Usage: required
  21. Value type: <prop-encoded-array>
  22. Definition: Register base of the GPIO block and length.
  23. - interrupts:
  24. Usage: required
  25. Value type: <prop-encoded-array>
  26. Definition: Must contain an array of encoded interrupt specifiers for
  27. each available GPIO
  28. - gpio-controller:
  29. Usage: required
  30. Value type: <none>
  31. Definition: Mark the device node as a GPIO controller
  32. - #gpio-cells:
  33. Usage: required
  34. Value type: <u32>
  35. Definition: Must be 2;
  36. the first cell will be used to define gpio number and the
  37. second denotes the flags for this gpio
  38. - qcom,gpios-disallowed:
  39. Usage: optional
  40. Value type: <prop-encoded-array>
  41. Definition: Array of the GPIO hardware numbers corresponding to GPIOs
  42. which the APSS processor is not allowed to configure.
  43. The hardware numbers are indexed from 1.
  44. The interrupt resources for these GPIOs must not be defined
  45. in "interrupts" and "interrupt-names" properties.
  46. GPIOs defined in this array won't be registered as pins
  47. in the pinctrl device or gpios in the gpio chip.
  48. Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
  49. a general description of GPIO and interrupt bindings.
  50. Please refer to pinctrl-bindings.txt in this directory for details of the
  51. common pinctrl bindings used by client devices, including the meaning of the
  52. phrase "pin configuration node".
  53. The pin configuration nodes act as a container for an arbitrary number of
  54. subnodes. Each of these subnodes represents some desired configuration for a
  55. pin or a list of pins. This configuration can include the
  56. mux function to select on those pin(s), and various pin configuration
  57. parameters, as listed below.
  58. SUBNODES:
  59. The name of each subnode is not important; all subnodes should be enumerated
  60. and processed purely based on their content.
  61. Each subnode only affects those parameters that are explicitly listed. In
  62. other words, a subnode that lists a mux function but no pin configuration
  63. parameters implies no information about any pin configuration parameters.
  64. Similarly, a pin subnode that describes a pullup parameter implies no
  65. information about e.g. the mux function.
  66. The following generic properties as defined in pinctrl-bindings.txt are valid
  67. to specify in a pin configuration subnode:
  68. - pins:
  69. Usage: required
  70. Value type: <string-array>
  71. Definition: List of gpio pins affected by the properties specified in
  72. this subnode. Valid pins are:
  73. gpio1-gpio6 for pm8018
  74. gpio1-gpio12 for pm8038
  75. gpio1-gpio40 for pm8058
  76. gpio1-gpio4 for pm8916
  77. gpio1-gpio38 for pm8917
  78. gpio1-gpio44 for pm8921
  79. gpio1-gpio36 for pm8941
  80. gpio1-gpio22 for pm8994
  81. gpio1-gpio22 for pma8084
  82. - function:
  83. Usage: required
  84. Value type: <string>
  85. Definition: Specify the alternative function to be configured for the
  86. specified pins. Valid values are:
  87. "normal",
  88. "paired",
  89. "func1",
  90. "func2",
  91. "dtest1",
  92. "dtest2",
  93. "dtest3",
  94. "dtest4",
  95. And following values are supported by LV/MV GPIO subtypes:
  96. "func3",
  97. "func4",
  98. "analog"
  99. - bias-disable:
  100. Usage: optional
  101. Value type: <none>
  102. Definition: The specified pins should be configured as no pull.
  103. - bias-pull-down:
  104. Usage: optional
  105. Value type: <none>
  106. Definition: The specified pins should be configured as pull down.
  107. - bias-pull-up:
  108. Usage: optional
  109. Value type: <empty>
  110. Definition: The specified pins should be configured as pull up.
  111. - qcom,pull-up-strength:
  112. Usage: optional
  113. Value type: <u32>
  114. Definition: Specifies the strength to use for pull up, if selected.
  115. Valid values are; as defined in
  116. <dt-bindings/pinctrl/qcom,pmic-gpio.h>:
  117. 1: 30uA (PMIC_GPIO_PULL_UP_30)
  118. 2: 1.5uA (PMIC_GPIO_PULL_UP_1P5)
  119. 3: 31.5uA (PMIC_GPIO_PULL_UP_31P5)
  120. 4: 1.5uA + 30uA boost (PMIC_GPIO_PULL_UP_1P5_30)
  121. If this property is omitted 30uA strength will be used if
  122. pull up is selected
  123. - bias-high-impedance:
  124. Usage: optional
  125. Value type: <none>
  126. Definition: The specified pins will put in high-Z mode and disabled.
  127. - input-enable:
  128. Usage: optional
  129. Value type: <none>
  130. Definition: The specified pins are put in input mode.
  131. - output-high:
  132. Usage: optional
  133. Value type: <none>
  134. Definition: The specified pins are configured in output mode, driven
  135. high.
  136. - output-low:
  137. Usage: optional
  138. Value type: <none>
  139. Definition: The specified pins are configured in output mode, driven
  140. low.
  141. - power-source:
  142. Usage: optional
  143. Value type: <u32>
  144. Definition: Selects the power source for the specified pins. Valid
  145. power sources are defined per chip in
  146. <dt-bindings/pinctrl/qcom,pmic-gpio.h>
  147. - qcom,drive-strength:
  148. Usage: optional
  149. Value type: <u32>
  150. Definition: Selects the drive strength for the specified pins. Value
  151. drive strengths are:
  152. 0: no (PMIC_GPIO_STRENGTH_NO)
  153. 1: high (PMIC_GPIO_STRENGTH_HIGH) 0.9mA @ 1.8V - 1.9mA @ 2.6V
  154. 2: medium (PMIC_GPIO_STRENGTH_MED) 0.6mA @ 1.8V - 1.25mA @ 2.6V
  155. 3: low (PMIC_GPIO_STRENGTH_LOW) 0.15mA @ 1.8V - 0.3mA @ 2.6V
  156. as defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>
  157. - drive-push-pull:
  158. Usage: optional
  159. Value type: <none>
  160. Definition: The specified pins are configured in push-pull mode.
  161. - drive-open-drain:
  162. Usage: optional
  163. Value type: <none>
  164. Definition: The specified pins are configured in open-drain mode.
  165. - drive-open-source:
  166. Usage: optional
  167. Value type: <none>
  168. Definition: The specified pins are configured in open-source mode.
  169. - qcom,atest:
  170. Usage: optional
  171. Value type: <u32>
  172. Definition: Selects ATEST rail to route to GPIO when it's configured
  173. in analog-pass-through mode by specifying "analog" function.
  174. Valid values are 0-3 corresponding to PMIC_GPIO_AOUT_ATESTx
  175. defined in <dt-bindings/pinctrl/qcom,pmic-gpio.h>.
  176. - qcom,dtest-buffer:
  177. Usage: optional
  178. Value type: <u32>
  179. Definition: Selects DTEST rail to route to GPIO when it's configured
  180. as a digital input.
  181. For LV/MV GPIO subtypes, the valid values are 0-3
  182. corresponding to PMIC_GPIO_DIN_DTESTx defined in
  183. <dt-bindings/pinctrl/qcom,pmic-gpio.h>. Only one
  184. DTEST rail can be selected at a time.
  185. For 4CH/8CH GPIO subtypes, supported values are 1-15.
  186. 4 DTEST rails are supported in total and more than 1 DTEST
  187. rail can be selected simultaneously. Each bit of the
  188. 4 LSBs represent one DTEST rail, such as [3:0] = 0101
  189. means both DTEST1 and DTEST3 are selected.
  190. Example:
  191. pm8921_gpio: gpio@150 {
  192. compatible = "qcom,pm8921-gpio", "qcom,ssbi-gpio";
  193. reg = <0x150 0x160>;
  194. interrupts = <192 1>, <193 1>, <194 1>,
  195. <195 1>, <196 1>, <197 1>,
  196. <198 1>, <199 1>, <200 1>,
  197. <201 1>, <202 1>, <203 1>,
  198. <204 1>, <205 1>, <206 1>,
  199. <207 1>, <208 1>, <209 1>,
  200. <210 1>, <211 1>, <212 1>,
  201. <213 1>, <214 1>, <215 1>,
  202. <216 1>, <217 1>, <218 1>,
  203. <219 1>, <220 1>, <221 1>,
  204. <222 1>, <223 1>, <224 1>,
  205. <225 1>, <226 1>, <227 1>,
  206. <228 1>, <229 1>, <230 1>,
  207. <231 1>, <232 1>, <233 1>,
  208. <234 1>, <235 1>;
  209. gpio-controller;
  210. #gpio-cells = <2>;
  211. qcom,gpios-disallowed = <1 20>;
  212. pm8921_gpio_keys: gpio-keys {
  213. volume-keys {
  214. pins = "gpio20", "gpio21";
  215. function = "normal";
  216. input-enable;
  217. bias-pull-up;
  218. drive-push-pull;
  219. qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
  220. power-source = <PM8921_GPIO_S4>;
  221. };
  222. };
  223. };