renesas,pfc-pinctrl.txt 6.2 KB

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  1. * Renesas Pin Function Controller (GPIO and Pin Mux/Config)
  2. The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0,
  3. R8A73A4 and R8A7740 it also acts as a GPIO controller.
  4. Pin Control
  5. -----------
  6. Required Properties:
  7. - compatible: should be one of the following.
  8. - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller.
  9. - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
  10. - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
  11. - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller.
  12. - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
  13. - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
  14. - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller.
  15. - "renesas,pfc-r8a7792": for R8A7792 (R-Car V2H) compatible pin-controller.
  16. - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller.
  17. - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.
  18. - "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller.
  19. - "renesas,pfc-r8a7796": for R8A7796 (R-Car M3-W) compatible pin-controller.
  20. - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
  21. - reg: Base address and length of each memory resource used by the pin
  22. controller hardware module.
  23. Optional properties:
  24. - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
  25. otherwise. Should be 3.
  26. - interrupts-extended: Specify the interrupts associated with external
  27. IRQ pins. This property is mandatory when the PFC handles GPIOs and
  28. forbidden otherwise. When specified, it must contain one interrupt per
  29. external IRQ, sorted by external IRQ number.
  30. The PFC node also acts as a container for pin configuration nodes. Please refer
  31. to pinctrl-bindings.txt in this directory for the definition of the term "pin
  32. configuration node" and for the common pinctrl bindings used by client devices.
  33. Each pin configuration node represents a desired configuration for a pin, a
  34. pin group, or a list of pins or pin groups. The configuration can include the
  35. function to select on those pin(s) and pin configuration parameters (such as
  36. pull-up and pull-down).
  37. Pin configuration nodes contain pin configuration properties, either directly
  38. or grouped in child subnodes. Both pin muxing and configuration parameters can
  39. be grouped in that way and referenced as a single pin configuration node by
  40. client devices.
  41. A configuration node or subnode must reference at least one pin (through the
  42. pins or pin groups properties) and contain at least a function or one
  43. configuration parameter. When the function is present only pin groups can be
  44. used to reference pins.
  45. All pin configuration nodes and subnodes names are ignored. All of those nodes
  46. are parsed through phandles and processed purely based on their content.
  47. Pin Configuration Node Properties:
  48. - pins : An array of strings, each string containing the name of a pin.
  49. - groups : An array of strings, each string containing the name of a pin
  50. group.
  51. - function: A string containing the name of the function to mux to the pin
  52. group(s) specified by the groups property.
  53. Valid values for pin, group and function names can be found in the group and
  54. function arrays of the PFC data file corresponding to the SoC
  55. (drivers/pinctrl/sh-pfc/pfc-*.c)
  56. The pin configuration parameters use the generic pinconf bindings defined in
  57. pinctrl-bindings.txt in this directory. The supported parameters are
  58. bias-disable, bias-pull-up, bias-pull-down, drive-strength and power-source. For
  59. pins that have a configurable I/O voltage, the power-source value should be the
  60. nominal I/O voltage in millivolts.
  61. GPIO
  62. ----
  63. On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node.
  64. Required Properties:
  65. - gpio-controller: Marks the device node as a gpio controller.
  66. - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
  67. cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
  68. GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
  69. The syntax of the gpio specifier used by client nodes should be the following
  70. with values derived from the SoC user manual.
  71. <[phandle of the gpio controller node]
  72. [pin number within the gpio controller]
  73. [flags]>
  74. On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver.
  75. Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
  76. for documentation of the GPIO device tree bindings on those platforms.
  77. Examples
  78. --------
  79. Example 1: SH73A0 (SH-Mobile AG5) pin controller node
  80. pfc: pfc@e6050000 {
  81. compatible = "renesas,pfc-sh73a0";
  82. reg = <0xe6050000 0x8000>,
  83. <0xe605801c 0x1c>;
  84. gpio-controller;
  85. #gpio-cells = <2>;
  86. interrupts-extended =
  87. <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
  88. <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
  89. <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
  90. <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
  91. <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
  92. <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
  93. <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
  94. <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
  95. };
  96. Example 2: A GPIO LED node that references a GPIO
  97. #include <dt-bindings/gpio/gpio.h>
  98. leds {
  99. compatible = "gpio-leds";
  100. led1 {
  101. gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
  102. };
  103. };
  104. Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
  105. for the MMCIF and SCIFA4 devices
  106. &pfc {
  107. pinctrl-0 = <&scifa4_pins>;
  108. pinctrl-names = "default";
  109. mmcif_pins: mmcif {
  110. mux {
  111. groups = "mmc0_data8_0", "mmc0_ctrl_0";
  112. function = "mmc0";
  113. };
  114. cfg {
  115. groups = "mmc0_data8_0";
  116. pins = "PORT279";
  117. bias-pull-up;
  118. };
  119. };
  120. scifa4_pins: scifa4 {
  121. groups = "scifa4_data", "scifa4_ctrl";
  122. function = "scifa4";
  123. };
  124. };
  125. Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device
  126. &mmcif {
  127. pinctrl-0 = <&mmcif_pins>;
  128. pinctrl-names = "default";
  129. bus-width = <8>;
  130. vmmc-supply = <&reg_1p8v>;
  131. status = "okay";
  132. };