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- MSM Array Power Mux (msm-apm)
- In some MSM designs, the CPU and caches contain logic which can be powered by
- multiple rails. The APM controller exists to enable the selection of the power
- rail supplying these arrays. Since a given supply may drop below the array
- SRAM minimum operating voltage, the APM controller can be used to request a
- switch to a power supply that will guarantee logic state retention.
- Required properties
- - compatible: "qcom,msm-apm", "qcom,msm8996pro-apm", "qcom,msm8953-apm"
- - reg: Specifies physical base address and size of memory mapped regions
- containing the APM controller, APCS CSR, APC PLL controller, and
- SPM event registers.
- - reg-names: List of strings identifying the reg property entries. This list must
- contain: "pm-apcc-glb", "apcs-csr", "apc0-pll-ctl", "apc1-pll-ctl",
- "apc0-cpu0-spm", "apc0-cpu1-spm", "apc1-cpu0-spm", "apc1-cpu1-spm",
- "apc0-l2-spm", and "apc1-l2-spm".
- Optional properties
- - qcom,clock-source-override: Specify this property to request a switch of the APC0 and APC1
- clock sources to GPLL0 before the APM switch begins and to
- switch back to the original clock source after the APM switch
- completes.
- - qcom,apm-post-halt-delay: The APM controller post halt delay counter value that SW needs
- to program one time before starting the APM HW controller for
- msm8953 target.
- - qcom,apm-halt-clk-delay: The APM controller halt clock delay counter value that SW
- needs to program one time before starting the APM HW controller
- for msm8953 target.
- - qcom,apm-resume-clk-delay: The APM controller resume clock delay counter value that SW
- needs to program one time before starting the APM HW controller
- for msm8953 target.
- - qcom,apm-sel-switch-delay: The APM controller switch selection delay counter value that SW
- needs to program one time before starting the APM HW controller
- for msm8953 target.
- MSM APM Users
- Required properties:
- - qcom,apm-ctrl: phandle of APM controller device node
- Example:
- apc_apm: apm@099e0000 {
- compatible = "qcom,msm-apm";
- reg = <0x099e0000 0x1000>,
- <0x09820000 0x10000>,
- <0x06400050 0x8>,
- <0x06480050 0x8>,
- <0x09981068 0x8>,
- <0x09991068 0x8>,
- <0x099b1068 0x8>,
- <0x099c1068 0x8>,
- <0x099a1068 0x8>,
- <0x099d1068 0x8>;
- reg-names = "pm-apcc-glb",
- "apcs-csr",
- "apc0-pll-ctl",
- "apc1-pll-ctl",
- "apc0-cpu0-spm",
- "apc0-cpu1-spm",
- "apc1-cpu0-spm",
- "apc1-cpu1-spm",
- "apc0-l2-spm",
- "apc1-l2-spm";
- qcom,apm-post-halt-delay = <0x2>;
- qcom,apm-halt-clk-delay = <0x11>;
- qcom,apm-resume-clk-delay = <0x10>;
- qcom,apm-sel-switch-delay = <0x01>;
- foo_user {
- ...
- qcom,apm-ctrl = <&apc_apm>;
- };
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