nvidia,tegra124-soctherm.txt 6.2 KB

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  1. Tegra124 SOCTHERM thermal management system
  2. The SOCTHERM IP block contains thermal sensors, support for polled
  3. or interrupt-based thermal monitoring, CPU and GPU throttling based
  4. on temperature trip points, and handling external overcurrent
  5. notifications. It is also used to manage emergency shutdown in an
  6. overheating situation.
  7. Required properties :
  8. - compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
  9. For Tegra132, must contain "nvidia,tegra132-soctherm".
  10. For Tegra210, must contain "nvidia,tegra210-soctherm".
  11. - reg : Should contain at least 2 entries for each entry in reg-names:
  12. - SOCTHERM register set
  13. - Tegra CAR register set: Required for Tegra124 and Tegra210.
  14. - CCROC register set: Required for Tegra132.
  15. - reg-names : Should contain at least 2 entries:
  16. - soctherm-reg
  17. - car-reg
  18. - ccroc-reg
  19. - interrupts : Defines the interrupt used by SOCTHERM
  20. - clocks : Must contain an entry for each entry in clock-names.
  21. See ../clocks/clock-bindings.txt for details.
  22. - clock-names : Must include the following entries:
  23. - tsensor
  24. - soctherm
  25. - resets : Must contain an entry for each entry in reset-names.
  26. See ../reset/reset.txt for details.
  27. - reset-names : Must include the following entries:
  28. - soctherm
  29. - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description
  30. of this property. See <dt-bindings/thermal/tegra124-soctherm.h> for a
  31. list of valid values when referring to thermal sensors.
  32. - throttle-cfgs: A sub-node which is a container of configuration for each
  33. hardware throttle events. These events can be set as cooling devices.
  34. * throttle events: Sub-nodes must be named as "light" or "heavy".
  35. Properties:
  36. - nvidia,priority: Each throttles has its own throttle settings, so the
  37. SW need to set priorities for various throttle, the HW arbiter can select
  38. the final throttle settings.
  39. Bigger value indicates higher priority, In general, higher priority
  40. translates to lower target frequency. SW needs to ensure that critical
  41. thermal alarms are given higher priority, and ensure that there is
  42. no race if priority of two vectors is set to the same value.
  43. The range of this value is 1~100.
  44. - nvidia,cpu-throt-percent: This property is for Tegra124 and Tegra210.
  45. It is the throttling depth of pulse skippers, it's the percentage
  46. throttling.
  47. - nvidia,cpu-throt-level: This property is only for Tegra132, it is the
  48. level of pulse skippers, which used to throttle clock frequencies. It
  49. indicates cpu clock throttling depth, and the depth can be programmed.
  50. Must set as following values:
  51. TEGRA_SOCTHERM_THROT_LEVEL_LOW, TEGRA_SOCTHERM_THROT_LEVEL_MED
  52. TEGRA_SOCTHERM_THROT_LEVEL_HIGH, TEGRA_SOCTHERM_THROT_LEVEL_NONE
  53. - #cooling-cells: Should be 1. This cooling device only support on/off state.
  54. See ./thermal.txt for a description of this property.
  55. Note:
  56. - the "critical" type trip points will be set to SOC_THERM hardware as the
  57. shut down temperature. Once the temperature of this thermal zone is higher
  58. than it, the system will be shutdown or reset by hardware.
  59. - the "hot" type trip points will be set to SOC_THERM hardware as the throttle
  60. temperature. Once the the temperature of this thermal zone is higher
  61. than it, it will trigger the HW throttle event.
  62. Example :
  63. soctherm@700e2000 {
  64. compatible = "nvidia,tegra124-soctherm";
  65. reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
  66. 0x0 0x60006000 0x0 0x400 /* CAR reg_base */
  67. reg-names = "soctherm-reg", "car-reg";
  68. interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
  69. clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
  70. <&tegra_car TEGRA124_CLK_SOC_THERM>;
  71. clock-names = "tsensor", "soctherm";
  72. resets = <&tegra_car 78>;
  73. reset-names = "soctherm";
  74. #thermal-sensor-cells = <1>;
  75. throttle-cfgs {
  76. /*
  77. * When the "heavy" cooling device triggered,
  78. * the HW will skip cpu clock's pulse in 85% depth
  79. */
  80. throttle_heavy: heavy {
  81. nvidia,priority = <100>;
  82. nvidia,cpu-throt-percent = <85>;
  83. #cooling-cells = <1>;
  84. };
  85. /*
  86. * When the "light" cooling device triggered,
  87. * the HW will skip cpu clock's pulse in 50% depth
  88. */
  89. throttle_light: light {
  90. nvidia,priority = <80>;
  91. nvidia,cpu-throt-percent = <50>;
  92. #cooling-cells = <1>;
  93. };
  94. /*
  95. * If these two devices are triggered in same time, the HW throttle
  96. * arbiter will select the highest priority as the final throttle
  97. * settings to skip cpu pulse.
  98. */
  99. };
  100. };
  101. Example: referring to Tegra132's "reg", "reg-names" and "throttle-cfgs" :
  102. soctherm@700e2000 {
  103. compatible = "nvidia,tegra132-soctherm";
  104. reg = <0x0 0x700e2000 0x0 0x600 /* SOC_THERM reg_base */
  105. 0x0 0x70040000 0x0 0x200>; /* CCROC reg_base */;
  106. reg-names = "soctherm-reg", "ccroc-reg";
  107. throttle-cfgs {
  108. /*
  109. * When the "heavy" cooling device triggered,
  110. * the HW will skip cpu clock's pulse in HIGH level
  111. */
  112. throttle_heavy: heavy {
  113. nvidia,priority = <100>;
  114. nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
  115. #cooling-cells = <1>;
  116. };
  117. /*
  118. * When the "light" cooling device triggered,
  119. * the HW will skip cpu clock's pulse in MED level
  120. */
  121. throttle_light: light {
  122. nvidia,priority = <80>;
  123. nvidia,cpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_MED>;
  124. #cooling-cells = <1>;
  125. };
  126. /*
  127. * If these two devices are triggered in same time, the HW throttle
  128. * arbiter will select the highest priority as the final throttle
  129. * settings to skip cpu pulse.
  130. */
  131. };
  132. };
  133. Example: referring to thermal sensors :
  134. thermal-zones {
  135. cpu {
  136. polling-delay-passive = <1000>;
  137. polling-delay = <1000>;
  138. thermal-sensors =
  139. <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>;
  140. trips {
  141. cpu_shutdown_trip: shutdown-trip {
  142. temperature = <102500>;
  143. hysteresis = <1000>;
  144. type = "critical";
  145. };
  146. cpu_throttle_trip: throttle-trip {
  147. temperature = <100000>;
  148. hysteresis = <1000>;
  149. type = "hot";
  150. };
  151. };
  152. cooling-maps {
  153. map0 {
  154. trip = <&cpu_throttle_trip>;
  155. cooling-device = <&throttle_heavy 1 1>;
  156. };
  157. };
  158. };
  159. };