ptrace.h 2.7 KB

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  1. /*
  2. * Copyright (C) 2004-2006 Atmel Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #ifndef _UAPI__ASM_AVR32_PTRACE_H
  9. #define _UAPI__ASM_AVR32_PTRACE_H
  10. #define PTRACE_GETREGS 12
  11. #define PTRACE_SETREGS 13
  12. /*
  13. * Status Register bits
  14. */
  15. #define SR_H 0x20000000
  16. #define SR_J 0x10000000
  17. #define SR_DM 0x08000000
  18. #define SR_D 0x04000000
  19. #define MODE_NMI 0x01c00000
  20. #define MODE_EXCEPTION 0x01800000
  21. #define MODE_INT3 0x01400000
  22. #define MODE_INT2 0x01000000
  23. #define MODE_INT1 0x00c00000
  24. #define MODE_INT0 0x00800000
  25. #define MODE_SUPERVISOR 0x00400000
  26. #define MODE_USER 0x00000000
  27. #define MODE_MASK 0x01c00000
  28. #define SR_EM 0x00200000
  29. #define SR_I3M 0x00100000
  30. #define SR_I2M 0x00080000
  31. #define SR_I1M 0x00040000
  32. #define SR_I0M 0x00020000
  33. #define SR_GM 0x00010000
  34. #define SR_H_BIT 29
  35. #define SR_J_BIT 28
  36. #define SR_DM_BIT 27
  37. #define SR_D_BIT 26
  38. #define MODE_SHIFT 22
  39. #define SR_EM_BIT 21
  40. #define SR_I3M_BIT 20
  41. #define SR_I2M_BIT 19
  42. #define SR_I1M_BIT 18
  43. #define SR_I0M_BIT 17
  44. #define SR_GM_BIT 16
  45. /* The user-visible part */
  46. #define SR_L 0x00000020
  47. #define SR_Q 0x00000010
  48. #define SR_V 0x00000008
  49. #define SR_N 0x00000004
  50. #define SR_Z 0x00000002
  51. #define SR_C 0x00000001
  52. #define SR_L_BIT 5
  53. #define SR_Q_BIT 4
  54. #define SR_V_BIT 3
  55. #define SR_N_BIT 2
  56. #define SR_Z_BIT 1
  57. #define SR_C_BIT 0
  58. /*
  59. * The order is defined by the stmts instruction. r0 is stored first,
  60. * so it gets the highest address.
  61. *
  62. * Registers 0-12 are general-purpose registers (r12 is normally used for
  63. * the function return value).
  64. * Register 13 is the stack pointer
  65. * Register 14 is the link register
  66. * Register 15 is the program counter (retrieved from the RAR sysreg)
  67. */
  68. #define FRAME_SIZE_FULL 72
  69. #define REG_R12_ORIG 68
  70. #define REG_R0 64
  71. #define REG_R1 60
  72. #define REG_R2 56
  73. #define REG_R3 52
  74. #define REG_R4 48
  75. #define REG_R5 44
  76. #define REG_R6 40
  77. #define REG_R7 36
  78. #define REG_R8 32
  79. #define REG_R9 28
  80. #define REG_R10 24
  81. #define REG_R11 20
  82. #define REG_R12 16
  83. #define REG_SP 12
  84. #define REG_LR 8
  85. #define FRAME_SIZE_MIN 8
  86. #define REG_PC 4
  87. #define REG_SR 0
  88. #ifndef __ASSEMBLY__
  89. struct pt_regs {
  90. /* These are always saved */
  91. unsigned long sr;
  92. unsigned long pc;
  93. /* These are sometimes saved */
  94. unsigned long lr;
  95. unsigned long sp;
  96. unsigned long r12;
  97. unsigned long r11;
  98. unsigned long r10;
  99. unsigned long r9;
  100. unsigned long r8;
  101. unsigned long r7;
  102. unsigned long r6;
  103. unsigned long r5;
  104. unsigned long r4;
  105. unsigned long r3;
  106. unsigned long r2;
  107. unsigned long r1;
  108. unsigned long r0;
  109. /* Only saved on system call */
  110. unsigned long r12_orig;
  111. };
  112. #endif /* ! __ASSEMBLY__ */
  113. #endif /* _UAPI__ASM_AVR32_PTRACE_H */