dot.gdbinit.smp 8.7 KB

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  1. # .gdbinit file
  2. # $Id$
  3. # setting
  4. set width 0d70
  5. set radix 0d16
  6. debug_chaos
  7. # clk xin:cpu:bif:bus=1:4:2:1
  8. define clock_init_on
  9. set *(unsigned long *)0x00ef4024 = 2
  10. set *(unsigned long *)0x00ef4020 = 1
  11. set *(unsigned long *)0x00ef4010 = 0
  12. set *(unsigned long *)0x00ef4014 = 0
  13. set *(unsigned long *)0x00ef4004 = 0x1
  14. shell sleep 0.1
  15. set *(unsigned long *)0x00ef4008 = 0x0200
  16. # set *(unsigned long *)0x00ef4008 = 0x0201
  17. end
  18. # clk xin:cpu:bif:bus=1:4:1:1
  19. define clock_init_on_1411
  20. set *(unsigned long *)0x00ef4024 = 2
  21. set *(unsigned long *)0x00ef4020 = 2
  22. set *(unsigned long *)0x00ef4010 = 0
  23. set *(unsigned long *)0x00ef4014 = 0
  24. set *(unsigned long *)0x00ef4004 = 0x1
  25. shell sleep 0.1
  26. set *(unsigned long *)0x00ef4008 = 0x0200
  27. end
  28. # clk xin:cpu:bif:bus=1:4:2:1
  29. define clock_init_on_1421
  30. set *(unsigned long *)0x00ef4024 = 2
  31. set *(unsigned long *)0x00ef4020 = 1
  32. set *(unsigned long *)0x00ef4010 = 0
  33. set *(unsigned long *)0x00ef4014 = 0
  34. set *(unsigned long *)0x00ef4004 = 0x1
  35. shell sleep 0.1
  36. set *(unsigned long *)0x00ef4008 = 0x0200
  37. end
  38. # clk xin:cpu:bif:bus=1:8:2:1
  39. define clock_init_on_1821
  40. set *(unsigned long *)0x00ef4024 = 3
  41. set *(unsigned long *)0x00ef4020 = 2
  42. set *(unsigned long *)0x00ef4010 = 0
  43. set *(unsigned long *)0x00ef4014 = 0
  44. set *(unsigned long *)0x00ef4004 = 0x3
  45. shell sleep 0.1
  46. set *(unsigned long *)0x00ef4008 = 0x0200
  47. end
  48. # clk xin:cpu:bif:bus=1:8:4:1
  49. define clock_init_on_1841
  50. set *(unsigned long *)0x00ef4024 = 3
  51. set *(unsigned long *)0x00ef4020 = 1
  52. set *(unsigned long *)0x00ef4010 = 0
  53. set *(unsigned long *)0x00ef4014 = 0
  54. set *(unsigned long *)0x00ef4004 = 0x3
  55. shell sleep 0.1
  56. set *(unsigned long *)0x00ef4008 = 0x0200
  57. end
  58. # clk xin:cpu:bif:bus=1:16:8:1
  59. define clock_init_on_11681
  60. set *(unsigned long *)0x00ef4024 = 4
  61. set *(unsigned long *)0x00ef4020 = 2
  62. set *(unsigned long *)0x00ef4010 = 0
  63. set *(unsigned long *)0x00ef4014 = 0
  64. set *(unsigned long *)0x00ef4004 = 0x7
  65. shell sleep 0.1
  66. set *(unsigned long *)0x00ef4008 = 0x0200
  67. end
  68. # clk xin:cpu:bif:bus=1:1:1:1
  69. define clock_init_off
  70. # CPU
  71. set *(unsigned long *)0x00ef4010 = 0
  72. set *(unsigned long *)0x00ef4014 = 0
  73. # BIF
  74. set *(unsigned long *)0x00ef4020 = 0
  75. # BUS
  76. set *(unsigned long *)0x00ef4024 = 0
  77. # PLL
  78. set *(unsigned long *)0x00ef4008 = 0x0000
  79. end
  80. # Initialize programmable ports
  81. define port_init
  82. set $sfrbase = 0x00ef0000
  83. set *(unsigned short *)0x00ef1060 = 0x5555
  84. set *(unsigned short *)0x00ef1062 = 0x5555
  85. set *(unsigned short *)0x00ef1064 = 0x5555
  86. set *(unsigned short *)0x00ef1066 = 0x5555
  87. set *(unsigned short *)0x00ef1068 = 0x5555
  88. set *(unsigned short *)0x00ef106a = 0x0000
  89. set *(unsigned short *)0x00ef106e = 0x5555
  90. set *(unsigned short *)0x00ef1070 = 0x5555
  91. # LED ON
  92. set *(unsigned char *)($sfrbase + 0x1015) = 0xff
  93. set *(unsigned char *)($sfrbase + 0x1085) = 0xff
  94. shell sleep 0.1
  95. # LED OFF
  96. set *(unsigned char *)($sfrbase + 0x1085) = 0x00
  97. end
  98. document port_init
  99. P5=LED(output), P6.b4=LAN_RESET(output)
  100. end
  101. # Initialize SDRAM controller for Mappi
  102. define sdram_init
  103. # SDIR0
  104. set *(unsigned long *)0x00ef6008 = 0x00000182
  105. # SDIR1
  106. set *(unsigned long *)0x00ef600c = 0x00000001
  107. # Initialize wait
  108. shell sleep 0.1
  109. # Ch0-MOD
  110. set *(unsigned long *)0x00ef602c = 0x00000020
  111. # Ch0-TR
  112. set *(unsigned long *)0x00ef6028 = 0x00010002
  113. # Ch0-ADR
  114. set *(unsigned long *)0x00ef6020 = 0x08000004
  115. # AutoRef On
  116. set *(unsigned long *)0x00ef6004 = 0x00010107
  117. # Access enable
  118. set *(unsigned long *)0x00ef6024 = 0x00000001
  119. end
  120. document sdram_init
  121. Mappi SDRAM controller initialization
  122. 0x08000000 - 0x0bffffff (64MB)
  123. end
  124. # Initialize LAN controller for Mappi
  125. define lanc_init
  126. set $sfrbase = 0x00ef0000
  127. # Set BSEL3 (BSEL3 for the Chaos's bselc)
  128. # set *(unsigned long *)($sfrbase + 0x5300) = 0x01018040
  129. # set *(unsigned long *)($sfrbase + 0x5304) = 0x01011101
  130. set *(unsigned long *)($sfrbase + 0x5300) = 0x04048000
  131. set *(unsigned long *)($sfrbase + 0x5304) = 0x01011103
  132. set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
  133. # Reset (P5=LED,P6.b4=LAN_RESET)
  134. set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
  135. set *(unsigned char *)($sfrbase + 0x1016) = 0xff
  136. set *(unsigned char *)($sfrbase + 0x1086) = 0xff
  137. shell sleep 0.1
  138. # set *(unsigned char *)($sfrbase + 0x1086) = 0x00
  139. set *(unsigned char *)($sfrbase + 0x1086) = 0x04
  140. set *(unsigned long *)(0x0c000330) = 0xffffffff
  141. # Set mac address
  142. set $lanc = (void*)0x0c000300
  143. set *(unsigned long *)($lanc + 0x0000) = 0x00610010
  144. set *(unsigned long *)($lanc + 0x0004) = 0x00200030
  145. set *(unsigned long *)($lanc + 0x0008) = 0x00400050
  146. set *(unsigned long *)($lanc + 0x000c) = 0x00600007
  147. end
  148. document lanc_init
  149. Mappi LAN controller initialization
  150. ex.) MAC address: 10 20 30 40 50 60
  151. end
  152. # LCD & CRT dual-head setting (8bpp)
  153. define dispc_init
  154. set $sfrbase = 0x00ef0000
  155. # BSEL4 Dispc
  156. # 20MHz
  157. # set *(unsigned long *)($sfrbase + 0x5400) = 0x02028282
  158. # set *(unsigned long *)($sfrbase + 0x5404) = 0x00122202
  159. # 40MHz
  160. set *(unsigned long *)($sfrbase + 0x5400) = 0x04048000
  161. set *(unsigned long *)($sfrbase + 0x5404) = 0x00101103
  162. end
  163. # MMU enable
  164. define mmu_enable
  165. set $evb=0x88000000
  166. set *(unsigned long *)0xffff0024=1
  167. end
  168. # MMU disable
  169. define mmu_disable
  170. set $evb=0
  171. set *(unsigned long *)0xffff0024=0
  172. end
  173. # Show TLB entries
  174. define show_tlb_entries
  175. set $i = 0
  176. set $addr = $arg0
  177. use_mon_code
  178. while ($i < 0d32 )
  179. set $tlb_tag = *(unsigned long*)$addr
  180. set $tlb_data = *(unsigned long*)($addr + 4)
  181. printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
  182. set $i = $i + 1
  183. set $addr = $addr + 8
  184. end
  185. use_debug_dma
  186. end
  187. define itlb
  188. set $itlb=0xfe000000
  189. show_tlb_entries $itlb
  190. end
  191. define dtlb
  192. set $dtlb=0xfe000800
  193. show_tlb_entries $dtlb
  194. end
  195. # Show current task structure
  196. define show_current
  197. set $current = $spi & 0xffffe000
  198. printf "$current=0x%08lX\n",$current
  199. print *(struct task_struct *)$current
  200. end
  201. # Show user assigned task structure
  202. define show_task
  203. set $task = $arg0 & 0xffffe000
  204. printf "$task=0x%08lX\n",$task
  205. print *(struct task_struct *)$task
  206. end
  207. document show_task
  208. Show user assigned task structure
  209. arg0 : task structure address
  210. end
  211. # Show M32R registers
  212. define show_regs
  213. printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
  214. printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7
  215. printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11
  216. printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$fp
  217. printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
  218. printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
  219. printf "EVB[0x%08lX]\n",$evb
  220. end
  221. # Setup all
  222. define setup
  223. use_mon_code
  224. set *(unsigned int)0xfffffffc=0x60
  225. shell sleep 0.1
  226. # clock_init_on_1411
  227. clock_init_on_1421
  228. # clock_init_on_1821
  229. # clock_init_on_1841
  230. # clock_init_on_11681
  231. # clock_init_off
  232. shell sleep 0.1
  233. port_init
  234. sdram_init
  235. lanc_init
  236. dispc_init
  237. set $evb=0x08000000
  238. end
  239. # Load modules
  240. define load_modules
  241. use_debug_dma
  242. load
  243. # load ramdisk_082a0000.mot
  244. # load romfs_082a0000.mot
  245. # use_mon_code
  246. end
  247. # Set kernel parameters
  248. define set_kernel_parameters
  249. set $param = (void*)0x08001000
  250. # INITRD_START
  251. # set *(unsigned long *)($param + 0x0010) = 0x082a0000
  252. # INITRD_SIZE
  253. # set *(unsigned long *)($param + 0x0014) = 0x00000000
  254. # M32R_CPUCLK
  255. set *(unsigned long *)($param + 0x0018) = 0d160000000
  256. # set *(unsigned long *)($param + 0x0018) = 0d80000000
  257. # set *(unsigned long *)($param + 0x0018) = 0d40000000
  258. # M32R_BUSCLK
  259. set *(unsigned long *)($param + 0x001c) = 0d40000000
  260. # M32R_TIMER_DIVIDE
  261. set *(unsigned long *)($param + 0x0020) = 0d128
  262. set {char[0x200]}($param + 0x100) = "console=tty1 console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
  263. # set {char[0x200]}($param + 0x100) = "console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
  264. end
  265. # Boot
  266. define boot
  267. set_kernel_parameters
  268. set $pc=0x08002000
  269. set *(unsigned char *)0x08001003=0x03
  270. si
  271. c
  272. end
  273. # Set breakpoints
  274. define set_breakpoints
  275. b *0x08000030
  276. end
  277. ## Boot MP
  278. define boot_mp
  279. set_kernel_parameters
  280. set *(unsigned long *)0x00f00000 = boot - 0x80000000
  281. set *(unsigned long *)0x00eff2f8 = 0x2
  282. x 0x00eff2f8
  283. set $pc=0x08002000
  284. si
  285. c
  286. end
  287. document boot_mp
  288. Boot BSP
  289. end
  290. ## Boot UP
  291. define boot_up
  292. set_kernel_parameters
  293. set $pc=0x08002000
  294. si
  295. c
  296. end
  297. document boot_up
  298. Boot BSP
  299. end
  300. # Restart
  301. define restart
  302. sdireset
  303. sdireset
  304. setup
  305. load_modules
  306. boot_mp
  307. end
  308. sdireset
  309. sdireset
  310. file vmlinux
  311. target m32rsdi
  312. setup