barrier_64.h 1.9 KB

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  1. #ifndef __SPARC64_BARRIER_H
  2. #define __SPARC64_BARRIER_H
  3. /* These are here in an effort to more fully work around Spitfire Errata
  4. * #51. Essentially, if a memory barrier occurs soon after a mispredicted
  5. * branch, the chip can stop executing instructions until a trap occurs.
  6. * Therefore, if interrupts are disabled, the chip can hang forever.
  7. *
  8. * It used to be believed that the memory barrier had to be right in the
  9. * delay slot, but a case has been traced recently wherein the memory barrier
  10. * was one instruction after the branch delay slot and the chip still hung.
  11. * The offending sequence was the following in sym_wakeup_done() of the
  12. * sym53c8xx_2 driver:
  13. *
  14. * call sym_ccb_from_dsa, 0
  15. * movge %icc, 0, %l0
  16. * brz,pn %o0, .LL1303
  17. * mov %o0, %l2
  18. * membar #LoadLoad
  19. *
  20. * The branch has to be mispredicted for the bug to occur. Therefore, we put
  21. * the memory barrier explicitly into a "branch always, predicted taken"
  22. * delay slot to avoid the problem case.
  23. */
  24. #define membar_safe(type) \
  25. do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
  26. " membar " type "\n" \
  27. "1:\n" \
  28. : : : "memory"); \
  29. } while (0)
  30. /* The kernel always executes in TSO memory model these days,
  31. * and furthermore most sparc64 chips implement more stringent
  32. * memory ordering than required by the specifications.
  33. */
  34. #define mb() membar_safe("#StoreLoad")
  35. #define rmb() __asm__ __volatile__("":::"memory")
  36. #define wmb() __asm__ __volatile__("":::"memory")
  37. #define __smp_store_release(p, v) \
  38. do { \
  39. compiletime_assert_atomic_type(*p); \
  40. barrier(); \
  41. WRITE_ONCE(*p, v); \
  42. } while (0)
  43. #define __smp_load_acquire(p) \
  44. ({ \
  45. typeof(*p) ___p1 = READ_ONCE(*p); \
  46. compiletime_assert_atomic_type(*p); \
  47. barrier(); \
  48. ___p1; \
  49. })
  50. #define __smp_mb__before_atomic() barrier()
  51. #define __smp_mb__after_atomic() barrier()
  52. #include <asm-generic/barrier.h>
  53. #endif /* !(__SPARC64_BARRIER_H) */