leon_amba.h 8.0 KB

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  1. /*
  2. *Copyright (C) 2004 Konrad Eisele ([email protected],[email protected]), Gaisler Research
  3. *Copyright (C) 2004 Stefan Holst ([email protected]), Uni-Stuttgart
  4. *Copyright (C) 2009 Daniel Hellstrom ([email protected]),Konrad Eisele ([email protected]) Aeroflex Gaisler AB
  5. */
  6. #ifndef LEON_AMBA_H_INCLUDE
  7. #define LEON_AMBA_H_INCLUDE
  8. #ifndef __ASSEMBLY__
  9. struct amba_prom_registers {
  10. unsigned int phys_addr; /* The physical address of this register */
  11. unsigned int reg_size; /* How many bytes does this register take up? */
  12. };
  13. #endif
  14. /*
  15. * The following defines the bits in the LEON UART Status Registers.
  16. */
  17. #define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */
  18. #define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
  19. #define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
  20. #define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */
  21. #define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */
  22. #define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */
  23. #define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
  24. #define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
  25. /*
  26. * The following defines the bits in the LEON UART Ctrl Registers.
  27. */
  28. #define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */
  29. #define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */
  30. #define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
  31. #define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter irq */
  32. #define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */
  33. #define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */
  34. #define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */
  35. #define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */
  36. #define LEON3_GPTIMER_EN 1
  37. #define LEON3_GPTIMER_RL 2
  38. #define LEON3_GPTIMER_LD 4
  39. #define LEON3_GPTIMER_IRQEN 8
  40. #define LEON3_GPTIMER_SEPIRQ 8
  41. #define LEON3_GPTIMER_TIMERS 0x7
  42. #define LEON23_REG_TIMER_CONTROL_EN 0x00000001 /* 1 = enable counting */
  43. /* 0 = hold scalar and counter */
  44. #define LEON23_REG_TIMER_CONTROL_RL 0x00000002 /* 1 = reload at 0 */
  45. /* 0 = stop at 0 */
  46. #define LEON23_REG_TIMER_CONTROL_LD 0x00000004 /* 1 = load counter */
  47. /* 0 = no function */
  48. #define LEON23_REG_TIMER_CONTROL_IQ 0x00000008 /* 1 = irq enable */
  49. /* 0 = no function */
  50. /*
  51. * The following defines the bits in the LEON PS/2 Status Registers.
  52. */
  53. #define LEON_REG_PS2_STATUS_DR 0x00000001 /* Data Ready */
  54. #define LEON_REG_PS2_STATUS_PE 0x00000002 /* Parity error */
  55. #define LEON_REG_PS2_STATUS_FE 0x00000004 /* Framing error */
  56. #define LEON_REG_PS2_STATUS_KI 0x00000008 /* Keyboard inhibit */
  57. #define LEON_REG_PS2_STATUS_RF 0x00000010 /* RX buffer full */
  58. #define LEON_REG_PS2_STATUS_TF 0x00000020 /* TX buffer full */
  59. /*
  60. * The following defines the bits in the LEON PS/2 Ctrl Registers.
  61. */
  62. #define LEON_REG_PS2_CTRL_RE 0x00000001 /* Receiver enable */
  63. #define LEON_REG_PS2_CTRL_TE 0x00000002 /* Transmitter enable */
  64. #define LEON_REG_PS2_CTRL_RI 0x00000004 /* Keyboard receive irq */
  65. #define LEON_REG_PS2_CTRL_TI 0x00000008 /* Keyboard transmit irq */
  66. #define LEON3_IRQMPSTATUS_CPUNR 28
  67. #define LEON3_IRQMPSTATUS_BROADCAST 27
  68. #define GPTIMER_CONFIG_IRQNT(a) (((a) >> 3) & 0x1f)
  69. #define GPTIMER_CONFIG_ISSEP(a) ((a) & (1 << 8))
  70. #define GPTIMER_CONFIG_NTIMERS(a) ((a) & (0x7))
  71. #define LEON3_GPTIMER_CTRL_PENDING 0x10
  72. #define LEON3_GPTIMER_CONFIG_NRTIMERS(c) ((c)->config & 0x7)
  73. #define LEON3_GPTIMER_CTRL_ISPENDING(r) (((r)&LEON3_GPTIMER_CTRL_PENDING) ? 1 : 0)
  74. #ifndef __ASSEMBLY__
  75. struct leon3_irqctrl_regs_map {
  76. u32 ilevel;
  77. u32 ipend;
  78. u32 iforce;
  79. u32 iclear;
  80. u32 mpstatus;
  81. u32 mpbroadcast;
  82. u32 notused02;
  83. u32 notused03;
  84. u32 ampctrl;
  85. u32 icsel[2];
  86. u32 notused13;
  87. u32 notused20;
  88. u32 notused21;
  89. u32 notused22;
  90. u32 notused23;
  91. u32 mask[16];
  92. u32 force[16];
  93. /* Extended IRQ registers */
  94. u32 intid[16]; /* 0xc0 */
  95. u32 unused[(0x1000-0x100)/4];
  96. };
  97. struct leon3_apbuart_regs_map {
  98. u32 data;
  99. u32 status;
  100. u32 ctrl;
  101. u32 scaler;
  102. };
  103. struct leon3_gptimerelem_regs_map {
  104. u32 val;
  105. u32 rld;
  106. u32 ctrl;
  107. u32 unused;
  108. };
  109. struct leon3_gptimer_regs_map {
  110. u32 scalar;
  111. u32 scalar_reload;
  112. u32 config;
  113. u32 unused;
  114. struct leon3_gptimerelem_regs_map e[8];
  115. };
  116. /*
  117. * Types and structure used for AMBA Plug & Play bus scanning
  118. */
  119. #define AMBA_MAXAPB_DEVS 64
  120. #define AMBA_MAXAPB_DEVS_PERBUS 16
  121. struct amba_device_table {
  122. int devnr; /* number of devices on AHB or APB bus */
  123. unsigned int *addr[16]; /* addresses to the devices configuration tables */
  124. unsigned int allocbits[1]; /* 0=unallocated, 1=allocated driver */
  125. };
  126. struct amba_apbslv_device_table {
  127. int devnr; /* number of devices on AHB or APB bus */
  128. unsigned int *addr[AMBA_MAXAPB_DEVS]; /* addresses to the devices configuration tables */
  129. unsigned int apbmst[AMBA_MAXAPB_DEVS]; /* apb master if a entry is a apb slave */
  130. unsigned int apbmstidx[AMBA_MAXAPB_DEVS]; /* apb master idx if a entry is a apb slave */
  131. unsigned int allocbits[4]; /* 0=unallocated, 1=allocated driver */
  132. };
  133. struct amba_confarea_type {
  134. struct amba_confarea_type *next;/* next bus in chain */
  135. struct amba_device_table ahbmst;
  136. struct amba_device_table ahbslv;
  137. struct amba_apbslv_device_table apbslv;
  138. unsigned int apbmst;
  139. };
  140. /* collect apb slaves */
  141. struct amba_apb_device {
  142. unsigned int start, irq, bus_id;
  143. struct amba_confarea_type *bus;
  144. };
  145. /* collect ahb slaves */
  146. struct amba_ahb_device {
  147. unsigned int start[4], irq, bus_id;
  148. struct amba_confarea_type *bus;
  149. };
  150. struct device_node;
  151. void _amba_init(struct device_node *dp, struct device_node ***nextp);
  152. extern unsigned long amba_system_id;
  153. extern struct leon3_irqctrl_regs_map *leon3_irqctrl_regs;
  154. extern struct leon3_gptimer_regs_map *leon3_gptimer_regs;
  155. extern struct amba_apb_device leon_percpu_timer_dev[16];
  156. extern int leondebug_irq_disable;
  157. extern int leon_debug_irqout;
  158. extern unsigned long leon3_gptimer_irq;
  159. extern unsigned int sparc_leon_eirq;
  160. #endif /* __ASSEMBLY__ */
  161. #define LEON3_IO_AREA 0xfff00000
  162. #define LEON3_CONF_AREA 0xff000
  163. #define LEON3_AHB_SLAVE_CONF_AREA (1 << 11)
  164. #define LEON3_AHB_CONF_WORDS 8
  165. #define LEON3_APB_CONF_WORDS 2
  166. #define LEON3_AHB_MASTERS 16
  167. #define LEON3_AHB_SLAVES 16
  168. #define LEON3_APB_SLAVES 16
  169. #define LEON3_APBUARTS 8
  170. /* Vendor codes */
  171. #define VENDOR_GAISLER 1
  172. #define VENDOR_PENDER 2
  173. #define VENDOR_ESA 4
  174. #define VENDOR_OPENCORES 8
  175. /* Gaisler Research device id's */
  176. #define GAISLER_LEON3 0x003
  177. #define GAISLER_LEON3DSU 0x004
  178. #define GAISLER_ETHAHB 0x005
  179. #define GAISLER_APBMST 0x006
  180. #define GAISLER_AHBUART 0x007
  181. #define GAISLER_SRCTRL 0x008
  182. #define GAISLER_SDCTRL 0x009
  183. #define GAISLER_APBUART 0x00C
  184. #define GAISLER_IRQMP 0x00D
  185. #define GAISLER_AHBRAM 0x00E
  186. #define GAISLER_GPTIMER 0x011
  187. #define GAISLER_PCITRG 0x012
  188. #define GAISLER_PCISBRG 0x013
  189. #define GAISLER_PCIFBRG 0x014
  190. #define GAISLER_PCITRACE 0x015
  191. #define GAISLER_PCIDMA 0x016
  192. #define GAISLER_AHBTRACE 0x017
  193. #define GAISLER_ETHDSU 0x018
  194. #define GAISLER_PIOPORT 0x01A
  195. #define GAISLER_GRGPIO 0x01A
  196. #define GAISLER_AHBJTAG 0x01c
  197. #define GAISLER_ETHMAC 0x01D
  198. #define GAISLER_AHB2AHB 0x020
  199. #define GAISLER_USBDC 0x021
  200. #define GAISLER_ATACTRL 0x024
  201. #define GAISLER_DDRSPA 0x025
  202. #define GAISLER_USBEHC 0x026
  203. #define GAISLER_USBUHC 0x027
  204. #define GAISLER_I2CMST 0x028
  205. #define GAISLER_SPICTRL 0x02D
  206. #define GAISLER_DDR2SPA 0x02E
  207. #define GAISLER_SPIMCTRL 0x045
  208. #define GAISLER_LEON4 0x048
  209. #define GAISLER_LEON4DSU 0x049
  210. #define GAISLER_AHBSTAT 0x052
  211. #define GAISLER_FTMCTRL 0x054
  212. #define GAISLER_KBD 0x060
  213. #define GAISLER_VGA 0x061
  214. #define GAISLER_SVGA 0x063
  215. #define GAISLER_GRSYSMON 0x066
  216. #define GAISLER_GRACECTRL 0x067
  217. #define GAISLER_L2TIME 0xffd /* internal device: leon2 timer */
  218. #define GAISLER_L2C 0xffe /* internal device: leon2compat */
  219. #define GAISLER_PLUGPLAY 0xfff /* internal device: plug & play configarea */
  220. /* Chip IDs */
  221. #define AEROFLEX_UT699 0x0699
  222. #define LEON4_NEXTREME1 0x0102
  223. #define GAISLER_GR712RC 0x0712
  224. #define amba_vendor(x) (((x) >> 24) & 0xff)
  225. #define amba_device(x) (((x) >> 12) & 0xfff)
  226. #endif