btfm_slim_wcn3990.h 4.9 KB

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  1. /* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #ifndef BTFM_SLIM_WCN3990_H
  13. #define BTFM_SLIM_WCN3990_H
  14. //#ifdef CONFIG_BTFM_SLIM_WCN3990
  15. #include "btfm_slim.h"
  16. /* Registers Address */
  17. #define CHRK_SB_COMP_TEST 0x00000000
  18. #define CHRK_SB_SLAVE_HW_REV_MSB 0x00000001
  19. #define CHRK_SB_SLAVE_HW_REV_LSB 0x00000002
  20. #define CHRK_SB_DEBUG_FEATURES 0x00000005
  21. #define CHRK_SB_INTF_INT_EN 0x00000010
  22. #define CHRK_SB_INTF_INT_STATUS 0x00000011
  23. #define CHRK_SB_INTF_INT_CLR 0x00000012
  24. #define CHRK_SB_FRM_CFG 0x00000013
  25. #define CHRK_SB_FRM_STATUS 0x00000014
  26. #define CHRK_SB_FRM_INT_EN 0x00000015
  27. #define CHRK_SB_FRM_INT_STATUS 0x00000016
  28. #define CHRK_SB_FRM_INT_CLR 0x00000017
  29. #define CHRK_SB_FRM_WAKEUP 0x00000018
  30. #define CHRK_SB_FRM_CLKCTL_DONE 0x00000019
  31. #define CHRK_SB_FRM_IE_STATUS 0x0000001A
  32. #define CHRK_SB_FRM_VE_STATUS 0x0000001B
  33. #define CHRK_SB_PGD_TX_CFG_STATUS 0x00000020
  34. #define CHRK_SB_PGD_RX_CFG_STATUS 0x00000021
  35. #define CHRK_SB_PGD_DEV_INT_EN 0x00000022
  36. #define CHRK_SB_PGD_DEV_INT_STATUS 0x00000023
  37. #define CHRK_SB_PGD_DEV_INT_CLR 0x00000024
  38. #define CHRK_SB_PGD_PORT_INT_EN_RX_0 0x00000030
  39. #define CHRK_SB_PGD_PORT_INT_EN_RX_1 0x00000031
  40. #define CHRK_SB_PGD_PORT_INT_EN_TX_0 0x00000032
  41. #define CHRK_SB_PGD_PORT_INT_EN_TX_1 0x00000033
  42. #define CHRK_SB_PGD_PORT_INT_STATUS_RX_0 0x00000034
  43. #define CHRK_SB_PGD_PORT_INT_STATUS_RX_1 0x00000035
  44. #define CHRK_SB_PGD_PORT_INT_STATUS_TX_0 0x00000036
  45. #define CHRK_SB_PGD_PORT_INT_STATUS_TX_1 0x00000037
  46. #define CHRK_SB_PGD_PORT_INT_CLR_RX_0 0x00000038
  47. #define CHRK_SB_PGD_PORT_INT_CLR_RX_1 0x00000039
  48. #define CHRK_SB_PGD_PORT_INT_CLR_TX_0 0x0000003A
  49. #define CHRK_SB_PGD_PORT_INT_CLR_TX_1 0x0000003B
  50. #define CHRK_SB_PGD_PORT_RX_CFGN(n) (0x00000040 + n)
  51. #define CHRK_SB_PGD_PORT_TX_CFGN(n) (0x00000050 + n)
  52. #define CHRK_SB_PGD_PORT_INT_RX_SOURCEN(n) (0x00000060 + n)
  53. #define CHRK_SB_PGD_PORT_INT_TX_SOURCEN(n) (0x00000070 + n)
  54. #define CHRK_SB_PGD_PORT_RX_STATUSN(n) (0x00000080 + n)
  55. #define CHRK_SB_PGD_PORT_TX_STATUSN(n) (0x00000090 + n)
  56. #define CHRK_SB_PGD_TX_PORTn_MULTI_CHNL_0(n) (0x00000100 + 0x4*n)
  57. #define CHRK_SB_PGD_TX_PORTn_MULTI_CHNL_1(n) (0x00000101 + 0x4*n)
  58. #define CHRK_SB_PGD_RX_PORTn_MULTI_CHNL_0(n) (0x00000180 + 0x4*n)
  59. #define CHRK_SB_PGD_RX_PORTn_MULTI_CHNL_1(n) (0x00000181 + 0x4*n)
  60. #define CHRK_SB_PGD_PORT_TX_OR_UR_CFGN(n) (0x000001F0 + n)
  61. /* Register Bit Setting */
  62. #define CHRK_ENABLE_OVERRUN_AUTO_RECOVERY (0x1 << 1)
  63. #define CHRK_ENABLE_UNDERRUN_AUTO_RECOVERY (0x1 << 0)
  64. #define CHRK_SB_PGD_PORT_ENABLE (0x1 << 0)
  65. #define CHRK_SB_PGD_PORT_DISABLE (0x0 << 0)
  66. #define CHRK_SB_PGD_PORT_WM_L1 (0x1 << 1)
  67. #define CHRK_SB_PGD_PORT_WM_L2 (0x2 << 1)
  68. #define CHRK_SB_PGD_PORT_WM_L3 (0x3 << 1)
  69. #define CHRK_SB_PGD_PORT_WM_L8 (0x8 << 1)
  70. #define CHRK_SB_PGD_PORT_WM_LB (0xB << 1)
  71. #define CHRK_SB_PGD_PORT_RX_NUM 16
  72. #define CHRK_SB_PGD_PORT_TX_NUM 16
  73. /* PGD Port Map */
  74. #define CHRK_SB_PGD_PORT_TX_SCO 0
  75. #define CHRK_SB_PGD_PORT_TX1_FM 1
  76. #define CHRK_SB_PGD_PORT_TX2_FM 2
  77. #define CHRK_SB_PGD_PORT_RX_SCO 16
  78. #define CHRK_SB_PGD_PORT_RX_A2P 17
  79. /* Function Prototype */
  80. /*
  81. * btfm_slim_chrk_hw_init: Initialize wcn3990 specific slimbus slave device
  82. * @btfmslim: slimbus slave device data pointer.
  83. * Returns:
  84. * 0: Success
  85. * else: Fail
  86. */
  87. int btfm_slim_chrk_hw_init(struct btfmslim *btfmslim);
  88. /*
  89. * btfm_slim_chrk_enable_rxport: Enable wcn3990 Rx port by given port number
  90. * @btfmslim: slimbus slave device data pointer.
  91. * @portNum: slimbus slave port number to enable
  92. * @rxport: rxport or txport
  93. * @enable: enable port or disable port
  94. * Returns:
  95. * 0: Success
  96. * else: Fail
  97. */
  98. int btfm_slim_chrk_enable_port(struct btfmslim *btfmslim, uint8_t portNum,
  99. uint8_t rxport, uint8_t enable);
  100. /* Specific defines for wcn3990 slimbus device */
  101. #define WCN3990_SLIM_REG_OFFSET 0x0800
  102. #ifdef SLIM_SLAVE_REG_OFFSET
  103. #undef SLIM_SLAVE_REG_OFFSET
  104. #define SLIM_SLAVE_REG_OFFSET WCN3990_SLIM_REG_OFFSET
  105. #endif
  106. /* Assign vendor specific function */
  107. extern struct btfmslim_ch wcn3990_txport[];
  108. extern struct btfmslim_ch wcn3990_rxport[];
  109. #ifdef SLIM_SLAVE_RXPORT
  110. #undef SLIM_SLAVE_RXPORT
  111. #define SLIM_SLAVE_RXPORT (&wcn3990_rxport[0])
  112. #endif
  113. #ifdef SLIM_SLAVE_TXPORT
  114. #undef SLIM_SLAVE_TXPORT
  115. #define SLIM_SLAVE_TXPORT (&wcn3990_txport[0])
  116. #endif
  117. #ifdef SLIM_SLAVE_INIT
  118. #undef SLIM_SLAVE_INIT
  119. #define SLIM_SLAVE_INIT btfm_slim_chrk_hw_init
  120. #endif
  121. #ifdef SLIM_SLAVE_PORT_EN
  122. #undef SLIM_SLAVE_PORT_EN
  123. #define SLIM_SLAVE_PORT_EN btfm_slim_chrk_enable_port
  124. #endif
  125. //#endif /* CONFIG_BTFM_WCN3990 */
  126. #endif /* BTFM_SLIM_WCN3990_H */