qcedev.c 57 KB

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  1. /*
  2. * QTI CE device driver.
  3. *
  4. * Copyright (c) 2010-2018, The Linux Foundation. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 and
  8. * only version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/mman.h>
  16. #include <linux/types.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/kernel.h>
  20. #include <linux/dmapool.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/init.h>
  24. #include <linux/module.h>
  25. #include <linux/fs.h>
  26. #include <linux/miscdevice.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/debugfs.h>
  29. #include <linux/scatterlist.h>
  30. #include <linux/crypto.h>
  31. #include <linux/platform_data/qcom_crypto_device.h>
  32. #include <linux/msm-bus.h>
  33. #include <linux/qcedev.h>
  34. #include <crypto/hash.h>
  35. #include "qcedevi.h"
  36. #include "qce.h"
  37. #include "qcedev_smmu.h"
  38. #include <linux/compat.h>
  39. #include "compat_qcedev.h"
  40. #define CACHE_LINE_SIZE 32
  41. #define CE_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE
  42. static uint8_t _std_init_vector_sha1_uint8[] = {
  43. 0x67, 0x45, 0x23, 0x01, 0xEF, 0xCD, 0xAB, 0x89,
  44. 0x98, 0xBA, 0xDC, 0xFE, 0x10, 0x32, 0x54, 0x76,
  45. 0xC3, 0xD2, 0xE1, 0xF0
  46. };
  47. /* standard initialization vector for SHA-256, source: FIPS 180-2 */
  48. static uint8_t _std_init_vector_sha256_uint8[] = {
  49. 0x6A, 0x09, 0xE6, 0x67, 0xBB, 0x67, 0xAE, 0x85,
  50. 0x3C, 0x6E, 0xF3, 0x72, 0xA5, 0x4F, 0xF5, 0x3A,
  51. 0x51, 0x0E, 0x52, 0x7F, 0x9B, 0x05, 0x68, 0x8C,
  52. 0x1F, 0x83, 0xD9, 0xAB, 0x5B, 0xE0, 0xCD, 0x19
  53. };
  54. static DEFINE_MUTEX(send_cmd_lock);
  55. static DEFINE_MUTEX(qcedev_sent_bw_req);
  56. static DEFINE_MUTEX(hash_access_lock);
  57. MODULE_DEVICE_TABLE(of, qcedev_match);
  58. static const struct of_device_id qcedev_match[] = {
  59. { .compatible = "qcom,qcedev"},
  60. { .compatible = "qcom,qcedev,context-bank"},
  61. {}
  62. };
  63. static int qcedev_control_clocks(struct qcedev_control *podev, bool enable)
  64. {
  65. unsigned int control_flag;
  66. int ret = 0;
  67. if (podev->ce_support.req_bw_before_clk) {
  68. if (enable)
  69. control_flag = QCE_BW_REQUEST_FIRST;
  70. else
  71. control_flag = QCE_CLK_DISABLE_FIRST;
  72. } else {
  73. if (enable)
  74. control_flag = QCE_CLK_ENABLE_FIRST;
  75. else
  76. control_flag = QCE_BW_REQUEST_RESET_FIRST;
  77. }
  78. switch (control_flag) {
  79. case QCE_CLK_ENABLE_FIRST:
  80. ret = qce_enable_clk(podev->qce);
  81. if (ret) {
  82. pr_err("%s Unable enable clk\n", __func__);
  83. return ret;
  84. }
  85. ret = msm_bus_scale_client_update_request(
  86. podev->bus_scale_handle, 1);
  87. if (ret) {
  88. pr_err("%s Unable to set high bw\n", __func__);
  89. ret = qce_disable_clk(podev->qce);
  90. if (ret)
  91. pr_err("%s Unable disable clk\n", __func__);
  92. return ret;
  93. }
  94. break;
  95. case QCE_BW_REQUEST_FIRST:
  96. ret = msm_bus_scale_client_update_request(
  97. podev->bus_scale_handle, 1);
  98. if (ret) {
  99. pr_err("%s Unable to set high bw\n", __func__);
  100. return ret;
  101. }
  102. ret = qce_enable_clk(podev->qce);
  103. if (ret) {
  104. pr_err("%s Unable enable clk\n", __func__);
  105. ret = msm_bus_scale_client_update_request(
  106. podev->bus_scale_handle, 0);
  107. if (ret)
  108. pr_err("%s Unable to set low bw\n", __func__);
  109. return ret;
  110. }
  111. break;
  112. case QCE_CLK_DISABLE_FIRST:
  113. ret = qce_disable_clk(podev->qce);
  114. if (ret) {
  115. pr_err("%s Unable to disable clk\n", __func__);
  116. return ret;
  117. }
  118. ret = msm_bus_scale_client_update_request(
  119. podev->bus_scale_handle, 0);
  120. if (ret) {
  121. pr_err("%s Unable to set low bw\n", __func__);
  122. ret = qce_enable_clk(podev->qce);
  123. if (ret)
  124. pr_err("%s Unable enable clk\n", __func__);
  125. return ret;
  126. }
  127. break;
  128. case QCE_BW_REQUEST_RESET_FIRST:
  129. ret = msm_bus_scale_client_update_request(
  130. podev->bus_scale_handle, 0);
  131. if (ret) {
  132. pr_err("%s Unable to set low bw\n", __func__);
  133. return ret;
  134. }
  135. ret = qce_disable_clk(podev->qce);
  136. if (ret) {
  137. pr_err("%s Unable to disable clk\n", __func__);
  138. ret = msm_bus_scale_client_update_request(
  139. podev->bus_scale_handle, 1);
  140. if (ret)
  141. pr_err("%s Unable to set high bw\n", __func__);
  142. return ret;
  143. }
  144. break;
  145. default:
  146. return -ENOENT;
  147. }
  148. return 0;
  149. }
  150. static void qcedev_ce_high_bw_req(struct qcedev_control *podev,
  151. bool high_bw_req)
  152. {
  153. int ret = 0;
  154. mutex_lock(&qcedev_sent_bw_req);
  155. if (high_bw_req) {
  156. if (podev->high_bw_req_count == 0) {
  157. ret = qcedev_control_clocks(podev, true);
  158. if (ret)
  159. goto exit_unlock_mutex;
  160. }
  161. podev->high_bw_req_count++;
  162. } else {
  163. if (podev->high_bw_req_count == 1) {
  164. ret = qcedev_control_clocks(podev, false);
  165. if (ret)
  166. goto exit_unlock_mutex;
  167. }
  168. podev->high_bw_req_count--;
  169. }
  170. exit_unlock_mutex:
  171. mutex_unlock(&qcedev_sent_bw_req);
  172. }
  173. #define QCEDEV_MAGIC 0x56434544 /* "qced" */
  174. static int qcedev_open(struct inode *inode, struct file *file);
  175. static int qcedev_release(struct inode *inode, struct file *file);
  176. static int start_cipher_req(struct qcedev_control *podev);
  177. static int start_sha_req(struct qcedev_control *podev);
  178. static inline long qcedev_ioctl(struct file *file,
  179. unsigned int cmd, unsigned long arg);
  180. #ifdef CONFIG_COMPAT
  181. #include "compat_qcedev.c"
  182. #else
  183. #define compat_qcedev_ioctl NULL
  184. #endif
  185. static const struct file_operations qcedev_fops = {
  186. .owner = THIS_MODULE,
  187. .unlocked_ioctl = qcedev_ioctl,
  188. .compat_ioctl = compat_qcedev_ioctl,
  189. .open = qcedev_open,
  190. .release = qcedev_release,
  191. };
  192. static struct qcedev_control qce_dev[] = {
  193. {
  194. .miscdevice = {
  195. .minor = MISC_DYNAMIC_MINOR,
  196. .name = "qce",
  197. .fops = &qcedev_fops,
  198. },
  199. .magic = QCEDEV_MAGIC,
  200. },
  201. };
  202. #define MAX_QCE_DEVICE ARRAY_SIZE(qce_dev)
  203. #define DEBUG_MAX_FNAME 16
  204. #define DEBUG_MAX_RW_BUF 1024
  205. struct qcedev_stat {
  206. u32 qcedev_dec_success;
  207. u32 qcedev_dec_fail;
  208. u32 qcedev_enc_success;
  209. u32 qcedev_enc_fail;
  210. u32 qcedev_sha_success;
  211. u32 qcedev_sha_fail;
  212. };
  213. static struct qcedev_stat _qcedev_stat;
  214. static struct dentry *_debug_dent;
  215. static char _debug_read_buf[DEBUG_MAX_RW_BUF];
  216. static int _debug_qcedev;
  217. static struct qcedev_control *qcedev_minor_to_control(unsigned int n)
  218. {
  219. int i;
  220. for (i = 0; i < MAX_QCE_DEVICE; i++) {
  221. if (qce_dev[i].miscdevice.minor == n)
  222. return &qce_dev[i];
  223. }
  224. return NULL;
  225. }
  226. static int qcedev_open(struct inode *inode, struct file *file)
  227. {
  228. struct qcedev_handle *handle;
  229. struct qcedev_control *podev;
  230. podev = qcedev_minor_to_control(MINOR(inode->i_rdev));
  231. if (podev == NULL) {
  232. pr_err("%s: no such device %d\n", __func__,
  233. MINOR(inode->i_rdev));
  234. return -ENOENT;
  235. }
  236. handle = kzalloc(sizeof(struct qcedev_handle), GFP_KERNEL);
  237. if (handle == NULL)
  238. return -ENOMEM;
  239. handle->cntl = podev;
  240. file->private_data = handle;
  241. if (podev->platform_support.bus_scale_table != NULL)
  242. qcedev_ce_high_bw_req(podev, true);
  243. mutex_init(&handle->registeredbufs.lock);
  244. INIT_LIST_HEAD(&handle->registeredbufs.list);
  245. return 0;
  246. }
  247. static int qcedev_release(struct inode *inode, struct file *file)
  248. {
  249. struct qcedev_control *podev;
  250. struct qcedev_handle *handle;
  251. handle = file->private_data;
  252. podev = handle->cntl;
  253. if (podev != NULL && podev->magic != QCEDEV_MAGIC) {
  254. pr_err("%s: invalid handle %pK\n",
  255. __func__, podev);
  256. }
  257. kzfree(handle);
  258. file->private_data = NULL;
  259. if (podev != NULL && podev->platform_support.bus_scale_table != NULL)
  260. qcedev_ce_high_bw_req(podev, false);
  261. return 0;
  262. }
  263. static void req_done(unsigned long data)
  264. {
  265. struct qcedev_control *podev = (struct qcedev_control *)data;
  266. struct qcedev_async_req *areq;
  267. unsigned long flags = 0;
  268. struct qcedev_async_req *new_req = NULL;
  269. int ret = 0;
  270. spin_lock_irqsave(&podev->lock, flags);
  271. areq = podev->active_command;
  272. podev->active_command = NULL;
  273. again:
  274. if (!list_empty(&podev->ready_commands)) {
  275. new_req = container_of(podev->ready_commands.next,
  276. struct qcedev_async_req, list);
  277. list_del(&new_req->list);
  278. podev->active_command = new_req;
  279. new_req->err = 0;
  280. if (new_req->op_type == QCEDEV_CRYPTO_OPER_CIPHER)
  281. ret = start_cipher_req(podev);
  282. else
  283. ret = start_sha_req(podev);
  284. }
  285. spin_unlock_irqrestore(&podev->lock, flags);
  286. if (areq)
  287. complete(&areq->complete);
  288. if (new_req && ret) {
  289. complete(&new_req->complete);
  290. spin_lock_irqsave(&podev->lock, flags);
  291. podev->active_command = NULL;
  292. areq = NULL;
  293. ret = 0;
  294. new_req = NULL;
  295. goto again;
  296. }
  297. }
  298. void qcedev_sha_req_cb(void *cookie, unsigned char *digest,
  299. unsigned char *authdata, int ret)
  300. {
  301. struct qcedev_sha_req *areq;
  302. struct qcedev_control *pdev;
  303. struct qcedev_handle *handle;
  304. uint32_t *auth32 = (uint32_t *)authdata;
  305. areq = (struct qcedev_sha_req *) cookie;
  306. handle = (struct qcedev_handle *) areq->cookie;
  307. pdev = handle->cntl;
  308. if (digest)
  309. memcpy(&handle->sha_ctxt.digest[0], digest, 32);
  310. if (authdata) {
  311. handle->sha_ctxt.auth_data[0] = auth32[0];
  312. handle->sha_ctxt.auth_data[1] = auth32[1];
  313. }
  314. tasklet_schedule(&pdev->done_tasklet);
  315. };
  316. void qcedev_cipher_req_cb(void *cookie, unsigned char *icv,
  317. unsigned char *iv, int ret)
  318. {
  319. struct qcedev_cipher_req *areq;
  320. struct qcedev_handle *handle;
  321. struct qcedev_control *podev;
  322. struct qcedev_async_req *qcedev_areq;
  323. areq = (struct qcedev_cipher_req *) cookie;
  324. handle = (struct qcedev_handle *) areq->cookie;
  325. podev = handle->cntl;
  326. qcedev_areq = podev->active_command;
  327. if (iv)
  328. memcpy(&qcedev_areq->cipher_op_req.iv[0], iv,
  329. qcedev_areq->cipher_op_req.ivlen);
  330. tasklet_schedule(&podev->done_tasklet);
  331. };
  332. static int start_cipher_req(struct qcedev_control *podev)
  333. {
  334. struct qcedev_async_req *qcedev_areq;
  335. struct qce_req creq;
  336. int ret = 0;
  337. /* start the command on the podev->active_command */
  338. qcedev_areq = podev->active_command;
  339. qcedev_areq->cipher_req.cookie = qcedev_areq->handle;
  340. if (qcedev_areq->cipher_op_req.use_pmem == QCEDEV_USE_PMEM) {
  341. pr_err("%s: Use of PMEM is not supported\n", __func__);
  342. goto unsupported;
  343. }
  344. creq.pmem = NULL;
  345. switch (qcedev_areq->cipher_op_req.alg) {
  346. case QCEDEV_ALG_DES:
  347. creq.alg = CIPHER_ALG_DES;
  348. break;
  349. case QCEDEV_ALG_3DES:
  350. creq.alg = CIPHER_ALG_3DES;
  351. break;
  352. case QCEDEV_ALG_AES:
  353. creq.alg = CIPHER_ALG_AES;
  354. break;
  355. default:
  356. return -EINVAL;
  357. };
  358. switch (qcedev_areq->cipher_op_req.mode) {
  359. case QCEDEV_AES_MODE_CBC:
  360. case QCEDEV_DES_MODE_CBC:
  361. creq.mode = QCE_MODE_CBC;
  362. break;
  363. case QCEDEV_AES_MODE_ECB:
  364. case QCEDEV_DES_MODE_ECB:
  365. creq.mode = QCE_MODE_ECB;
  366. break;
  367. case QCEDEV_AES_MODE_CTR:
  368. creq.mode = QCE_MODE_CTR;
  369. break;
  370. case QCEDEV_AES_MODE_XTS:
  371. creq.mode = QCE_MODE_XTS;
  372. break;
  373. default:
  374. return -EINVAL;
  375. };
  376. if ((creq.alg == CIPHER_ALG_AES) &&
  377. (creq.mode == QCE_MODE_CTR)) {
  378. creq.dir = QCE_ENCRYPT;
  379. } else {
  380. if (qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC)
  381. creq.dir = QCE_ENCRYPT;
  382. else
  383. creq.dir = QCE_DECRYPT;
  384. }
  385. creq.iv = &qcedev_areq->cipher_op_req.iv[0];
  386. creq.ivsize = qcedev_areq->cipher_op_req.ivlen;
  387. creq.enckey = &qcedev_areq->cipher_op_req.enckey[0];
  388. creq.encklen = qcedev_areq->cipher_op_req.encklen;
  389. creq.cryptlen = qcedev_areq->cipher_op_req.data_len;
  390. if (qcedev_areq->cipher_op_req.encklen == 0) {
  391. if ((qcedev_areq->cipher_op_req.op == QCEDEV_OPER_ENC_NO_KEY)
  392. || (qcedev_areq->cipher_op_req.op ==
  393. QCEDEV_OPER_DEC_NO_KEY))
  394. creq.op = QCE_REQ_ABLK_CIPHER_NO_KEY;
  395. else {
  396. int i;
  397. for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) {
  398. if (qcedev_areq->cipher_op_req.enckey[i] != 0)
  399. break;
  400. }
  401. if ((podev->platform_support.hw_key_support == 1) &&
  402. (i == QCEDEV_MAX_KEY_SIZE))
  403. creq.op = QCE_REQ_ABLK_CIPHER;
  404. else {
  405. ret = -EINVAL;
  406. goto unsupported;
  407. }
  408. }
  409. } else {
  410. creq.op = QCE_REQ_ABLK_CIPHER;
  411. }
  412. creq.qce_cb = qcedev_cipher_req_cb;
  413. creq.areq = (void *)&qcedev_areq->cipher_req;
  414. creq.flags = 0;
  415. ret = qce_ablk_cipher_req(podev->qce, &creq);
  416. unsupported:
  417. if (ret)
  418. qcedev_areq->err = -ENXIO;
  419. else
  420. qcedev_areq->err = 0;
  421. return ret;
  422. };
  423. static int start_sha_req(struct qcedev_control *podev)
  424. {
  425. struct qcedev_async_req *qcedev_areq;
  426. struct qce_sha_req sreq;
  427. int ret = 0;
  428. struct qcedev_handle *handle;
  429. /* start the command on the podev->active_command */
  430. qcedev_areq = podev->active_command;
  431. handle = qcedev_areq->handle;
  432. switch (qcedev_areq->sha_op_req.alg) {
  433. case QCEDEV_ALG_SHA1:
  434. sreq.alg = QCE_HASH_SHA1;
  435. break;
  436. case QCEDEV_ALG_SHA256:
  437. sreq.alg = QCE_HASH_SHA256;
  438. break;
  439. case QCEDEV_ALG_SHA1_HMAC:
  440. if (podev->ce_support.sha_hmac) {
  441. sreq.alg = QCE_HASH_SHA1_HMAC;
  442. sreq.authkey = &handle->sha_ctxt.authkey[0];
  443. sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE;
  444. } else {
  445. sreq.alg = QCE_HASH_SHA1;
  446. sreq.authkey = NULL;
  447. }
  448. break;
  449. case QCEDEV_ALG_SHA256_HMAC:
  450. if (podev->ce_support.sha_hmac) {
  451. sreq.alg = QCE_HASH_SHA256_HMAC;
  452. sreq.authkey = &handle->sha_ctxt.authkey[0];
  453. sreq.authklen = QCEDEV_MAX_SHA_BLOCK_SIZE;
  454. } else {
  455. sreq.alg = QCE_HASH_SHA256;
  456. sreq.authkey = NULL;
  457. }
  458. break;
  459. case QCEDEV_ALG_AES_CMAC:
  460. sreq.alg = QCE_HASH_AES_CMAC;
  461. sreq.authkey = &handle->sha_ctxt.authkey[0];
  462. sreq.authklen = qcedev_areq->sha_op_req.authklen;
  463. break;
  464. default:
  465. pr_err("Algorithm %d not supported, exiting\n",
  466. qcedev_areq->sha_op_req.alg);
  467. return -EINVAL;
  468. };
  469. qcedev_areq->sha_req.cookie = handle;
  470. sreq.qce_cb = qcedev_sha_req_cb;
  471. if (qcedev_areq->sha_op_req.alg != QCEDEV_ALG_AES_CMAC) {
  472. sreq.auth_data[0] = handle->sha_ctxt.auth_data[0];
  473. sreq.auth_data[1] = handle->sha_ctxt.auth_data[1];
  474. sreq.auth_data[2] = handle->sha_ctxt.auth_data[2];
  475. sreq.auth_data[3] = handle->sha_ctxt.auth_data[3];
  476. sreq.digest = &handle->sha_ctxt.digest[0];
  477. sreq.first_blk = handle->sha_ctxt.first_blk;
  478. sreq.last_blk = handle->sha_ctxt.last_blk;
  479. }
  480. sreq.size = qcedev_areq->sha_req.sreq.nbytes;
  481. sreq.src = qcedev_areq->sha_req.sreq.src;
  482. sreq.areq = (void *)&qcedev_areq->sha_req;
  483. sreq.flags = 0;
  484. ret = qce_process_sha_req(podev->qce, &sreq);
  485. if (ret)
  486. qcedev_areq->err = -ENXIO;
  487. else
  488. qcedev_areq->err = 0;
  489. return ret;
  490. };
  491. static int submit_req(struct qcedev_async_req *qcedev_areq,
  492. struct qcedev_handle *handle)
  493. {
  494. struct qcedev_control *podev;
  495. unsigned long flags = 0;
  496. int ret = 0;
  497. struct qcedev_stat *pstat;
  498. qcedev_areq->err = 0;
  499. podev = handle->cntl;
  500. spin_lock_irqsave(&podev->lock, flags);
  501. if (podev->active_command == NULL) {
  502. podev->active_command = qcedev_areq;
  503. if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_CIPHER)
  504. ret = start_cipher_req(podev);
  505. else
  506. ret = start_sha_req(podev);
  507. } else {
  508. list_add_tail(&qcedev_areq->list, &podev->ready_commands);
  509. }
  510. if (ret != 0)
  511. podev->active_command = NULL;
  512. spin_unlock_irqrestore(&podev->lock, flags);
  513. if (ret == 0)
  514. wait_for_completion(&qcedev_areq->complete);
  515. if (ret)
  516. qcedev_areq->err = -EIO;
  517. pstat = &_qcedev_stat;
  518. if (qcedev_areq->op_type == QCEDEV_CRYPTO_OPER_CIPHER) {
  519. switch (qcedev_areq->cipher_op_req.op) {
  520. case QCEDEV_OPER_DEC:
  521. if (qcedev_areq->err)
  522. pstat->qcedev_dec_fail++;
  523. else
  524. pstat->qcedev_dec_success++;
  525. break;
  526. case QCEDEV_OPER_ENC:
  527. if (qcedev_areq->err)
  528. pstat->qcedev_enc_fail++;
  529. else
  530. pstat->qcedev_enc_success++;
  531. break;
  532. default:
  533. break;
  534. };
  535. } else {
  536. if (qcedev_areq->err)
  537. pstat->qcedev_sha_fail++;
  538. else
  539. pstat->qcedev_sha_success++;
  540. }
  541. return qcedev_areq->err;
  542. }
  543. static int qcedev_sha_init(struct qcedev_async_req *areq,
  544. struct qcedev_handle *handle)
  545. {
  546. struct qcedev_sha_ctxt *sha_ctxt = &handle->sha_ctxt;
  547. memset(sha_ctxt, 0, sizeof(struct qcedev_sha_ctxt));
  548. sha_ctxt->first_blk = 1;
  549. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  550. (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)) {
  551. memcpy(&sha_ctxt->digest[0],
  552. &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE);
  553. sha_ctxt->diglen = SHA1_DIGEST_SIZE;
  554. } else {
  555. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA256) ||
  556. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC)) {
  557. memcpy(&sha_ctxt->digest[0],
  558. &_std_init_vector_sha256_uint8[0],
  559. SHA256_DIGEST_SIZE);
  560. sha_ctxt->diglen = SHA256_DIGEST_SIZE;
  561. }
  562. }
  563. sha_ctxt->init_done = true;
  564. return 0;
  565. }
  566. static int qcedev_sha_update_max_xfer(struct qcedev_async_req *qcedev_areq,
  567. struct qcedev_handle *handle,
  568. struct scatterlist *sg_src)
  569. {
  570. int err = 0;
  571. int i = 0;
  572. uint32_t total;
  573. uint8_t *user_src = NULL;
  574. uint8_t *k_src = NULL;
  575. uint8_t *k_buf_src = NULL;
  576. uint8_t *k_align_src = NULL;
  577. uint32_t sha_pad_len = 0;
  578. uint32_t trailing_buf_len = 0;
  579. uint32_t t_buf = handle->sha_ctxt.trailing_buf_len;
  580. uint32_t sha_block_size;
  581. total = qcedev_areq->sha_op_req.data_len + t_buf;
  582. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1)
  583. sha_block_size = SHA1_BLOCK_SIZE;
  584. else
  585. sha_block_size = SHA256_BLOCK_SIZE;
  586. if (total <= sha_block_size) {
  587. uint32_t len = qcedev_areq->sha_op_req.data_len;
  588. i = 0;
  589. k_src = &handle->sha_ctxt.trailing_buf[t_buf];
  590. /* Copy data from user src(s) */
  591. while (len > 0) {
  592. user_src =
  593. (void __user *)qcedev_areq->sha_op_req.data[i].vaddr;
  594. if (user_src && copy_from_user(k_src,
  595. (void __user *)user_src,
  596. qcedev_areq->sha_op_req.data[i].len))
  597. return -EFAULT;
  598. len -= qcedev_areq->sha_op_req.data[i].len;
  599. k_src += qcedev_areq->sha_op_req.data[i].len;
  600. i++;
  601. }
  602. handle->sha_ctxt.trailing_buf_len = total;
  603. return 0;
  604. }
  605. k_buf_src = kmalloc(total + CACHE_LINE_SIZE * 2,
  606. GFP_KERNEL);
  607. if (k_buf_src == NULL)
  608. return -ENOMEM;
  609. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  610. CACHE_LINE_SIZE);
  611. k_src = k_align_src;
  612. /* check for trailing buffer from previous updates and append it */
  613. if (t_buf > 0) {
  614. memcpy(k_src, &handle->sha_ctxt.trailing_buf[0],
  615. t_buf);
  616. k_src += t_buf;
  617. }
  618. /* Copy data from user src(s) */
  619. user_src = (void __user *)qcedev_areq->sha_op_req.data[0].vaddr;
  620. if (user_src && copy_from_user(k_src,
  621. (void __user *)user_src,
  622. qcedev_areq->sha_op_req.data[0].len)) {
  623. kzfree(k_buf_src);
  624. return -EFAULT;
  625. }
  626. k_src += qcedev_areq->sha_op_req.data[0].len;
  627. for (i = 1; i < qcedev_areq->sha_op_req.entries; i++) {
  628. user_src = (void __user *)qcedev_areq->sha_op_req.data[i].vaddr;
  629. if (user_src && copy_from_user(k_src,
  630. (void __user *)user_src,
  631. qcedev_areq->sha_op_req.data[i].len)) {
  632. kzfree(k_buf_src);
  633. return -EFAULT;
  634. }
  635. k_src += qcedev_areq->sha_op_req.data[i].len;
  636. }
  637. /* get new trailing buffer */
  638. sha_pad_len = ALIGN(total, CE_SHA_BLOCK_SIZE) - total;
  639. trailing_buf_len = CE_SHA_BLOCK_SIZE - sha_pad_len;
  640. qcedev_areq->sha_req.sreq.src = sg_src;
  641. sg_set_buf(qcedev_areq->sha_req.sreq.src, k_align_src,
  642. total-trailing_buf_len);
  643. sg_mark_end(qcedev_areq->sha_req.sreq.src);
  644. qcedev_areq->sha_req.sreq.nbytes = total - trailing_buf_len;
  645. /* update sha_ctxt trailing buf content to new trailing buf */
  646. if (trailing_buf_len > 0) {
  647. memset(&handle->sha_ctxt.trailing_buf[0], 0, 64);
  648. memcpy(&handle->sha_ctxt.trailing_buf[0],
  649. (k_src - trailing_buf_len),
  650. trailing_buf_len);
  651. }
  652. handle->sha_ctxt.trailing_buf_len = trailing_buf_len;
  653. err = submit_req(qcedev_areq, handle);
  654. handle->sha_ctxt.last_blk = 0;
  655. handle->sha_ctxt.first_blk = 0;
  656. kzfree(k_buf_src);
  657. return err;
  658. }
  659. static int qcedev_sha_update(struct qcedev_async_req *qcedev_areq,
  660. struct qcedev_handle *handle,
  661. struct scatterlist *sg_src)
  662. {
  663. int err = 0;
  664. int i = 0;
  665. int j = 0;
  666. int k = 0;
  667. int num_entries = 0;
  668. uint32_t total = 0;
  669. if (handle->sha_ctxt.init_done == false) {
  670. pr_err("%s Init was not called\n", __func__);
  671. return -EINVAL;
  672. }
  673. if (qcedev_areq->sha_op_req.data_len > QCE_MAX_OPER_DATA) {
  674. struct qcedev_sha_op_req *saved_req;
  675. struct qcedev_sha_op_req req;
  676. struct qcedev_sha_op_req *sreq = &qcedev_areq->sha_op_req;
  677. /* save the original req structure */
  678. saved_req =
  679. kmalloc(sizeof(struct qcedev_sha_op_req), GFP_KERNEL);
  680. if (saved_req == NULL) {
  681. pr_err("%s:Can't Allocate mem:saved_req 0x%lx\n",
  682. __func__, (uintptr_t)saved_req);
  683. return -ENOMEM;
  684. }
  685. memcpy(&req, sreq, sizeof(struct qcedev_sha_op_req));
  686. memcpy(saved_req, sreq, sizeof(struct qcedev_sha_op_req));
  687. i = 0;
  688. /* Address 32 KB at a time */
  689. while ((i < req.entries) && (err == 0)) {
  690. if (sreq->data[i].len > QCE_MAX_OPER_DATA) {
  691. sreq->data[0].len = QCE_MAX_OPER_DATA;
  692. if (i > 0) {
  693. sreq->data[0].vaddr =
  694. sreq->data[i].vaddr;
  695. }
  696. sreq->data_len = QCE_MAX_OPER_DATA;
  697. sreq->entries = 1;
  698. err = qcedev_sha_update_max_xfer(qcedev_areq,
  699. handle, sg_src);
  700. sreq->data[i].len = req.data[i].len -
  701. QCE_MAX_OPER_DATA;
  702. sreq->data[i].vaddr = req.data[i].vaddr +
  703. QCE_MAX_OPER_DATA;
  704. req.data[i].vaddr = sreq->data[i].vaddr;
  705. req.data[i].len = sreq->data[i].len;
  706. } else {
  707. total = 0;
  708. for (j = i; j < req.entries; j++) {
  709. num_entries++;
  710. if ((total + sreq->data[j].len) >=
  711. QCE_MAX_OPER_DATA) {
  712. sreq->data[j].len =
  713. (QCE_MAX_OPER_DATA - total);
  714. total = QCE_MAX_OPER_DATA;
  715. break;
  716. }
  717. total += sreq->data[j].len;
  718. }
  719. sreq->data_len = total;
  720. if (i > 0)
  721. for (k = 0; k < num_entries; k++) {
  722. sreq->data[k].len =
  723. sreq->data[i+k].len;
  724. sreq->data[k].vaddr =
  725. sreq->data[i+k].vaddr;
  726. }
  727. sreq->entries = num_entries;
  728. i = j;
  729. err = qcedev_sha_update_max_xfer(qcedev_areq,
  730. handle, sg_src);
  731. num_entries = 0;
  732. sreq->data[i].vaddr = req.data[i].vaddr +
  733. sreq->data[i].len;
  734. sreq->data[i].len = req.data[i].len -
  735. sreq->data[i].len;
  736. req.data[i].vaddr = sreq->data[i].vaddr;
  737. req.data[i].len = sreq->data[i].len;
  738. if (sreq->data[i].len == 0)
  739. i++;
  740. }
  741. } /* end of while ((i < req.entries) && (err == 0)) */
  742. /* Restore the original req structure */
  743. for (i = 0; i < saved_req->entries; i++) {
  744. sreq->data[i].len = saved_req->data[i].len;
  745. sreq->data[i].vaddr = saved_req->data[i].vaddr;
  746. }
  747. sreq->entries = saved_req->entries;
  748. sreq->data_len = saved_req->data_len;
  749. kzfree(saved_req);
  750. } else
  751. err = qcedev_sha_update_max_xfer(qcedev_areq, handle, sg_src);
  752. return err;
  753. }
  754. static int qcedev_sha_final(struct qcedev_async_req *qcedev_areq,
  755. struct qcedev_handle *handle)
  756. {
  757. int err = 0;
  758. struct scatterlist sg_src;
  759. uint32_t total;
  760. uint8_t *k_buf_src = NULL;
  761. uint8_t *k_align_src = NULL;
  762. if (handle->sha_ctxt.init_done == false) {
  763. pr_err("%s Init was not called\n", __func__);
  764. return -EINVAL;
  765. }
  766. handle->sha_ctxt.last_blk = 1;
  767. total = handle->sha_ctxt.trailing_buf_len;
  768. if (total) {
  769. k_buf_src = kmalloc(total + CACHE_LINE_SIZE * 2,
  770. GFP_KERNEL);
  771. if (k_buf_src == NULL)
  772. return -ENOMEM;
  773. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  774. CACHE_LINE_SIZE);
  775. memcpy(k_align_src, &handle->sha_ctxt.trailing_buf[0], total);
  776. }
  777. qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src;
  778. sg_set_buf(qcedev_areq->sha_req.sreq.src, k_align_src, total);
  779. sg_mark_end(qcedev_areq->sha_req.sreq.src);
  780. qcedev_areq->sha_req.sreq.nbytes = total;
  781. err = submit_req(qcedev_areq, handle);
  782. handle->sha_ctxt.first_blk = 0;
  783. handle->sha_ctxt.last_blk = 0;
  784. handle->sha_ctxt.auth_data[0] = 0;
  785. handle->sha_ctxt.auth_data[1] = 0;
  786. handle->sha_ctxt.trailing_buf_len = 0;
  787. handle->sha_ctxt.init_done = false;
  788. memset(&handle->sha_ctxt.trailing_buf[0], 0, 64);
  789. kzfree(k_buf_src);
  790. qcedev_areq->sha_req.sreq.src = NULL;
  791. return err;
  792. }
  793. static int qcedev_hash_cmac(struct qcedev_async_req *qcedev_areq,
  794. struct qcedev_handle *handle,
  795. struct scatterlist *sg_src)
  796. {
  797. int err = 0;
  798. int i = 0;
  799. uint32_t total;
  800. uint8_t *user_src = NULL;
  801. uint8_t *k_src = NULL;
  802. uint8_t *k_buf_src = NULL;
  803. total = qcedev_areq->sha_op_req.data_len;
  804. if (copy_from_user(&handle->sha_ctxt.authkey[0],
  805. (void __user *)qcedev_areq->sha_op_req.authkey,
  806. qcedev_areq->sha_op_req.authklen))
  807. return -EFAULT;
  808. k_buf_src = kmalloc(total, GFP_KERNEL);
  809. if (k_buf_src == NULL)
  810. return -ENOMEM;
  811. k_src = k_buf_src;
  812. /* Copy data from user src(s) */
  813. user_src = (void __user *)qcedev_areq->sha_op_req.data[0].vaddr;
  814. for (i = 0; i < qcedev_areq->sha_op_req.entries; i++) {
  815. user_src =
  816. (void __user *)qcedev_areq->sha_op_req.data[i].vaddr;
  817. if (user_src && copy_from_user(k_src, (void __user *)user_src,
  818. qcedev_areq->sha_op_req.data[i].len)) {
  819. kzfree(k_buf_src);
  820. return -EFAULT;
  821. }
  822. k_src += qcedev_areq->sha_op_req.data[i].len;
  823. }
  824. qcedev_areq->sha_req.sreq.src = sg_src;
  825. sg_set_buf(qcedev_areq->sha_req.sreq.src, k_buf_src, total);
  826. sg_mark_end(qcedev_areq->sha_req.sreq.src);
  827. qcedev_areq->sha_req.sreq.nbytes = total;
  828. handle->sha_ctxt.diglen = qcedev_areq->sha_op_req.diglen;
  829. err = submit_req(qcedev_areq, handle);
  830. kzfree(k_buf_src);
  831. return err;
  832. }
  833. static int qcedev_set_hmac_auth_key(struct qcedev_async_req *areq,
  834. struct qcedev_handle *handle,
  835. struct scatterlist *sg_src)
  836. {
  837. int err = 0;
  838. if (areq->sha_op_req.authklen <= QCEDEV_MAX_KEY_SIZE) {
  839. qcedev_sha_init(areq, handle);
  840. if (copy_from_user(&handle->sha_ctxt.authkey[0],
  841. (void __user *)areq->sha_op_req.authkey,
  842. areq->sha_op_req.authklen))
  843. return -EFAULT;
  844. } else {
  845. struct qcedev_async_req authkey_areq;
  846. uint8_t authkey[QCEDEV_MAX_SHA_BLOCK_SIZE];
  847. init_completion(&authkey_areq.complete);
  848. authkey_areq.sha_op_req.entries = 1;
  849. authkey_areq.sha_op_req.data[0].vaddr =
  850. areq->sha_op_req.authkey;
  851. authkey_areq.sha_op_req.data[0].len = areq->sha_op_req.authklen;
  852. authkey_areq.sha_op_req.data_len = areq->sha_op_req.authklen;
  853. authkey_areq.sha_op_req.diglen = 0;
  854. authkey_areq.handle = handle;
  855. memset(&authkey_areq.sha_op_req.digest[0], 0,
  856. QCEDEV_MAX_SHA_DIGEST);
  857. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)
  858. authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA1;
  859. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC)
  860. authkey_areq.sha_op_req.alg = QCEDEV_ALG_SHA256;
  861. authkey_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
  862. qcedev_sha_init(&authkey_areq, handle);
  863. err = qcedev_sha_update(&authkey_areq, handle, sg_src);
  864. if (!err)
  865. err = qcedev_sha_final(&authkey_areq, handle);
  866. else
  867. return err;
  868. memcpy(&authkey[0], &handle->sha_ctxt.digest[0],
  869. handle->sha_ctxt.diglen);
  870. qcedev_sha_init(areq, handle);
  871. memcpy(&handle->sha_ctxt.authkey[0], &authkey[0],
  872. handle->sha_ctxt.diglen);
  873. }
  874. return err;
  875. }
  876. static int qcedev_hmac_get_ohash(struct qcedev_async_req *qcedev_areq,
  877. struct qcedev_handle *handle)
  878. {
  879. int err = 0;
  880. struct scatterlist sg_src;
  881. uint8_t *k_src = NULL;
  882. uint32_t sha_block_size = 0;
  883. uint32_t sha_digest_size = 0;
  884. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) {
  885. sha_digest_size = SHA1_DIGEST_SIZE;
  886. sha_block_size = SHA1_BLOCK_SIZE;
  887. } else {
  888. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) {
  889. sha_digest_size = SHA256_DIGEST_SIZE;
  890. sha_block_size = SHA256_BLOCK_SIZE;
  891. }
  892. }
  893. k_src = kmalloc(sha_block_size, GFP_KERNEL);
  894. if (k_src == NULL)
  895. return -ENOMEM;
  896. /* check for trailing buffer from previous updates and append it */
  897. memcpy(k_src, &handle->sha_ctxt.trailing_buf[0],
  898. handle->sha_ctxt.trailing_buf_len);
  899. qcedev_areq->sha_req.sreq.src = (struct scatterlist *) &sg_src;
  900. sg_set_buf(qcedev_areq->sha_req.sreq.src, k_src, sha_block_size);
  901. sg_mark_end(qcedev_areq->sha_req.sreq.src);
  902. qcedev_areq->sha_req.sreq.nbytes = sha_block_size;
  903. memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size);
  904. memcpy(&handle->sha_ctxt.trailing_buf[0], &handle->sha_ctxt.digest[0],
  905. sha_digest_size);
  906. handle->sha_ctxt.trailing_buf_len = sha_digest_size;
  907. handle->sha_ctxt.first_blk = 1;
  908. handle->sha_ctxt.last_blk = 0;
  909. handle->sha_ctxt.auth_data[0] = 0;
  910. handle->sha_ctxt.auth_data[1] = 0;
  911. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC) {
  912. memcpy(&handle->sha_ctxt.digest[0],
  913. &_std_init_vector_sha1_uint8[0], SHA1_DIGEST_SIZE);
  914. handle->sha_ctxt.diglen = SHA1_DIGEST_SIZE;
  915. }
  916. if (qcedev_areq->sha_op_req.alg == QCEDEV_ALG_SHA256_HMAC) {
  917. memcpy(&handle->sha_ctxt.digest[0],
  918. &_std_init_vector_sha256_uint8[0], SHA256_DIGEST_SIZE);
  919. handle->sha_ctxt.diglen = SHA256_DIGEST_SIZE;
  920. }
  921. err = submit_req(qcedev_areq, handle);
  922. handle->sha_ctxt.last_blk = 0;
  923. handle->sha_ctxt.first_blk = 0;
  924. kzfree(k_src);
  925. qcedev_areq->sha_req.sreq.src = NULL;
  926. return err;
  927. }
  928. static int qcedev_hmac_update_iokey(struct qcedev_async_req *areq,
  929. struct qcedev_handle *handle, bool ikey)
  930. {
  931. int i;
  932. uint32_t constant;
  933. uint32_t sha_block_size;
  934. if (ikey)
  935. constant = 0x36;
  936. else
  937. constant = 0x5c;
  938. if (areq->sha_op_req.alg == QCEDEV_ALG_SHA1_HMAC)
  939. sha_block_size = SHA1_BLOCK_SIZE;
  940. else
  941. sha_block_size = SHA256_BLOCK_SIZE;
  942. memset(&handle->sha_ctxt.trailing_buf[0], 0, sha_block_size);
  943. for (i = 0; i < sha_block_size; i++)
  944. handle->sha_ctxt.trailing_buf[i] =
  945. (handle->sha_ctxt.authkey[i] ^ constant);
  946. handle->sha_ctxt.trailing_buf_len = sha_block_size;
  947. return 0;
  948. }
  949. static int qcedev_hmac_init(struct qcedev_async_req *areq,
  950. struct qcedev_handle *handle,
  951. struct scatterlist *sg_src)
  952. {
  953. int err;
  954. struct qcedev_control *podev = handle->cntl;
  955. err = qcedev_set_hmac_auth_key(areq, handle, sg_src);
  956. if (err)
  957. return err;
  958. if (!podev->ce_support.sha_hmac)
  959. qcedev_hmac_update_iokey(areq, handle, true);
  960. return 0;
  961. }
  962. static int qcedev_hmac_final(struct qcedev_async_req *areq,
  963. struct qcedev_handle *handle)
  964. {
  965. int err;
  966. struct qcedev_control *podev = handle->cntl;
  967. err = qcedev_sha_final(areq, handle);
  968. if (podev->ce_support.sha_hmac)
  969. return err;
  970. qcedev_hmac_update_iokey(areq, handle, false);
  971. err = qcedev_hmac_get_ohash(areq, handle);
  972. if (err)
  973. return err;
  974. err = qcedev_sha_final(areq, handle);
  975. return err;
  976. }
  977. static int qcedev_hash_init(struct qcedev_async_req *areq,
  978. struct qcedev_handle *handle,
  979. struct scatterlist *sg_src)
  980. {
  981. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  982. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256))
  983. return qcedev_sha_init(areq, handle);
  984. else
  985. return qcedev_hmac_init(areq, handle, sg_src);
  986. }
  987. static int qcedev_hash_update(struct qcedev_async_req *qcedev_areq,
  988. struct qcedev_handle *handle,
  989. struct scatterlist *sg_src)
  990. {
  991. return qcedev_sha_update(qcedev_areq, handle, sg_src);
  992. }
  993. static int qcedev_hash_final(struct qcedev_async_req *areq,
  994. struct qcedev_handle *handle)
  995. {
  996. if ((areq->sha_op_req.alg == QCEDEV_ALG_SHA1) ||
  997. (areq->sha_op_req.alg == QCEDEV_ALG_SHA256))
  998. return qcedev_sha_final(areq, handle);
  999. else
  1000. return qcedev_hmac_final(areq, handle);
  1001. }
  1002. static int qcedev_vbuf_ablk_cipher_max_xfer(struct qcedev_async_req *areq,
  1003. int *di, struct qcedev_handle *handle,
  1004. uint8_t *k_align_src)
  1005. {
  1006. int err = 0;
  1007. int i = 0;
  1008. int dst_i = *di;
  1009. struct scatterlist sg_src;
  1010. uint32_t byteoffset = 0;
  1011. uint8_t *user_src = NULL;
  1012. uint8_t *k_align_dst = k_align_src;
  1013. struct qcedev_cipher_op_req *creq = &areq->cipher_op_req;
  1014. if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1015. byteoffset = areq->cipher_op_req.byteoffset;
  1016. user_src = (void __user *)areq->cipher_op_req.vbuf.src[0].vaddr;
  1017. if (user_src && copy_from_user((k_align_src + byteoffset),
  1018. (void __user *)user_src,
  1019. areq->cipher_op_req.vbuf.src[0].len))
  1020. return -EFAULT;
  1021. k_align_src += byteoffset + areq->cipher_op_req.vbuf.src[0].len;
  1022. for (i = 1; i < areq->cipher_op_req.entries; i++) {
  1023. user_src =
  1024. (void __user *)areq->cipher_op_req.vbuf.src[i].vaddr;
  1025. if (user_src && copy_from_user(k_align_src,
  1026. (void __user *)user_src,
  1027. areq->cipher_op_req.vbuf.src[i].len)) {
  1028. return -EFAULT;
  1029. }
  1030. k_align_src += areq->cipher_op_req.vbuf.src[i].len;
  1031. }
  1032. /* restore src beginning */
  1033. k_align_src = k_align_dst;
  1034. areq->cipher_op_req.data_len += byteoffset;
  1035. areq->cipher_req.creq.src = (struct scatterlist *) &sg_src;
  1036. areq->cipher_req.creq.dst = (struct scatterlist *) &sg_src;
  1037. /* In place encryption/decryption */
  1038. sg_set_buf(areq->cipher_req.creq.src,
  1039. k_align_dst,
  1040. areq->cipher_op_req.data_len);
  1041. sg_mark_end(areq->cipher_req.creq.src);
  1042. areq->cipher_req.creq.nbytes = areq->cipher_op_req.data_len;
  1043. areq->cipher_req.creq.info = areq->cipher_op_req.iv;
  1044. areq->cipher_op_req.entries = 1;
  1045. err = submit_req(areq, handle);
  1046. /* copy data to destination buffer*/
  1047. creq->data_len -= byteoffset;
  1048. while (creq->data_len > 0) {
  1049. if (creq->vbuf.dst[dst_i].len <= creq->data_len) {
  1050. if (err == 0 && copy_to_user(
  1051. (void __user *)creq->vbuf.dst[dst_i].vaddr,
  1052. (k_align_dst + byteoffset),
  1053. creq->vbuf.dst[dst_i].len)) {
  1054. err = -EFAULT;
  1055. goto exit;
  1056. }
  1057. k_align_dst += creq->vbuf.dst[dst_i].len;
  1058. creq->data_len -= creq->vbuf.dst[dst_i].len;
  1059. dst_i++;
  1060. } else {
  1061. if (err == 0 && copy_to_user(
  1062. (void __user *)creq->vbuf.dst[dst_i].vaddr,
  1063. (k_align_dst + byteoffset),
  1064. creq->data_len)) {
  1065. err = -EFAULT;
  1066. goto exit;
  1067. }
  1068. k_align_dst += creq->data_len;
  1069. creq->vbuf.dst[dst_i].len -= creq->data_len;
  1070. creq->vbuf.dst[dst_i].vaddr += creq->data_len;
  1071. creq->data_len = 0;
  1072. }
  1073. }
  1074. *di = dst_i;
  1075. exit:
  1076. areq->cipher_req.creq.src = NULL;
  1077. areq->cipher_req.creq.dst = NULL;
  1078. return err;
  1079. };
  1080. static int qcedev_vbuf_ablk_cipher(struct qcedev_async_req *areq,
  1081. struct qcedev_handle *handle)
  1082. {
  1083. int err = 0;
  1084. int di = 0;
  1085. int i = 0;
  1086. int j = 0;
  1087. int k = 0;
  1088. uint32_t byteoffset = 0;
  1089. int num_entries = 0;
  1090. uint32_t total = 0;
  1091. uint32_t len;
  1092. uint8_t *k_buf_src = NULL;
  1093. uint8_t *k_align_src = NULL;
  1094. uint32_t max_data_xfer;
  1095. struct qcedev_cipher_op_req *saved_req;
  1096. struct qcedev_cipher_op_req *creq = &areq->cipher_op_req;
  1097. total = 0;
  1098. if (areq->cipher_op_req.mode == QCEDEV_AES_MODE_CTR)
  1099. byteoffset = areq->cipher_op_req.byteoffset;
  1100. k_buf_src = kmalloc(QCE_MAX_OPER_DATA + CACHE_LINE_SIZE * 2,
  1101. GFP_KERNEL);
  1102. if (k_buf_src == NULL)
  1103. return -ENOMEM;
  1104. k_align_src = (uint8_t *)ALIGN(((uintptr_t)k_buf_src),
  1105. CACHE_LINE_SIZE);
  1106. max_data_xfer = QCE_MAX_OPER_DATA - byteoffset;
  1107. saved_req = kmalloc(sizeof(struct qcedev_cipher_op_req), GFP_KERNEL);
  1108. if (saved_req == NULL) {
  1109. kzfree(k_buf_src);
  1110. return -ENOMEM;
  1111. }
  1112. memcpy(saved_req, creq, sizeof(struct qcedev_cipher_op_req));
  1113. if (areq->cipher_op_req.data_len > max_data_xfer) {
  1114. struct qcedev_cipher_op_req req;
  1115. /* save the original req structure */
  1116. memcpy(&req, creq, sizeof(struct qcedev_cipher_op_req));
  1117. i = 0;
  1118. /* Address 32 KB at a time */
  1119. while ((i < req.entries) && (err == 0)) {
  1120. if (creq->vbuf.src[i].len > max_data_xfer) {
  1121. creq->vbuf.src[0].len = max_data_xfer;
  1122. if (i > 0) {
  1123. creq->vbuf.src[0].vaddr =
  1124. creq->vbuf.src[i].vaddr;
  1125. }
  1126. creq->data_len = max_data_xfer;
  1127. creq->entries = 1;
  1128. err = qcedev_vbuf_ablk_cipher_max_xfer(areq,
  1129. &di, handle, k_align_src);
  1130. if (err < 0) {
  1131. kzfree(k_buf_src);
  1132. kzfree(saved_req);
  1133. return err;
  1134. }
  1135. creq->vbuf.src[i].len = req.vbuf.src[i].len -
  1136. max_data_xfer;
  1137. creq->vbuf.src[i].vaddr =
  1138. req.vbuf.src[i].vaddr +
  1139. max_data_xfer;
  1140. req.vbuf.src[i].vaddr =
  1141. creq->vbuf.src[i].vaddr;
  1142. req.vbuf.src[i].len = creq->vbuf.src[i].len;
  1143. } else {
  1144. total = areq->cipher_op_req.byteoffset;
  1145. for (j = i; j < req.entries; j++) {
  1146. num_entries++;
  1147. if ((total + creq->vbuf.src[j].len)
  1148. >= max_data_xfer) {
  1149. creq->vbuf.src[j].len =
  1150. max_data_xfer - total;
  1151. total = max_data_xfer;
  1152. break;
  1153. }
  1154. total += creq->vbuf.src[j].len;
  1155. }
  1156. creq->data_len = total;
  1157. if (i > 0)
  1158. for (k = 0; k < num_entries; k++) {
  1159. creq->vbuf.src[k].len =
  1160. creq->vbuf.src[i+k].len;
  1161. creq->vbuf.src[k].vaddr =
  1162. creq->vbuf.src[i+k].vaddr;
  1163. }
  1164. creq->entries = num_entries;
  1165. i = j;
  1166. err = qcedev_vbuf_ablk_cipher_max_xfer(areq,
  1167. &di, handle, k_align_src);
  1168. if (err < 0) {
  1169. kzfree(k_buf_src);
  1170. kzfree(saved_req);
  1171. return err;
  1172. }
  1173. num_entries = 0;
  1174. areq->cipher_op_req.byteoffset = 0;
  1175. creq->vbuf.src[i].vaddr = req.vbuf.src[i].vaddr
  1176. + creq->vbuf.src[i].len;
  1177. creq->vbuf.src[i].len = req.vbuf.src[i].len -
  1178. creq->vbuf.src[i].len;
  1179. req.vbuf.src[i].vaddr =
  1180. creq->vbuf.src[i].vaddr;
  1181. req.vbuf.src[i].len = creq->vbuf.src[i].len;
  1182. if (creq->vbuf.src[i].len == 0)
  1183. i++;
  1184. }
  1185. areq->cipher_op_req.byteoffset = 0;
  1186. max_data_xfer = QCE_MAX_OPER_DATA;
  1187. byteoffset = 0;
  1188. } /* end of while ((i < req.entries) && (err == 0)) */
  1189. } else
  1190. err = qcedev_vbuf_ablk_cipher_max_xfer(areq, &di, handle,
  1191. k_align_src);
  1192. /* Restore the original req structure */
  1193. for (i = 0; i < saved_req->entries; i++) {
  1194. creq->vbuf.src[i].len = saved_req->vbuf.src[i].len;
  1195. creq->vbuf.src[i].vaddr = saved_req->vbuf.src[i].vaddr;
  1196. }
  1197. for (len = 0, i = 0; len < saved_req->data_len; i++) {
  1198. creq->vbuf.dst[i].len = saved_req->vbuf.dst[i].len;
  1199. creq->vbuf.dst[i].vaddr = saved_req->vbuf.dst[i].vaddr;
  1200. len += saved_req->vbuf.dst[i].len;
  1201. }
  1202. creq->entries = saved_req->entries;
  1203. creq->data_len = saved_req->data_len;
  1204. creq->byteoffset = saved_req->byteoffset;
  1205. kzfree(saved_req);
  1206. kzfree(k_buf_src);
  1207. return err;
  1208. }
  1209. static int qcedev_check_cipher_key(struct qcedev_cipher_op_req *req,
  1210. struct qcedev_control *podev)
  1211. {
  1212. /* if intending to use HW key make sure key fields are set
  1213. * correctly and HW key is indeed supported in target
  1214. */
  1215. if (req->encklen == 0) {
  1216. int i;
  1217. for (i = 0; i < QCEDEV_MAX_KEY_SIZE; i++) {
  1218. if (req->enckey[i]) {
  1219. pr_err("%s: Invalid key: non-zero key input\n",
  1220. __func__);
  1221. goto error;
  1222. }
  1223. }
  1224. if ((req->op != QCEDEV_OPER_ENC_NO_KEY) &&
  1225. (req->op != QCEDEV_OPER_DEC_NO_KEY))
  1226. if (!podev->platform_support.hw_key_support) {
  1227. pr_err("%s: Invalid op %d\n", __func__,
  1228. (uint32_t)req->op);
  1229. goto error;
  1230. }
  1231. } else {
  1232. if (req->encklen == QCEDEV_AES_KEY_192) {
  1233. if (!podev->ce_support.aes_key_192) {
  1234. pr_err("%s: AES-192 not supported\n", __func__);
  1235. goto error;
  1236. }
  1237. } else {
  1238. /* if not using HW key make sure key
  1239. * length is valid
  1240. */
  1241. if (req->mode == QCEDEV_AES_MODE_XTS) {
  1242. if ((req->encklen != QCEDEV_AES_KEY_128*2) &&
  1243. (req->encklen != QCEDEV_AES_KEY_256*2)) {
  1244. pr_err("%s: unsupported key size: %d\n",
  1245. __func__, req->encklen);
  1246. goto error;
  1247. }
  1248. } else {
  1249. if ((req->encklen != QCEDEV_AES_KEY_128) &&
  1250. (req->encklen != QCEDEV_AES_KEY_256)) {
  1251. pr_err("%s: unsupported key size %d\n",
  1252. __func__, req->encklen);
  1253. goto error;
  1254. }
  1255. }
  1256. }
  1257. }
  1258. return 0;
  1259. error:
  1260. return -EINVAL;
  1261. }
  1262. static int qcedev_check_cipher_params(struct qcedev_cipher_op_req *req,
  1263. struct qcedev_control *podev)
  1264. {
  1265. uint32_t total = 0;
  1266. uint32_t i;
  1267. if (req->use_pmem) {
  1268. pr_err("%s: Use of PMEM is not supported\n", __func__);
  1269. goto error;
  1270. }
  1271. if ((req->entries == 0) || (req->data_len == 0) ||
  1272. (req->entries > QCEDEV_MAX_BUFFERS)) {
  1273. pr_err("%s: Invalid cipher length/entries\n", __func__);
  1274. goto error;
  1275. }
  1276. if ((req->alg >= QCEDEV_ALG_LAST) ||
  1277. (req->mode >= QCEDEV_AES_DES_MODE_LAST)) {
  1278. pr_err("%s: Invalid algorithm %d\n", __func__,
  1279. (uint32_t)req->alg);
  1280. goto error;
  1281. }
  1282. if ((req->mode == QCEDEV_AES_MODE_XTS) &&
  1283. (!podev->ce_support.aes_xts)) {
  1284. pr_err("%s: XTS algorithm is not supported\n", __func__);
  1285. goto error;
  1286. }
  1287. if (req->alg == QCEDEV_ALG_AES) {
  1288. if (qcedev_check_cipher_key(req, podev))
  1289. goto error;
  1290. }
  1291. /* if using a byteoffset, make sure it is CTR mode using vbuf */
  1292. if (req->byteoffset) {
  1293. if (req->mode != QCEDEV_AES_MODE_CTR) {
  1294. pr_err("%s: Operation on byte offset not supported\n",
  1295. __func__);
  1296. goto error;
  1297. }
  1298. if (req->byteoffset >= AES_CE_BLOCK_SIZE) {
  1299. pr_err("%s: Invalid byte offset\n", __func__);
  1300. goto error;
  1301. }
  1302. total = req->byteoffset;
  1303. for (i = 0; i < req->entries; i++) {
  1304. if (total > U32_MAX - req->vbuf.src[i].len) {
  1305. pr_err("%s:Integer overflow on total src len\n",
  1306. __func__);
  1307. goto error;
  1308. }
  1309. total += req->vbuf.src[i].len;
  1310. }
  1311. }
  1312. if (req->data_len < req->byteoffset) {
  1313. pr_err("%s: req data length %u is less than byteoffset %u\n",
  1314. __func__, req->data_len, req->byteoffset);
  1315. goto error;
  1316. }
  1317. /* Ensure IV size */
  1318. if (req->ivlen > QCEDEV_MAX_IV_SIZE) {
  1319. pr_err("%s: ivlen is not correct: %u\n", __func__, req->ivlen);
  1320. goto error;
  1321. }
  1322. /* Ensure Key size */
  1323. if (req->encklen > QCEDEV_MAX_KEY_SIZE) {
  1324. pr_err("%s: Klen is not correct: %u\n", __func__, req->encklen);
  1325. goto error;
  1326. }
  1327. /* Ensure zer ivlen for ECB mode */
  1328. if (req->ivlen > 0) {
  1329. if ((req->mode == QCEDEV_AES_MODE_ECB) ||
  1330. (req->mode == QCEDEV_DES_MODE_ECB)) {
  1331. pr_err("%s: Expecting a zero length IV\n", __func__);
  1332. goto error;
  1333. }
  1334. } else {
  1335. if ((req->mode != QCEDEV_AES_MODE_ECB) &&
  1336. (req->mode != QCEDEV_DES_MODE_ECB)) {
  1337. pr_err("%s: Expecting a non-zero ength IV\n", __func__);
  1338. goto error;
  1339. }
  1340. }
  1341. /* Check for sum of all dst length is equal to data_len */
  1342. for (i = 0, total = 0; i < req->entries; i++) {
  1343. if (!req->vbuf.dst[i].vaddr && req->vbuf.dst[i].len) {
  1344. pr_err("%s: NULL req dst vbuf[%d] with length %d\n",
  1345. __func__, i, req->vbuf.dst[i].len);
  1346. goto error;
  1347. }
  1348. if (req->vbuf.dst[i].len >= U32_MAX - total) {
  1349. pr_err("%s: Integer overflow on total req dst vbuf length\n",
  1350. __func__);
  1351. goto error;
  1352. }
  1353. total += req->vbuf.dst[i].len;
  1354. }
  1355. if (total != req->data_len) {
  1356. pr_err("%s: Total (i=%d) dst(%d) buf size != data_len (%d)\n",
  1357. __func__, i, total, req->data_len);
  1358. goto error;
  1359. }
  1360. /* Check for sum of all src length is equal to data_len */
  1361. for (i = 0, total = 0; i < req->entries; i++) {
  1362. if (!req->vbuf.src[i].vaddr && req->vbuf.src[i].len) {
  1363. pr_err("%s: NULL req src vbuf[%d] with length %d\n",
  1364. __func__, i, req->vbuf.src[i].len);
  1365. goto error;
  1366. }
  1367. if (req->vbuf.src[i].len > U32_MAX - total) {
  1368. pr_err("%s: Integer overflow on total req src vbuf length\n",
  1369. __func__);
  1370. goto error;
  1371. }
  1372. total += req->vbuf.src[i].len;
  1373. }
  1374. if (total != req->data_len) {
  1375. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1376. __func__, total, req->data_len);
  1377. goto error;
  1378. }
  1379. return 0;
  1380. error:
  1381. return -EINVAL;
  1382. }
  1383. static int qcedev_check_sha_params(struct qcedev_sha_op_req *req,
  1384. struct qcedev_control *podev)
  1385. {
  1386. uint32_t total = 0;
  1387. uint32_t i;
  1388. if ((req->alg == QCEDEV_ALG_AES_CMAC) &&
  1389. (!podev->ce_support.cmac)) {
  1390. pr_err("%s: CMAC not supported\n", __func__);
  1391. goto sha_error;
  1392. }
  1393. if ((!req->entries) || (req->entries > QCEDEV_MAX_BUFFERS)) {
  1394. pr_err("%s: Invalid num entries (%d)\n",
  1395. __func__, req->entries);
  1396. goto sha_error;
  1397. }
  1398. if (req->alg >= QCEDEV_ALG_SHA_ALG_LAST) {
  1399. pr_err("%s: Invalid algorithm (%d)\n", __func__, req->alg);
  1400. goto sha_error;
  1401. }
  1402. if ((req->alg == QCEDEV_ALG_SHA1_HMAC) ||
  1403. (req->alg == QCEDEV_ALG_SHA1_HMAC)) {
  1404. if (req->authkey == NULL) {
  1405. pr_err("%s: Invalid authkey pointer\n", __func__);
  1406. goto sha_error;
  1407. }
  1408. if (req->authklen <= 0) {
  1409. pr_err("%s: Invalid authkey length (%d)\n",
  1410. __func__, req->authklen);
  1411. goto sha_error;
  1412. }
  1413. }
  1414. if (req->alg == QCEDEV_ALG_AES_CMAC) {
  1415. if ((req->authklen != QCEDEV_AES_KEY_128) &&
  1416. (req->authklen != QCEDEV_AES_KEY_256)) {
  1417. pr_err("%s: unsupported key length\n", __func__);
  1418. goto sha_error;
  1419. }
  1420. }
  1421. /* Check for sum of all src length is equal to data_len */
  1422. for (i = 0, total = 0; i < req->entries; i++) {
  1423. if (req->data[i].len > U32_MAX - total) {
  1424. pr_err("%s: Integer overflow on total req buf length\n",
  1425. __func__);
  1426. goto sha_error;
  1427. }
  1428. total += req->data[i].len;
  1429. }
  1430. if (total != req->data_len) {
  1431. pr_err("%s: Total src(%d) buf size != data_len (%d)\n",
  1432. __func__, total, req->data_len);
  1433. goto sha_error;
  1434. }
  1435. return 0;
  1436. sha_error:
  1437. return -EINVAL;
  1438. }
  1439. static inline long qcedev_ioctl(struct file *file,
  1440. unsigned int cmd, unsigned long arg)
  1441. {
  1442. int err = 0;
  1443. struct qcedev_handle *handle;
  1444. struct qcedev_control *podev;
  1445. struct qcedev_async_req qcedev_areq;
  1446. struct qcedev_stat *pstat;
  1447. handle = file->private_data;
  1448. podev = handle->cntl;
  1449. qcedev_areq.handle = handle;
  1450. if (podev == NULL || podev->magic != QCEDEV_MAGIC) {
  1451. pr_err("%s: invalid handle %pK\n",
  1452. __func__, podev);
  1453. return -ENOENT;
  1454. }
  1455. /* Verify user arguments. */
  1456. if (_IOC_TYPE(cmd) != QCEDEV_IOC_MAGIC)
  1457. return -ENOTTY;
  1458. init_completion(&qcedev_areq.complete);
  1459. pstat = &_qcedev_stat;
  1460. switch (cmd) {
  1461. case QCEDEV_IOCTL_ENC_REQ:
  1462. case QCEDEV_IOCTL_DEC_REQ:
  1463. if (copy_from_user(&qcedev_areq.cipher_op_req,
  1464. (void __user *)arg,
  1465. sizeof(struct qcedev_cipher_op_req)))
  1466. return -EFAULT;
  1467. qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_CIPHER;
  1468. if (qcedev_check_cipher_params(&qcedev_areq.cipher_op_req,
  1469. podev))
  1470. return -EINVAL;
  1471. err = qcedev_vbuf_ablk_cipher(&qcedev_areq, handle);
  1472. if (err)
  1473. return err;
  1474. if (copy_to_user((void __user *)arg,
  1475. &qcedev_areq.cipher_op_req,
  1476. sizeof(struct qcedev_cipher_op_req)))
  1477. return -EFAULT;
  1478. break;
  1479. case QCEDEV_IOCTL_SHA_INIT_REQ:
  1480. {
  1481. struct scatterlist sg_src;
  1482. if (copy_from_user(&qcedev_areq.sha_op_req,
  1483. (void __user *)arg,
  1484. sizeof(struct qcedev_sha_op_req)))
  1485. return -EFAULT;
  1486. mutex_lock(&hash_access_lock);
  1487. if (qcedev_check_sha_params(&qcedev_areq.sha_op_req, podev)) {
  1488. mutex_unlock(&hash_access_lock);
  1489. return -EINVAL;
  1490. }
  1491. qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
  1492. err = qcedev_hash_init(&qcedev_areq, handle, &sg_src);
  1493. if (err) {
  1494. mutex_unlock(&hash_access_lock);
  1495. return err;
  1496. }
  1497. mutex_unlock(&hash_access_lock);
  1498. if (copy_to_user((void __user *)arg, &qcedev_areq.sha_op_req,
  1499. sizeof(struct qcedev_sha_op_req)))
  1500. return -EFAULT;
  1501. }
  1502. handle->sha_ctxt.init_done = true;
  1503. break;
  1504. case QCEDEV_IOCTL_GET_CMAC_REQ:
  1505. if (!podev->ce_support.cmac)
  1506. return -ENOTTY;
  1507. case QCEDEV_IOCTL_SHA_UPDATE_REQ:
  1508. {
  1509. struct scatterlist sg_src;
  1510. if (copy_from_user(&qcedev_areq.sha_op_req,
  1511. (void __user *)arg,
  1512. sizeof(struct qcedev_sha_op_req)))
  1513. return -EFAULT;
  1514. mutex_lock(&hash_access_lock);
  1515. if (qcedev_check_sha_params(&qcedev_areq.sha_op_req, podev)) {
  1516. mutex_unlock(&hash_access_lock);
  1517. return -EINVAL;
  1518. }
  1519. qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
  1520. if (qcedev_areq.sha_op_req.alg == QCEDEV_ALG_AES_CMAC) {
  1521. err = qcedev_hash_cmac(&qcedev_areq, handle, &sg_src);
  1522. if (err) {
  1523. mutex_unlock(&hash_access_lock);
  1524. return err;
  1525. }
  1526. } else {
  1527. if (handle->sha_ctxt.init_done == false) {
  1528. pr_err("%s Init was not called\n", __func__);
  1529. mutex_unlock(&hash_access_lock);
  1530. return -EINVAL;
  1531. }
  1532. err = qcedev_hash_update(&qcedev_areq, handle, &sg_src);
  1533. if (err) {
  1534. mutex_unlock(&hash_access_lock);
  1535. return err;
  1536. }
  1537. }
  1538. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  1539. pr_err("Invalid sha_ctxt.diglen %d\n",
  1540. handle->sha_ctxt.diglen);
  1541. mutex_unlock(&hash_access_lock);
  1542. return -EINVAL;
  1543. }
  1544. memcpy(&qcedev_areq.sha_op_req.digest[0],
  1545. &handle->sha_ctxt.digest[0],
  1546. handle->sha_ctxt.diglen);
  1547. mutex_unlock(&hash_access_lock);
  1548. if (copy_to_user((void __user *)arg, &qcedev_areq.sha_op_req,
  1549. sizeof(struct qcedev_sha_op_req)))
  1550. return -EFAULT;
  1551. }
  1552. break;
  1553. case QCEDEV_IOCTL_SHA_FINAL_REQ:
  1554. if (handle->sha_ctxt.init_done == false) {
  1555. pr_err("%s Init was not called\n", __func__);
  1556. return -EINVAL;
  1557. }
  1558. if (copy_from_user(&qcedev_areq.sha_op_req,
  1559. (void __user *)arg,
  1560. sizeof(struct qcedev_sha_op_req)))
  1561. return -EFAULT;
  1562. mutex_lock(&hash_access_lock);
  1563. if (qcedev_check_sha_params(&qcedev_areq.sha_op_req, podev)) {
  1564. mutex_unlock(&hash_access_lock);
  1565. return -EINVAL;
  1566. }
  1567. qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
  1568. err = qcedev_hash_final(&qcedev_areq, handle);
  1569. if (err) {
  1570. mutex_unlock(&hash_access_lock);
  1571. return err;
  1572. }
  1573. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  1574. pr_err("Invalid sha_ctxt.diglen %d\n",
  1575. handle->sha_ctxt.diglen);
  1576. mutex_unlock(&hash_access_lock);
  1577. return -EINVAL;
  1578. }
  1579. qcedev_areq.sha_op_req.diglen = handle->sha_ctxt.diglen;
  1580. memcpy(&qcedev_areq.sha_op_req.digest[0],
  1581. &handle->sha_ctxt.digest[0],
  1582. handle->sha_ctxt.diglen);
  1583. mutex_unlock(&hash_access_lock);
  1584. if (copy_to_user((void __user *)arg, &qcedev_areq.sha_op_req,
  1585. sizeof(struct qcedev_sha_op_req)))
  1586. return -EFAULT;
  1587. handle->sha_ctxt.init_done = false;
  1588. break;
  1589. case QCEDEV_IOCTL_GET_SHA_REQ:
  1590. {
  1591. struct scatterlist sg_src;
  1592. if (copy_from_user(&qcedev_areq.sha_op_req,
  1593. (void __user *)arg,
  1594. sizeof(struct qcedev_sha_op_req)))
  1595. return -EFAULT;
  1596. mutex_lock(&hash_access_lock);
  1597. if (qcedev_check_sha_params(&qcedev_areq.sha_op_req, podev)) {
  1598. mutex_unlock(&hash_access_lock);
  1599. return -EINVAL;
  1600. }
  1601. qcedev_areq.op_type = QCEDEV_CRYPTO_OPER_SHA;
  1602. qcedev_hash_init(&qcedev_areq, handle, &sg_src);
  1603. err = qcedev_hash_update(&qcedev_areq, handle, &sg_src);
  1604. if (err) {
  1605. mutex_unlock(&hash_access_lock);
  1606. return err;
  1607. }
  1608. err = qcedev_hash_final(&qcedev_areq, handle);
  1609. if (err) {
  1610. mutex_unlock(&hash_access_lock);
  1611. return err;
  1612. }
  1613. if (handle->sha_ctxt.diglen > QCEDEV_MAX_SHA_DIGEST) {
  1614. pr_err("Invalid sha_ctxt.diglen %d\n",
  1615. handle->sha_ctxt.diglen);
  1616. mutex_unlock(&hash_access_lock);
  1617. return -EINVAL;
  1618. }
  1619. qcedev_areq.sha_op_req.diglen = handle->sha_ctxt.diglen;
  1620. memcpy(&qcedev_areq.sha_op_req.digest[0],
  1621. &handle->sha_ctxt.digest[0],
  1622. handle->sha_ctxt.diglen);
  1623. mutex_unlock(&hash_access_lock);
  1624. if (copy_to_user((void __user *)arg, &qcedev_areq.sha_op_req,
  1625. sizeof(struct qcedev_sha_op_req)))
  1626. return -EFAULT;
  1627. }
  1628. break;
  1629. case QCEDEV_IOCTL_MAP_BUF_REQ:
  1630. {
  1631. unsigned long long vaddr = 0;
  1632. struct qcedev_map_buf_req map_buf = { {0} };
  1633. int i = 0;
  1634. if (copy_from_user(&map_buf,
  1635. (void __user *)arg, sizeof(map_buf)))
  1636. return -EFAULT;
  1637. for (i = 0; i < map_buf.num_fds; i++) {
  1638. err = qcedev_check_and_map_buffer(handle,
  1639. map_buf.fd[i],
  1640. map_buf.fd_offset[i],
  1641. map_buf.fd_size[i],
  1642. &vaddr);
  1643. if (err) {
  1644. pr_err(
  1645. "%s: err: failed to map fd(%d) - %d\n",
  1646. __func__, map_buf.fd[i], err);
  1647. return err;
  1648. }
  1649. map_buf.buf_vaddr[i] = vaddr;
  1650. pr_info("%s: info: vaddr = %llx\n",
  1651. __func__, vaddr);
  1652. }
  1653. if (copy_to_user((void __user *)arg, &map_buf,
  1654. sizeof(map_buf)))
  1655. return -EFAULT;
  1656. break;
  1657. }
  1658. case QCEDEV_IOCTL_UNMAP_BUF_REQ:
  1659. {
  1660. struct qcedev_unmap_buf_req unmap_buf = { { 0 } };
  1661. int i = 0;
  1662. if (copy_from_user(&unmap_buf,
  1663. (void __user *)arg, sizeof(unmap_buf)))
  1664. return -EFAULT;
  1665. for (i = 0; i < unmap_buf.num_fds; i++) {
  1666. err = qcedev_check_and_unmap_buffer(handle,
  1667. unmap_buf.fd[i]);
  1668. if (err) {
  1669. pr_err(
  1670. "%s: err: failed to unmap fd(%d) - %d\n",
  1671. __func__,
  1672. unmap_buf.fd[i], err);
  1673. return err;
  1674. }
  1675. }
  1676. break;
  1677. }
  1678. default:
  1679. return -ENOTTY;
  1680. }
  1681. return err;
  1682. }
  1683. static int qcedev_probe_device(struct platform_device *pdev)
  1684. {
  1685. void *handle = NULL;
  1686. int rc = 0;
  1687. struct qcedev_control *podev;
  1688. struct msm_ce_hw_support *platform_support;
  1689. podev = &qce_dev[0];
  1690. podev->high_bw_req_count = 0;
  1691. INIT_LIST_HEAD(&podev->ready_commands);
  1692. podev->active_command = NULL;
  1693. INIT_LIST_HEAD(&podev->context_banks);
  1694. spin_lock_init(&podev->lock);
  1695. tasklet_init(&podev->done_tasklet, req_done, (unsigned long)podev);
  1696. podev->platform_support.bus_scale_table = (struct msm_bus_scale_pdata *)
  1697. msm_bus_cl_get_pdata(pdev);
  1698. if (!podev->platform_support.bus_scale_table) {
  1699. pr_err("bus_scale_table is NULL\n");
  1700. return -ENODATA;
  1701. }
  1702. podev->bus_scale_handle = msm_bus_scale_register_client(
  1703. (struct msm_bus_scale_pdata *)
  1704. podev->platform_support.bus_scale_table);
  1705. if (!podev->bus_scale_handle) {
  1706. pr_err("%s not able to get bus scale\n", __func__);
  1707. return -ENOMEM;
  1708. }
  1709. rc = msm_bus_scale_client_update_request(podev->bus_scale_handle, 1);
  1710. if (rc) {
  1711. pr_err("%s Unable to set to high bandwidth\n", __func__);
  1712. goto exit_unregister_bus_scale;
  1713. }
  1714. handle = qce_open(pdev, &rc);
  1715. if (handle == NULL) {
  1716. rc = -ENODEV;
  1717. goto exit_scale_busbandwidth;
  1718. }
  1719. rc = msm_bus_scale_client_update_request(podev->bus_scale_handle, 0);
  1720. if (rc) {
  1721. pr_err("%s Unable to set to low bandwidth\n", __func__);
  1722. goto exit_qce_close;
  1723. }
  1724. podev->qce = handle;
  1725. podev->pdev = pdev;
  1726. platform_set_drvdata(pdev, podev);
  1727. qce_hw_support(podev->qce, &podev->ce_support);
  1728. if (podev->ce_support.bam) {
  1729. podev->platform_support.ce_shared = 0;
  1730. podev->platform_support.shared_ce_resource = 0;
  1731. podev->platform_support.hw_key_support =
  1732. podev->ce_support.hw_key;
  1733. podev->platform_support.sha_hmac = 1;
  1734. } else {
  1735. platform_support =
  1736. (struct msm_ce_hw_support *)pdev->dev.platform_data;
  1737. podev->platform_support.ce_shared = platform_support->ce_shared;
  1738. podev->platform_support.shared_ce_resource =
  1739. platform_support->shared_ce_resource;
  1740. podev->platform_support.hw_key_support =
  1741. platform_support->hw_key_support;
  1742. podev->platform_support.sha_hmac = platform_support->sha_hmac;
  1743. }
  1744. rc = misc_register(&podev->miscdevice);
  1745. if (rc) {
  1746. pr_err("%s: err: register failed for misc: %d\n", __func__, rc);
  1747. goto exit_qce_close;
  1748. }
  1749. podev->mem_client = qcedev_mem_new_client(MEM_ION);
  1750. if (!podev->mem_client) {
  1751. pr_err("%s: err: qcedev_mem_new_client failed\n", __func__);
  1752. goto err;
  1753. }
  1754. rc = of_platform_populate(pdev->dev.of_node, qcedev_match,
  1755. NULL, &pdev->dev);
  1756. if (rc) {
  1757. pr_err("%s: err: of_platform_populate failed: %d\n",
  1758. __func__, rc);
  1759. goto err;
  1760. }
  1761. return 0;
  1762. err:
  1763. if (podev->mem_client)
  1764. qcedev_mem_delete_client(podev->mem_client);
  1765. podev->mem_client = NULL;
  1766. misc_deregister(&podev->miscdevice);
  1767. exit_qce_close:
  1768. if (handle)
  1769. qce_close(handle);
  1770. exit_scale_busbandwidth:
  1771. msm_bus_scale_client_update_request(podev->bus_scale_handle, 0);
  1772. exit_unregister_bus_scale:
  1773. if (podev->platform_support.bus_scale_table != NULL)
  1774. msm_bus_scale_unregister_client(podev->bus_scale_handle);
  1775. podev->bus_scale_handle = 0;
  1776. platform_set_drvdata(pdev, NULL);
  1777. podev->pdev = NULL;
  1778. podev->qce = NULL;
  1779. return rc;
  1780. }
  1781. static int qcedev_probe(struct platform_device *pdev)
  1782. {
  1783. if (of_device_is_compatible(pdev->dev.of_node, "qcom,qcedev"))
  1784. return qcedev_probe_device(pdev);
  1785. else if (of_device_is_compatible(pdev->dev.of_node,
  1786. "qcom,qcedev,context-bank"))
  1787. return qcedev_parse_context_bank(pdev);
  1788. return -EINVAL;
  1789. };
  1790. static int qcedev_remove(struct platform_device *pdev)
  1791. {
  1792. struct qcedev_control *podev;
  1793. podev = platform_get_drvdata(pdev);
  1794. if (!podev)
  1795. return 0;
  1796. if (podev->qce)
  1797. qce_close(podev->qce);
  1798. if (podev->platform_support.bus_scale_table != NULL)
  1799. msm_bus_scale_unregister_client(podev->bus_scale_handle);
  1800. if (podev->miscdevice.minor != MISC_DYNAMIC_MINOR)
  1801. misc_deregister(&podev->miscdevice);
  1802. tasklet_kill(&podev->done_tasklet);
  1803. return 0;
  1804. };
  1805. static int qcedev_suspend(struct platform_device *pdev, pm_message_t state)
  1806. {
  1807. struct qcedev_control *podev;
  1808. int ret;
  1809. podev = platform_get_drvdata(pdev);
  1810. if (!podev || !podev->platform_support.bus_scale_table)
  1811. return 0;
  1812. mutex_lock(&qcedev_sent_bw_req);
  1813. if (podev->high_bw_req_count) {
  1814. ret = qcedev_control_clocks(podev, false);
  1815. if (ret)
  1816. goto suspend_exit;
  1817. }
  1818. suspend_exit:
  1819. mutex_unlock(&qcedev_sent_bw_req);
  1820. return 0;
  1821. }
  1822. static int qcedev_resume(struct platform_device *pdev)
  1823. {
  1824. struct qcedev_control *podev;
  1825. int ret;
  1826. podev = platform_get_drvdata(pdev);
  1827. if (!podev || !podev->platform_support.bus_scale_table)
  1828. return 0;
  1829. mutex_lock(&qcedev_sent_bw_req);
  1830. if (podev->high_bw_req_count) {
  1831. ret = qcedev_control_clocks(podev, true);
  1832. if (ret)
  1833. goto resume_exit;
  1834. }
  1835. resume_exit:
  1836. mutex_unlock(&qcedev_sent_bw_req);
  1837. return 0;
  1838. }
  1839. static struct platform_driver qcedev_plat_driver = {
  1840. .probe = qcedev_probe,
  1841. .remove = qcedev_remove,
  1842. .suspend = qcedev_suspend,
  1843. .resume = qcedev_resume,
  1844. .driver = {
  1845. .name = "qce",
  1846. .owner = THIS_MODULE,
  1847. .of_match_table = qcedev_match,
  1848. },
  1849. };
  1850. static int _disp_stats(int id)
  1851. {
  1852. struct qcedev_stat *pstat;
  1853. int len = 0;
  1854. pstat = &_qcedev_stat;
  1855. len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1,
  1856. "\nQTI QCE dev driver %d Statistics:\n",
  1857. id + 1);
  1858. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1859. " Encryption operation success : %d\n",
  1860. pstat->qcedev_enc_success);
  1861. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1862. " Encryption operation fail : %d\n",
  1863. pstat->qcedev_enc_fail);
  1864. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1865. " Decryption operation success : %d\n",
  1866. pstat->qcedev_dec_success);
  1867. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1868. " Encryption operation fail : %d\n",
  1869. pstat->qcedev_dec_fail);
  1870. return len;
  1871. }
  1872. static int _debug_stats_open(struct inode *inode, struct file *file)
  1873. {
  1874. file->private_data = inode->i_private;
  1875. return 0;
  1876. }
  1877. static ssize_t _debug_stats_read(struct file *file, char __user *buf,
  1878. size_t count, loff_t *ppos)
  1879. {
  1880. ssize_t rc = -EINVAL;
  1881. int qcedev = *((int *) file->private_data);
  1882. int len;
  1883. len = _disp_stats(qcedev);
  1884. if (len <= count)
  1885. rc = simple_read_from_buffer((void __user *) buf, len,
  1886. ppos, (void *) _debug_read_buf, len);
  1887. return rc;
  1888. }
  1889. static ssize_t _debug_stats_write(struct file *file, const char __user *buf,
  1890. size_t count, loff_t *ppos)
  1891. {
  1892. memset((char *)&_qcedev_stat, 0, sizeof(struct qcedev_stat));
  1893. return count;
  1894. };
  1895. static const struct file_operations _debug_stats_ops = {
  1896. .open = _debug_stats_open,
  1897. .read = _debug_stats_read,
  1898. .write = _debug_stats_write,
  1899. };
  1900. static int _qcedev_debug_init(void)
  1901. {
  1902. int rc;
  1903. char name[DEBUG_MAX_FNAME];
  1904. struct dentry *dent;
  1905. _debug_dent = debugfs_create_dir("qcedev", NULL);
  1906. if (IS_ERR(_debug_dent)) {
  1907. pr_err("qcedev debugfs_create_dir fail, error %ld\n",
  1908. PTR_ERR(_debug_dent));
  1909. return PTR_ERR(_debug_dent);
  1910. }
  1911. snprintf(name, DEBUG_MAX_FNAME-1, "stats-%d", 1);
  1912. _debug_qcedev = 0;
  1913. dent = debugfs_create_file(name, 0644, _debug_dent,
  1914. &_debug_qcedev, &_debug_stats_ops);
  1915. if (dent == NULL) {
  1916. pr_err("qcedev debugfs_create_file fail, error %ld\n",
  1917. PTR_ERR(dent));
  1918. rc = PTR_ERR(dent);
  1919. goto err;
  1920. }
  1921. return 0;
  1922. err:
  1923. debugfs_remove_recursive(_debug_dent);
  1924. return rc;
  1925. }
  1926. static int qcedev_init(void)
  1927. {
  1928. int rc;
  1929. rc = _qcedev_debug_init();
  1930. if (rc)
  1931. return rc;
  1932. return platform_driver_register(&qcedev_plat_driver);
  1933. }
  1934. static void qcedev_exit(void)
  1935. {
  1936. debugfs_remove_recursive(_debug_dent);
  1937. platform_driver_unregister(&qcedev_plat_driver);
  1938. }
  1939. MODULE_LICENSE("GPL v2");
  1940. MODULE_DESCRIPTION("QTI DEV Crypto driver");
  1941. module_init(qcedev_init);
  1942. module_exit(qcedev_exit);