cx23885.h 20 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <[email protected]>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/pci.h>
  18. #include <linux/i2c.h>
  19. #include <linux/kdev_t.h>
  20. #include <linux/slab.h>
  21. #include <media/v4l2-device.h>
  22. #include <media/v4l2-fh.h>
  23. #include <media/v4l2-ctrls.h>
  24. #include <media/tuner.h>
  25. #include <media/tveeprom.h>
  26. #include <media/videobuf2-dma-sg.h>
  27. #include <media/videobuf2-dvb.h>
  28. #include <media/rc-core.h>
  29. #include "cx23885-reg.h"
  30. #include "media/drv-intf/cx2341x.h"
  31. #include <linux/mutex.h>
  32. #define CX23885_VERSION "0.0.4"
  33. #define UNSET (-1U)
  34. #define CX23885_MAXBOARDS 8
  35. /* Max number of inputs by card */
  36. #define MAX_CX23885_INPUT 8
  37. #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
  38. #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
  39. #define CX23885_BOARD_NOAUTO UNSET
  40. #define CX23885_BOARD_UNKNOWN 0
  41. #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
  42. #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
  43. #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
  44. #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
  45. #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
  46. #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
  47. #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
  48. #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
  49. #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
  50. #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
  51. #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
  52. #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
  53. #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
  54. #define CX23885_BOARD_TBS_6920 14
  55. #define CX23885_BOARD_TEVII_S470 15
  56. #define CX23885_BOARD_DVBWORLD_2005 16
  57. #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
  58. #define CX23885_BOARD_HAUPPAUGE_HVR1270 18
  59. #define CX23885_BOARD_HAUPPAUGE_HVR1275 19
  60. #define CX23885_BOARD_HAUPPAUGE_HVR1255 20
  61. #define CX23885_BOARD_HAUPPAUGE_HVR1210 21
  62. #define CX23885_BOARD_MYGICA_X8506 22
  63. #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
  64. #define CX23885_BOARD_HAUPPAUGE_HVR1850 24
  65. #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
  66. #define CX23885_BOARD_HAUPPAUGE_HVR1290 26
  67. #define CX23885_BOARD_MYGICA_X8558PRO 27
  68. #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
  69. #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
  70. #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
  71. #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
  72. #define CX23885_BOARD_MPX885 32
  73. #define CX23885_BOARD_MYGICA_X8507 33
  74. #define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34
  75. #define CX23885_BOARD_TEVII_S471 35
  76. #define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36
  77. #define CX23885_BOARD_PROF_8000 37
  78. #define CX23885_BOARD_HAUPPAUGE_HVR4400 38
  79. #define CX23885_BOARD_AVERMEDIA_HC81R 39
  80. #define CX23885_BOARD_TBS_6981 40
  81. #define CX23885_BOARD_TBS_6980 41
  82. #define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42
  83. #define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43
  84. #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44
  85. #define CX23885_BOARD_DVBSKY_T9580 45
  86. #define CX23885_BOARD_DVBSKY_T980C 46
  87. #define CX23885_BOARD_DVBSKY_S950C 47
  88. #define CX23885_BOARD_TT_CT2_4500_CI 48
  89. #define CX23885_BOARD_DVBSKY_S950 49
  90. #define CX23885_BOARD_DVBSKY_S952 50
  91. #define CX23885_BOARD_DVBSKY_T982 51
  92. #define CX23885_BOARD_HAUPPAUGE_HVR5525 52
  93. #define CX23885_BOARD_HAUPPAUGE_STARBURST 53
  94. #define CX23885_BOARD_VIEWCAST_260E 54
  95. #define CX23885_BOARD_VIEWCAST_460E 55
  96. #define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB 56
  97. #define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC 57
  98. #define GPIO_0 0x00000001
  99. #define GPIO_1 0x00000002
  100. #define GPIO_2 0x00000004
  101. #define GPIO_3 0x00000008
  102. #define GPIO_4 0x00000010
  103. #define GPIO_5 0x00000020
  104. #define GPIO_6 0x00000040
  105. #define GPIO_7 0x00000080
  106. #define GPIO_8 0x00000100
  107. #define GPIO_9 0x00000200
  108. #define GPIO_10 0x00000400
  109. #define GPIO_11 0x00000800
  110. #define GPIO_12 0x00001000
  111. #define GPIO_13 0x00002000
  112. #define GPIO_14 0x00004000
  113. #define GPIO_15 0x00008000
  114. /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
  115. #define CX23885_NORMS (\
  116. V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
  117. V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
  118. V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
  119. V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
  120. struct cx23885_fmt {
  121. char *name;
  122. u32 fourcc; /* v4l2 format id */
  123. int depth;
  124. int flags;
  125. u32 cxformat;
  126. };
  127. struct cx23885_tvnorm {
  128. char *name;
  129. v4l2_std_id id;
  130. u32 cxiformat;
  131. u32 cxoformat;
  132. };
  133. enum cx23885_itype {
  134. CX23885_VMUX_COMPOSITE1 = 1,
  135. CX23885_VMUX_COMPOSITE2,
  136. CX23885_VMUX_COMPOSITE3,
  137. CX23885_VMUX_COMPOSITE4,
  138. CX23885_VMUX_SVIDEO,
  139. CX23885_VMUX_COMPONENT,
  140. CX23885_VMUX_TELEVISION,
  141. CX23885_VMUX_CABLE,
  142. CX23885_VMUX_DVB,
  143. CX23885_VMUX_DEBUG,
  144. CX23885_RADIO,
  145. };
  146. enum cx23885_src_sel_type {
  147. CX23885_SRC_SEL_EXT_656_VIDEO = 0,
  148. CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
  149. };
  150. struct cx23885_riscmem {
  151. unsigned int size;
  152. __le32 *cpu;
  153. __le32 *jmp;
  154. dma_addr_t dma;
  155. };
  156. /* buffer for one video frame */
  157. struct cx23885_buffer {
  158. /* common v4l buffer stuff -- must be first */
  159. struct vb2_v4l2_buffer vb;
  160. struct list_head queue;
  161. /* cx23885 specific */
  162. unsigned int bpl;
  163. struct cx23885_riscmem risc;
  164. struct cx23885_fmt *fmt;
  165. u32 count;
  166. };
  167. struct cx23885_input {
  168. enum cx23885_itype type;
  169. unsigned int vmux;
  170. unsigned int amux;
  171. u32 gpio0, gpio1, gpio2, gpio3;
  172. };
  173. typedef enum {
  174. CX23885_MPEG_UNDEFINED = 0,
  175. CX23885_MPEG_DVB,
  176. CX23885_ANALOG_VIDEO,
  177. CX23885_MPEG_ENCODER,
  178. } port_t;
  179. struct cx23885_board {
  180. char *name;
  181. port_t porta, portb, portc;
  182. int num_fds_portb, num_fds_portc;
  183. unsigned int tuner_type;
  184. unsigned int radio_type;
  185. unsigned char tuner_addr;
  186. unsigned char radio_addr;
  187. unsigned int tuner_bus;
  188. /* Vendors can and do run the PCIe bridge at different
  189. * clock rates, driven physically by crystals on the PCBs.
  190. * The core has to accommodate this. This allows the user
  191. * to add new boards with new frequencys. The value is
  192. * expressed in Hz.
  193. *
  194. * The core framework will default this value based on
  195. * current designs, but it can vary.
  196. */
  197. u32 clk_freq;
  198. struct cx23885_input input[MAX_CX23885_INPUT];
  199. int ci_type; /* for NetUP */
  200. /* Force bottom field first during DMA (888 workaround) */
  201. u32 force_bff;
  202. };
  203. struct cx23885_subid {
  204. u16 subvendor;
  205. u16 subdevice;
  206. u32 card;
  207. };
  208. struct cx23885_i2c {
  209. struct cx23885_dev *dev;
  210. int nr;
  211. /* i2c i/o */
  212. struct i2c_adapter i2c_adap;
  213. struct i2c_client i2c_client;
  214. u32 i2c_rc;
  215. /* 885 registers used for raw addess */
  216. u32 i2c_period;
  217. u32 reg_ctrl;
  218. u32 reg_stat;
  219. u32 reg_addr;
  220. u32 reg_rdata;
  221. u32 reg_wdata;
  222. };
  223. struct cx23885_dmaqueue {
  224. struct list_head active;
  225. u32 count;
  226. };
  227. struct cx23885_tsport {
  228. struct cx23885_dev *dev;
  229. unsigned nr;
  230. int sram_chno;
  231. struct vb2_dvb_frontends frontends;
  232. /* dma queues */
  233. struct cx23885_dmaqueue mpegq;
  234. u32 ts_packet_size;
  235. u32 ts_packet_count;
  236. int width;
  237. int height;
  238. spinlock_t slock;
  239. /* registers */
  240. u32 reg_gpcnt;
  241. u32 reg_gpcnt_ctl;
  242. u32 reg_dma_ctl;
  243. u32 reg_lngth;
  244. u32 reg_hw_sop_ctrl;
  245. u32 reg_gen_ctrl;
  246. u32 reg_bd_pkt_status;
  247. u32 reg_sop_status;
  248. u32 reg_fifo_ovfl_stat;
  249. u32 reg_vld_misc;
  250. u32 reg_ts_clk_en;
  251. u32 reg_ts_int_msk;
  252. u32 reg_ts_int_stat;
  253. u32 reg_src_sel;
  254. /* Default register vals */
  255. int pci_irqmask;
  256. u32 dma_ctl_val;
  257. u32 ts_int_msk_val;
  258. u32 gen_ctrl_val;
  259. u32 ts_clk_en_val;
  260. u32 src_sel_val;
  261. u32 vld_misc_val;
  262. u32 hw_sop_ctrl_val;
  263. /* Allow a single tsport to have multiple frontends */
  264. u32 num_frontends;
  265. void (*gate_ctrl)(struct cx23885_tsport *port, int open);
  266. void *port_priv;
  267. /* Workaround for a temp dvb_frontend that the tuner can attached to */
  268. struct dvb_frontend analog_fe;
  269. struct i2c_client *i2c_client_demod;
  270. struct i2c_client *i2c_client_tuner;
  271. struct i2c_client *i2c_client_sec;
  272. struct i2c_client *i2c_client_ci;
  273. int (*set_frontend)(struct dvb_frontend *fe);
  274. int (*fe_set_voltage)(struct dvb_frontend *fe,
  275. enum fe_sec_voltage voltage);
  276. };
  277. struct cx23885_kernel_ir {
  278. struct cx23885_dev *cx;
  279. char *name;
  280. char *phys;
  281. struct rc_dev *rc;
  282. };
  283. struct cx23885_audio_buffer {
  284. unsigned int bpl;
  285. struct cx23885_riscmem risc;
  286. void *vaddr;
  287. struct scatterlist *sglist;
  288. int sglen;
  289. int nr_pages;
  290. };
  291. struct cx23885_audio_dev {
  292. struct cx23885_dev *dev;
  293. struct pci_dev *pci;
  294. struct snd_card *card;
  295. spinlock_t lock;
  296. atomic_t count;
  297. unsigned int dma_size;
  298. unsigned int period_size;
  299. unsigned int num_periods;
  300. struct cx23885_audio_buffer *buf;
  301. struct snd_pcm_substream *substream;
  302. };
  303. struct cx23885_dev {
  304. atomic_t refcount;
  305. struct v4l2_device v4l2_dev;
  306. struct v4l2_ctrl_handler ctrl_handler;
  307. /* pci stuff */
  308. struct pci_dev *pci;
  309. unsigned char pci_rev, pci_lat;
  310. int pci_bus, pci_slot;
  311. u32 __iomem *lmmio;
  312. u8 __iomem *bmmio;
  313. int pci_irqmask;
  314. spinlock_t pci_irqmask_lock; /* protects mask reg too */
  315. int hwrevision;
  316. /* This valud is board specific and is used to configure the
  317. * AV core so we see nice clean and stable video and audio. */
  318. u32 clk_freq;
  319. /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
  320. struct cx23885_i2c i2c_bus[3];
  321. int nr;
  322. struct mutex lock;
  323. struct mutex gpio_lock;
  324. /* board details */
  325. unsigned int board;
  326. char name[32];
  327. struct cx23885_tsport ts1, ts2;
  328. /* sram configuration */
  329. struct sram_channel *sram_channels;
  330. enum {
  331. CX23885_BRIDGE_UNDEFINED = 0,
  332. CX23885_BRIDGE_885 = 885,
  333. CX23885_BRIDGE_887 = 887,
  334. CX23885_BRIDGE_888 = 888,
  335. } bridge;
  336. /* Analog video */
  337. unsigned int input;
  338. unsigned int audinput; /* Selectable audio input */
  339. u32 tvaudio;
  340. v4l2_std_id tvnorm;
  341. unsigned int tuner_type;
  342. unsigned char tuner_addr;
  343. unsigned int tuner_bus;
  344. unsigned int radio_type;
  345. unsigned char radio_addr;
  346. struct v4l2_subdev *sd_cx25840;
  347. struct work_struct cx25840_work;
  348. /* Infrared */
  349. struct v4l2_subdev *sd_ir;
  350. struct work_struct ir_rx_work;
  351. unsigned long ir_rx_notifications;
  352. struct work_struct ir_tx_work;
  353. unsigned long ir_tx_notifications;
  354. struct cx23885_kernel_ir *kernel_ir;
  355. atomic_t ir_input_stopping;
  356. /* V4l */
  357. u32 freq;
  358. struct video_device *video_dev;
  359. struct video_device *vbi_dev;
  360. /* video capture */
  361. struct cx23885_fmt *fmt;
  362. unsigned int width, height;
  363. unsigned field;
  364. struct cx23885_dmaqueue vidq;
  365. struct vb2_queue vb2_vidq;
  366. struct cx23885_dmaqueue vbiq;
  367. struct vb2_queue vb2_vbiq;
  368. spinlock_t slock;
  369. /* MPEG Encoder ONLY settings */
  370. u32 cx23417_mailbox;
  371. struct cx2341x_handler cxhdl;
  372. struct video_device *v4l_device;
  373. struct vb2_queue vb2_mpegq;
  374. struct cx23885_tvnorm encodernorm;
  375. /* Analog raw audio */
  376. struct cx23885_audio_dev *audio_dev;
  377. };
  378. static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
  379. {
  380. return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
  381. }
  382. #define call_all(dev, o, f, args...) \
  383. v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
  384. #define CX23885_HW_888_IR (1 << 0)
  385. #define CX23885_HW_AV_CORE (1 << 1)
  386. #define call_hw(dev, grpid, o, f, args...) \
  387. v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
  388. extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
  389. #define SRAM_CH01 0 /* Video A */
  390. #define SRAM_CH02 1 /* VBI A */
  391. #define SRAM_CH03 2 /* Video B */
  392. #define SRAM_CH04 3 /* Transport via B */
  393. #define SRAM_CH05 4 /* VBI B */
  394. #define SRAM_CH06 5 /* Video C */
  395. #define SRAM_CH07 6 /* Transport via C */
  396. #define SRAM_CH08 7 /* Audio Internal A */
  397. #define SRAM_CH09 8 /* Audio Internal B */
  398. #define SRAM_CH10 9 /* Audio External */
  399. #define SRAM_CH11 10 /* COMB_3D_N */
  400. #define SRAM_CH12 11 /* Comb 3D N1 */
  401. #define SRAM_CH13 12 /* Comb 3D N2 */
  402. #define SRAM_CH14 13 /* MOE Vid */
  403. #define SRAM_CH15 14 /* MOE RSLT */
  404. struct sram_channel {
  405. char *name;
  406. u32 cmds_start;
  407. u32 ctrl_start;
  408. u32 cdt;
  409. u32 fifo_start;
  410. u32 fifo_size;
  411. u32 ptr1_reg;
  412. u32 ptr2_reg;
  413. u32 cnt1_reg;
  414. u32 cnt2_reg;
  415. u32 jumponly;
  416. };
  417. /* ----------------------------------------------------------- */
  418. #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
  419. #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
  420. #define cx_andor(reg, mask, value) \
  421. writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
  422. ((value) & (mask)), dev->lmmio+((reg)>>2))
  423. #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
  424. #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
  425. /* ----------------------------------------------------------- */
  426. /* cx23885-core.c */
  427. extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
  428. struct sram_channel *ch,
  429. unsigned int bpl, u32 risc);
  430. extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
  431. struct sram_channel *ch);
  432. extern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc,
  433. struct scatterlist *sglist,
  434. unsigned int top_offset, unsigned int bottom_offset,
  435. unsigned int bpl, unsigned int padding, unsigned int lines);
  436. extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
  437. struct cx23885_riscmem *risc, struct scatterlist *sglist,
  438. unsigned int top_offset, unsigned int bottom_offset,
  439. unsigned int bpl, unsigned int padding, unsigned int lines);
  440. int cx23885_start_dma(struct cx23885_tsport *port,
  441. struct cx23885_dmaqueue *q,
  442. struct cx23885_buffer *buf);
  443. void cx23885_cancel_buffers(struct cx23885_tsport *port);
  444. extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
  445. extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
  446. extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
  447. extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
  448. int asoutput);
  449. extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
  450. extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
  451. extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
  452. extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
  453. /* ----------------------------------------------------------- */
  454. /* cx23885-cards.c */
  455. extern struct cx23885_board cx23885_boards[];
  456. extern const unsigned int cx23885_bcount;
  457. extern struct cx23885_subid cx23885_subids[];
  458. extern const unsigned int cx23885_idcount;
  459. extern int cx23885_tuner_callback(void *priv, int component,
  460. int command, int arg);
  461. extern void cx23885_card_list(struct cx23885_dev *dev);
  462. extern int cx23885_ir_init(struct cx23885_dev *dev);
  463. extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
  464. extern void cx23885_ir_fini(struct cx23885_dev *dev);
  465. extern void cx23885_gpio_setup(struct cx23885_dev *dev);
  466. extern void cx23885_card_setup(struct cx23885_dev *dev);
  467. extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
  468. extern int cx23885_dvb_register(struct cx23885_tsport *port);
  469. extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
  470. extern int cx23885_buf_prepare(struct cx23885_buffer *buf,
  471. struct cx23885_tsport *port);
  472. extern void cx23885_buf_queue(struct cx23885_tsport *port,
  473. struct cx23885_buffer *buf);
  474. extern void cx23885_free_buffer(struct cx23885_dev *dev,
  475. struct cx23885_buffer *buf);
  476. /* ----------------------------------------------------------- */
  477. /* cx23885-video.c */
  478. /* Video */
  479. extern int cx23885_video_register(struct cx23885_dev *dev);
  480. extern void cx23885_video_unregister(struct cx23885_dev *dev);
  481. extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
  482. extern void cx23885_video_wakeup(struct cx23885_dev *dev,
  483. struct cx23885_dmaqueue *q, u32 count);
  484. int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i);
  485. int cx23885_set_input(struct file *file, void *priv, unsigned int i);
  486. int cx23885_get_input(struct file *file, void *priv, unsigned int *i);
  487. int cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f);
  488. int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm);
  489. /* ----------------------------------------------------------- */
  490. /* cx23885-vbi.c */
  491. extern int cx23885_vbi_fmt(struct file *file, void *priv,
  492. struct v4l2_format *f);
  493. extern void cx23885_vbi_timeout(unsigned long data);
  494. extern struct vb2_ops cx23885_vbi_qops;
  495. extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
  496. /* cx23885-i2c.c */
  497. extern int cx23885_i2c_register(struct cx23885_i2c *bus);
  498. extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
  499. extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
  500. /* ----------------------------------------------------------- */
  501. /* cx23885-417.c */
  502. extern int cx23885_417_register(struct cx23885_dev *dev);
  503. extern void cx23885_417_unregister(struct cx23885_dev *dev);
  504. extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
  505. extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
  506. extern void cx23885_mc417_init(struct cx23885_dev *dev);
  507. extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
  508. extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
  509. extern int mc417_register_read(struct cx23885_dev *dev,
  510. u16 address, u32 *value);
  511. extern int mc417_register_write(struct cx23885_dev *dev,
  512. u16 address, u32 value);
  513. extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
  514. extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
  515. extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
  516. /* ----------------------------------------------------------- */
  517. /* cx23885-alsa.c */
  518. extern struct cx23885_audio_dev *cx23885_audio_register(
  519. struct cx23885_dev *dev);
  520. extern void cx23885_audio_unregister(struct cx23885_dev *dev);
  521. extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
  522. extern int cx23885_risc_databuffer(struct pci_dev *pci,
  523. struct cx23885_riscmem *risc,
  524. struct scatterlist *sglist,
  525. unsigned int bpl,
  526. unsigned int lines,
  527. unsigned int lpi);
  528. /* ----------------------------------------------------------- */
  529. /* tv norms */
  530. static inline unsigned int norm_maxh(v4l2_std_id norm)
  531. {
  532. return (norm & V4L2_STD_525_60) ? 480 : 576;
  533. }