cx88-dvb.c 49 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855
  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <[email protected]>
  7. * (c) 2004 Gerd Knorr <[email protected]> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc4000.h"
  42. #include "xc5000.h"
  43. #include "nxt200x.h"
  44. #include "cx24123.h"
  45. #include "isl6421.h"
  46. #include "tuner-simple.h"
  47. #include "tda9887.h"
  48. #include "s5h1411.h"
  49. #include "stv0299.h"
  50. #include "z0194a.h"
  51. #include "stv0288.h"
  52. #include "stb6000.h"
  53. #include "cx24116.h"
  54. #include "stv0900.h"
  55. #include "stb6100.h"
  56. #include "stb6100_proc.h"
  57. #include "mb86a16.h"
  58. #include "ts2020.h"
  59. #include "ds3000.h"
  60. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  61. MODULE_AUTHOR("Chris Pascoe <[email protected]>");
  62. MODULE_AUTHOR("Gerd Knorr <[email protected]> [SuSE Labs]");
  63. MODULE_LICENSE("GPL");
  64. MODULE_VERSION(CX88_VERSION);
  65. static unsigned int debug;
  66. module_param(debug, int, 0644);
  67. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  68. static unsigned int dvb_buf_tscnt = 32;
  69. module_param(dvb_buf_tscnt, int, 0644);
  70. MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
  71. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  72. #define dprintk(level,fmt, arg...) if (debug >= level) \
  73. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  74. /* ------------------------------------------------------------------ */
  75. static int queue_setup(struct vb2_queue *q,
  76. unsigned int *num_buffers, unsigned int *num_planes,
  77. unsigned int sizes[], struct device *alloc_devs[])
  78. {
  79. struct cx8802_dev *dev = q->drv_priv;
  80. *num_planes = 1;
  81. dev->ts_packet_size = 188 * 4;
  82. dev->ts_packet_count = dvb_buf_tscnt;
  83. sizes[0] = dev->ts_packet_size * dev->ts_packet_count;
  84. *num_buffers = dvb_buf_tscnt;
  85. return 0;
  86. }
  87. static int buffer_prepare(struct vb2_buffer *vb)
  88. {
  89. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  90. struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
  91. struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
  92. return cx8802_buf_prepare(vb->vb2_queue, dev, buf);
  93. }
  94. static void buffer_finish(struct vb2_buffer *vb)
  95. {
  96. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  97. struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
  98. struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
  99. struct cx88_riscmem *risc = &buf->risc;
  100. if (risc->cpu)
  101. pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
  102. memset(risc, 0, sizeof(*risc));
  103. }
  104. static void buffer_queue(struct vb2_buffer *vb)
  105. {
  106. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  107. struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
  108. struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
  109. cx8802_buf_queue(dev, buf);
  110. }
  111. static int start_streaming(struct vb2_queue *q, unsigned int count)
  112. {
  113. struct cx8802_dev *dev = q->drv_priv;
  114. struct cx88_dmaqueue *dmaq = &dev->mpegq;
  115. struct cx88_buffer *buf;
  116. buf = list_entry(dmaq->active.next, struct cx88_buffer, list);
  117. cx8802_start_dma(dev, dmaq, buf);
  118. return 0;
  119. }
  120. static void stop_streaming(struct vb2_queue *q)
  121. {
  122. struct cx8802_dev *dev = q->drv_priv;
  123. struct cx88_dmaqueue *dmaq = &dev->mpegq;
  124. unsigned long flags;
  125. cx8802_cancel_buffers(dev);
  126. spin_lock_irqsave(&dev->slock, flags);
  127. while (!list_empty(&dmaq->active)) {
  128. struct cx88_buffer *buf = list_entry(dmaq->active.next,
  129. struct cx88_buffer, list);
  130. list_del(&buf->list);
  131. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  132. }
  133. spin_unlock_irqrestore(&dev->slock, flags);
  134. }
  135. static const struct vb2_ops dvb_qops = {
  136. .queue_setup = queue_setup,
  137. .buf_prepare = buffer_prepare,
  138. .buf_finish = buffer_finish,
  139. .buf_queue = buffer_queue,
  140. .wait_prepare = vb2_ops_wait_prepare,
  141. .wait_finish = vb2_ops_wait_finish,
  142. .start_streaming = start_streaming,
  143. .stop_streaming = stop_streaming,
  144. };
  145. /* ------------------------------------------------------------------ */
  146. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  147. {
  148. struct cx8802_dev *dev= fe->dvb->priv;
  149. struct cx8802_driver *drv = NULL;
  150. int ret = 0;
  151. int fe_id;
  152. fe_id = vb2_dvb_find_frontend(&dev->frontends, fe);
  153. if (!fe_id) {
  154. printk(KERN_ERR "%s() No frontend found\n", __func__);
  155. return -EINVAL;
  156. }
  157. mutex_lock(&dev->core->lock);
  158. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  159. if (drv) {
  160. if (acquire){
  161. dev->frontends.active_fe_id = fe_id;
  162. ret = drv->request_acquire(drv);
  163. } else {
  164. ret = drv->request_release(drv);
  165. dev->frontends.active_fe_id = 0;
  166. }
  167. }
  168. mutex_unlock(&dev->core->lock);
  169. return ret;
  170. }
  171. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  172. {
  173. struct vb2_dvb_frontends *f;
  174. struct vb2_dvb_frontend *fe;
  175. if (!core->dvbdev)
  176. return;
  177. f = &core->dvbdev->frontends;
  178. if (!f)
  179. return;
  180. if (f->gate <= 1) /* undefined or fe0 */
  181. fe = vb2_dvb_get_frontend(f, 1);
  182. else
  183. fe = vb2_dvb_get_frontend(f, f->gate);
  184. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  185. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  186. }
  187. /* ------------------------------------------------------------------ */
  188. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  189. {
  190. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  191. static const u8 reset [] = { RESET, 0x80 };
  192. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  193. static const u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  194. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  195. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  196. mt352_write(fe, clock_config, sizeof(clock_config));
  197. udelay(200);
  198. mt352_write(fe, reset, sizeof(reset));
  199. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  200. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  201. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  202. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  203. return 0;
  204. }
  205. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  206. {
  207. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  208. static const u8 reset [] = { RESET, 0x80 };
  209. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  210. static const u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  211. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  212. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  213. mt352_write(fe, clock_config, sizeof(clock_config));
  214. udelay(200);
  215. mt352_write(fe, reset, sizeof(reset));
  216. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  217. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  218. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  219. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  220. return 0;
  221. }
  222. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  223. {
  224. static const u8 clock_config [] = { 0x89, 0x38, 0x39 };
  225. static const u8 reset [] = { 0x50, 0x80 };
  226. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  227. static const u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  228. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  229. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  230. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  231. mt352_write(fe, clock_config, sizeof(clock_config));
  232. udelay(2000);
  233. mt352_write(fe, reset, sizeof(reset));
  234. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  235. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  236. udelay(2000);
  237. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  238. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  239. return 0;
  240. }
  241. static const struct mt352_config dvico_fusionhdtv = {
  242. .demod_address = 0x0f,
  243. .demod_init = dvico_fusionhdtv_demod_init,
  244. };
  245. static const struct mt352_config dntv_live_dvbt_config = {
  246. .demod_address = 0x0f,
  247. .demod_init = dntv_live_dvbt_demod_init,
  248. };
  249. static const struct mt352_config dvico_fusionhdtv_dual = {
  250. .demod_address = 0x0f,
  251. .demod_init = dvico_dual_demod_init,
  252. };
  253. static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  254. .demod_address = (0x1e >> 1),
  255. .no_tuner = 1,
  256. .if2 = 45600,
  257. };
  258. static struct mb86a16_config twinhan_vp1027 = {
  259. .demod_address = 0x08,
  260. };
  261. #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
  262. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  263. {
  264. static const u8 clock_config [] = { 0x89, 0x38, 0x38 };
  265. static const u8 reset [] = { 0x50, 0x80 };
  266. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  267. static const u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  268. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  269. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  270. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  271. mt352_write(fe, clock_config, sizeof(clock_config));
  272. udelay(2000);
  273. mt352_write(fe, reset, sizeof(reset));
  274. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  275. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  276. udelay(2000);
  277. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  278. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  279. return 0;
  280. }
  281. static const struct mt352_config dntv_live_dvbt_pro_config = {
  282. .demod_address = 0x0f,
  283. .no_tuner = 1,
  284. .demod_init = dntv_live_dvbt_pro_demod_init,
  285. };
  286. #endif
  287. static const struct zl10353_config dvico_fusionhdtv_hybrid = {
  288. .demod_address = 0x0f,
  289. .no_tuner = 1,
  290. };
  291. static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
  292. .demod_address = 0x0f,
  293. .if2 = 45600,
  294. .no_tuner = 1,
  295. };
  296. static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  297. .demod_address = 0x0f,
  298. .if2 = 4560,
  299. .no_tuner = 1,
  300. .demod_init = dvico_fusionhdtv_demod_init,
  301. };
  302. static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  303. .demod_address = 0x0f,
  304. };
  305. static const struct cx22702_config connexant_refboard_config = {
  306. .demod_address = 0x43,
  307. .output_mode = CX22702_SERIAL_OUTPUT,
  308. };
  309. static const struct cx22702_config hauppauge_hvr_config = {
  310. .demod_address = 0x63,
  311. .output_mode = CX22702_SERIAL_OUTPUT,
  312. };
  313. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  314. {
  315. struct cx8802_dev *dev= fe->dvb->priv;
  316. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  317. return 0;
  318. }
  319. static const struct or51132_config pchdtv_hd3000 = {
  320. .demod_address = 0x15,
  321. .set_ts_params = or51132_set_ts_param,
  322. };
  323. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  324. {
  325. struct cx8802_dev *dev= fe->dvb->priv;
  326. struct cx88_core *core = dev->core;
  327. dprintk(1, "%s: index = %d\n", __func__, index);
  328. if (index == 0)
  329. cx_clear(MO_GP0_IO, 8);
  330. else
  331. cx_set(MO_GP0_IO, 8);
  332. return 0;
  333. }
  334. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  335. {
  336. struct cx8802_dev *dev= fe->dvb->priv;
  337. if (is_punctured)
  338. dev->ts_gen_cntrl |= 0x04;
  339. else
  340. dev->ts_gen_cntrl &= ~0x04;
  341. return 0;
  342. }
  343. static struct lgdt330x_config fusionhdtv_3_gold = {
  344. .demod_address = 0x0e,
  345. .demod_chip = LGDT3302,
  346. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  347. .set_ts_params = lgdt330x_set_ts_param,
  348. };
  349. static const struct lgdt330x_config fusionhdtv_5_gold = {
  350. .demod_address = 0x0e,
  351. .demod_chip = LGDT3303,
  352. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  353. .set_ts_params = lgdt330x_set_ts_param,
  354. };
  355. static const struct lgdt330x_config pchdtv_hd5500 = {
  356. .demod_address = 0x59,
  357. .demod_chip = LGDT3303,
  358. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  359. .set_ts_params = lgdt330x_set_ts_param,
  360. };
  361. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  362. {
  363. struct cx8802_dev *dev= fe->dvb->priv;
  364. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  365. return 0;
  366. }
  367. static const struct nxt200x_config ati_hdtvwonder = {
  368. .demod_address = 0x0a,
  369. .set_ts_params = nxt200x_set_ts_param,
  370. };
  371. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  372. int is_punctured)
  373. {
  374. struct cx8802_dev *dev= fe->dvb->priv;
  375. dev->ts_gen_cntrl = 0x02;
  376. return 0;
  377. }
  378. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  379. enum fe_sec_voltage voltage)
  380. {
  381. struct cx8802_dev *dev= fe->dvb->priv;
  382. struct cx88_core *core = dev->core;
  383. if (voltage == SEC_VOLTAGE_OFF)
  384. cx_write(MO_GP0_IO, 0x000006fb);
  385. else
  386. cx_write(MO_GP0_IO, 0x000006f9);
  387. if (core->prev_set_voltage)
  388. return core->prev_set_voltage(fe, voltage);
  389. return 0;
  390. }
  391. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  392. enum fe_sec_voltage voltage)
  393. {
  394. struct cx8802_dev *dev= fe->dvb->priv;
  395. struct cx88_core *core = dev->core;
  396. if (voltage == SEC_VOLTAGE_OFF) {
  397. dprintk(1,"LNB Voltage OFF\n");
  398. cx_write(MO_GP0_IO, 0x0000efff);
  399. }
  400. if (core->prev_set_voltage)
  401. return core->prev_set_voltage(fe, voltage);
  402. return 0;
  403. }
  404. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  405. enum fe_sec_voltage voltage)
  406. {
  407. struct cx8802_dev *dev= fe->dvb->priv;
  408. struct cx88_core *core = dev->core;
  409. cx_set(MO_GP0_IO, 0x6040);
  410. switch (voltage) {
  411. case SEC_VOLTAGE_13:
  412. cx_clear(MO_GP0_IO, 0x20);
  413. break;
  414. case SEC_VOLTAGE_18:
  415. cx_set(MO_GP0_IO, 0x20);
  416. break;
  417. case SEC_VOLTAGE_OFF:
  418. cx_clear(MO_GP0_IO, 0x20);
  419. break;
  420. }
  421. if (core->prev_set_voltage)
  422. return core->prev_set_voltage(fe, voltage);
  423. return 0;
  424. }
  425. static int vp1027_set_voltage(struct dvb_frontend *fe,
  426. enum fe_sec_voltage voltage)
  427. {
  428. struct cx8802_dev *dev = fe->dvb->priv;
  429. struct cx88_core *core = dev->core;
  430. switch (voltage) {
  431. case SEC_VOLTAGE_13:
  432. dprintk(1, "LNB SEC Voltage=13\n");
  433. cx_write(MO_GP0_IO, 0x00001220);
  434. break;
  435. case SEC_VOLTAGE_18:
  436. dprintk(1, "LNB SEC Voltage=18\n");
  437. cx_write(MO_GP0_IO, 0x00001222);
  438. break;
  439. case SEC_VOLTAGE_OFF:
  440. dprintk(1, "LNB Voltage OFF\n");
  441. cx_write(MO_GP0_IO, 0x00001230);
  442. break;
  443. }
  444. if (core->prev_set_voltage)
  445. return core->prev_set_voltage(fe, voltage);
  446. return 0;
  447. }
  448. static const struct cx24123_config geniatech_dvbs_config = {
  449. .demod_address = 0x55,
  450. .set_ts_params = cx24123_set_ts_param,
  451. };
  452. static const struct cx24123_config hauppauge_novas_config = {
  453. .demod_address = 0x55,
  454. .set_ts_params = cx24123_set_ts_param,
  455. };
  456. static const struct cx24123_config kworld_dvbs_100_config = {
  457. .demod_address = 0x15,
  458. .set_ts_params = cx24123_set_ts_param,
  459. .lnb_polarity = 1,
  460. };
  461. static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  462. .demod_address = 0x32 >> 1,
  463. .output_mode = S5H1409_PARALLEL_OUTPUT,
  464. .gpio = S5H1409_GPIO_ON,
  465. .qam_if = 44000,
  466. .inversion = S5H1409_INVERSION_OFF,
  467. .status_mode = S5H1409_DEMODLOCKING,
  468. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  469. };
  470. static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  471. .demod_address = 0x32 >> 1,
  472. .output_mode = S5H1409_SERIAL_OUTPUT,
  473. .gpio = S5H1409_GPIO_OFF,
  474. .inversion = S5H1409_INVERSION_OFF,
  475. .status_mode = S5H1409_DEMODLOCKING,
  476. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  477. };
  478. static const struct s5h1409_config kworld_atsc_120_config = {
  479. .demod_address = 0x32 >> 1,
  480. .output_mode = S5H1409_SERIAL_OUTPUT,
  481. .gpio = S5H1409_GPIO_OFF,
  482. .inversion = S5H1409_INVERSION_OFF,
  483. .status_mode = S5H1409_DEMODLOCKING,
  484. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  485. };
  486. static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  487. .i2c_address = 0x64,
  488. .if_khz = 5380,
  489. };
  490. static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  491. .demod_address = (0x1e >> 1),
  492. .no_tuner = 1,
  493. .if2 = 45600,
  494. };
  495. static const struct zl10353_config cx88_geniatech_x8000_mt = {
  496. .demod_address = (0x1e >> 1),
  497. .no_tuner = 1,
  498. .disable_i2c_gate_ctrl = 1,
  499. };
  500. static const struct s5h1411_config dvico_fusionhdtv7_config = {
  501. .output_mode = S5H1411_SERIAL_OUTPUT,
  502. .gpio = S5H1411_GPIO_ON,
  503. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  504. .qam_if = S5H1411_IF_44000,
  505. .vsb_if = S5H1411_IF_44000,
  506. .inversion = S5H1411_INVERSION_OFF,
  507. .status_mode = S5H1411_DEMODLOCKING
  508. };
  509. static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  510. .i2c_address = 0xc2 >> 1,
  511. .if_khz = 5380,
  512. };
  513. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  514. {
  515. struct dvb_frontend *fe;
  516. struct vb2_dvb_frontend *fe0 = NULL;
  517. struct xc2028_ctrl ctl;
  518. struct xc2028_config cfg = {
  519. .i2c_adap = &dev->core->i2c_adap,
  520. .i2c_addr = addr,
  521. .ctrl = &ctl,
  522. };
  523. /* Get the first frontend */
  524. fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
  525. if (!fe0)
  526. return -EINVAL;
  527. if (!fe0->dvb.frontend) {
  528. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  529. "Can't attach xc3028\n",
  530. dev->core->name);
  531. return -EINVAL;
  532. }
  533. /*
  534. * Some xc3028 devices may be hidden by an I2C gate. This is known
  535. * to happen with some s5h1409-based devices.
  536. * Now that I2C gate is open, sets up xc3028 configuration
  537. */
  538. cx88_setup_xc3028(dev->core, &ctl);
  539. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  540. if (!fe) {
  541. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  542. dev->core->name);
  543. dvb_frontend_detach(fe0->dvb.frontend);
  544. dvb_unregister_frontend(fe0->dvb.frontend);
  545. fe0->dvb.frontend = NULL;
  546. return -EINVAL;
  547. }
  548. printk(KERN_INFO "%s/2: xc3028 attached\n",
  549. dev->core->name);
  550. return 0;
  551. }
  552. static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
  553. {
  554. struct dvb_frontend *fe;
  555. struct vb2_dvb_frontend *fe0 = NULL;
  556. /* Get the first frontend */
  557. fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
  558. if (!fe0)
  559. return -EINVAL;
  560. if (!fe0->dvb.frontend) {
  561. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  562. "Can't attach xc4000\n",
  563. dev->core->name);
  564. return -EINVAL;
  565. }
  566. fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
  567. cfg);
  568. if (!fe) {
  569. printk(KERN_ERR "%s/2: xc4000 attach failed\n",
  570. dev->core->name);
  571. dvb_frontend_detach(fe0->dvb.frontend);
  572. dvb_unregister_frontend(fe0->dvb.frontend);
  573. fe0->dvb.frontend = NULL;
  574. return -EINVAL;
  575. }
  576. printk(KERN_INFO "%s/2: xc4000 attached\n", dev->core->name);
  577. return 0;
  578. }
  579. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  580. int is_punctured)
  581. {
  582. struct cx8802_dev *dev = fe->dvb->priv;
  583. dev->ts_gen_cntrl = 0x2;
  584. return 0;
  585. }
  586. static int stv0900_set_ts_param(struct dvb_frontend *fe,
  587. int is_punctured)
  588. {
  589. struct cx8802_dev *dev = fe->dvb->priv;
  590. dev->ts_gen_cntrl = 0;
  591. return 0;
  592. }
  593. static int cx24116_reset_device(struct dvb_frontend *fe)
  594. {
  595. struct cx8802_dev *dev = fe->dvb->priv;
  596. struct cx88_core *core = dev->core;
  597. /* Reset the part */
  598. /* Put the cx24116 into reset */
  599. cx_write(MO_SRST_IO, 0);
  600. msleep(10);
  601. /* Take the cx24116 out of reset */
  602. cx_write(MO_SRST_IO, 1);
  603. msleep(10);
  604. return 0;
  605. }
  606. static const struct cx24116_config hauppauge_hvr4000_config = {
  607. .demod_address = 0x05,
  608. .set_ts_params = cx24116_set_ts_param,
  609. .reset_device = cx24116_reset_device,
  610. };
  611. static const struct cx24116_config tevii_s460_config = {
  612. .demod_address = 0x55,
  613. .set_ts_params = cx24116_set_ts_param,
  614. .reset_device = cx24116_reset_device,
  615. };
  616. static int ds3000_set_ts_param(struct dvb_frontend *fe,
  617. int is_punctured)
  618. {
  619. struct cx8802_dev *dev = fe->dvb->priv;
  620. dev->ts_gen_cntrl = 4;
  621. return 0;
  622. }
  623. static struct ds3000_config tevii_ds3000_config = {
  624. .demod_address = 0x68,
  625. .set_ts_params = ds3000_set_ts_param,
  626. };
  627. static struct ts2020_config tevii_ts2020_config = {
  628. .tuner_address = 0x60,
  629. .clk_out_div = 1,
  630. };
  631. static const struct stv0900_config prof_7301_stv0900_config = {
  632. .demod_address = 0x6a,
  633. /* demod_mode = 0,*/
  634. .xtal = 27000000,
  635. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  636. .diseqc_mode = 2,/* 2/3 PWM */
  637. .tun1_maddress = 0,/* 0x60 */
  638. .tun1_adc = 0,/* 2 Vpp */
  639. .path1_mode = 3,
  640. .set_ts_params = stv0900_set_ts_param,
  641. };
  642. static const struct stb6100_config prof_7301_stb6100_config = {
  643. .tuner_address = 0x60,
  644. .refclock = 27000000,
  645. };
  646. static const struct stv0299_config tevii_tuner_sharp_config = {
  647. .demod_address = 0x68,
  648. .inittab = sharp_z0194a_inittab,
  649. .mclk = 88000000UL,
  650. .invert = 1,
  651. .skip_reinit = 0,
  652. .lock_output = 1,
  653. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  654. .min_delay_ms = 100,
  655. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  656. .set_ts_params = cx24116_set_ts_param,
  657. };
  658. static const struct stv0288_config tevii_tuner_earda_config = {
  659. .demod_address = 0x68,
  660. .min_delay_ms = 100,
  661. .set_ts_params = cx24116_set_ts_param,
  662. };
  663. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  664. {
  665. struct cx88_core *core = dev->core;
  666. struct vb2_dvb_frontend *fe = NULL;
  667. int i;
  668. mutex_init(&dev->frontends.lock);
  669. INIT_LIST_HEAD(&dev->frontends.felist);
  670. if (!core->board.num_frontends)
  671. return -ENODEV;
  672. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  673. core->board.num_frontends);
  674. for (i = 1; i <= core->board.num_frontends; i++) {
  675. fe = vb2_dvb_alloc_frontend(&dev->frontends, i);
  676. if (!fe) {
  677. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  678. vb2_dvb_dealloc_frontends(&dev->frontends);
  679. return -ENOMEM;
  680. }
  681. }
  682. return 0;
  683. }
  684. static const u8 samsung_smt_7020_inittab[] = {
  685. 0x01, 0x15,
  686. 0x02, 0x00,
  687. 0x03, 0x00,
  688. 0x04, 0x7D,
  689. 0x05, 0x0F,
  690. 0x06, 0x02,
  691. 0x07, 0x00,
  692. 0x08, 0x60,
  693. 0x0A, 0xC2,
  694. 0x0B, 0x00,
  695. 0x0C, 0x01,
  696. 0x0D, 0x81,
  697. 0x0E, 0x44,
  698. 0x0F, 0x09,
  699. 0x10, 0x3C,
  700. 0x11, 0x84,
  701. 0x12, 0xDA,
  702. 0x13, 0x99,
  703. 0x14, 0x8D,
  704. 0x15, 0xCE,
  705. 0x16, 0xE8,
  706. 0x17, 0x43,
  707. 0x18, 0x1C,
  708. 0x19, 0x1B,
  709. 0x1A, 0x1D,
  710. 0x1C, 0x12,
  711. 0x1D, 0x00,
  712. 0x1E, 0x00,
  713. 0x1F, 0x00,
  714. 0x20, 0x00,
  715. 0x21, 0x00,
  716. 0x22, 0x00,
  717. 0x23, 0x00,
  718. 0x28, 0x02,
  719. 0x29, 0x28,
  720. 0x2A, 0x14,
  721. 0x2B, 0x0F,
  722. 0x2C, 0x09,
  723. 0x2D, 0x05,
  724. 0x31, 0x1F,
  725. 0x32, 0x19,
  726. 0x33, 0xFC,
  727. 0x34, 0x13,
  728. 0xff, 0xff,
  729. };
  730. static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
  731. {
  732. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  733. struct cx8802_dev *dev = fe->dvb->priv;
  734. u8 buf[4];
  735. u32 div;
  736. struct i2c_msg msg = {
  737. .addr = 0x61,
  738. .flags = 0,
  739. .buf = buf,
  740. .len = sizeof(buf) };
  741. div = c->frequency / 125;
  742. buf[0] = (div >> 8) & 0x7f;
  743. buf[1] = div & 0xff;
  744. buf[2] = 0x84; /* 0xC4 */
  745. buf[3] = 0x00;
  746. if (c->frequency < 1500000)
  747. buf[3] |= 0x10;
  748. if (fe->ops.i2c_gate_ctrl)
  749. fe->ops.i2c_gate_ctrl(fe, 1);
  750. if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
  751. return -EIO;
  752. return 0;
  753. }
  754. static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
  755. enum fe_sec_tone_mode tone)
  756. {
  757. struct cx8802_dev *dev = fe->dvb->priv;
  758. struct cx88_core *core = dev->core;
  759. cx_set(MO_GP0_IO, 0x0800);
  760. switch (tone) {
  761. case SEC_TONE_ON:
  762. cx_set(MO_GP0_IO, 0x08);
  763. break;
  764. case SEC_TONE_OFF:
  765. cx_clear(MO_GP0_IO, 0x08);
  766. break;
  767. default:
  768. return -EINVAL;
  769. }
  770. return 0;
  771. }
  772. static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
  773. enum fe_sec_voltage voltage)
  774. {
  775. struct cx8802_dev *dev = fe->dvb->priv;
  776. struct cx88_core *core = dev->core;
  777. u8 data;
  778. struct i2c_msg msg = {
  779. .addr = 8,
  780. .flags = 0,
  781. .buf = &data,
  782. .len = sizeof(data) };
  783. cx_set(MO_GP0_IO, 0x8000);
  784. switch (voltage) {
  785. case SEC_VOLTAGE_OFF:
  786. break;
  787. case SEC_VOLTAGE_13:
  788. data = ISL6421_EN1 | ISL6421_LLC1;
  789. cx_clear(MO_GP0_IO, 0x80);
  790. break;
  791. case SEC_VOLTAGE_18:
  792. data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
  793. cx_clear(MO_GP0_IO, 0x80);
  794. break;
  795. default:
  796. return -EINVAL;
  797. }
  798. return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
  799. }
  800. static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
  801. u32 srate, u32 ratio)
  802. {
  803. u8 aclk = 0;
  804. u8 bclk = 0;
  805. if (srate < 1500000) {
  806. aclk = 0xb7;
  807. bclk = 0x47;
  808. } else if (srate < 3000000) {
  809. aclk = 0xb7;
  810. bclk = 0x4b;
  811. } else if (srate < 7000000) {
  812. aclk = 0xb7;
  813. bclk = 0x4f;
  814. } else if (srate < 14000000) {
  815. aclk = 0xb7;
  816. bclk = 0x53;
  817. } else if (srate < 30000000) {
  818. aclk = 0xb6;
  819. bclk = 0x53;
  820. } else if (srate < 45000000) {
  821. aclk = 0xb4;
  822. bclk = 0x51;
  823. }
  824. stv0299_writereg(fe, 0x13, aclk);
  825. stv0299_writereg(fe, 0x14, bclk);
  826. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  827. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  828. stv0299_writereg(fe, 0x21, ratio & 0xf0);
  829. return 0;
  830. }
  831. static const struct stv0299_config samsung_stv0299_config = {
  832. .demod_address = 0x68,
  833. .inittab = samsung_smt_7020_inittab,
  834. .mclk = 88000000UL,
  835. .invert = 0,
  836. .skip_reinit = 0,
  837. .lock_output = STV0299_LOCKOUTPUT_LK,
  838. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  839. .min_delay_ms = 100,
  840. .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
  841. };
  842. static int dvb_register(struct cx8802_dev *dev)
  843. {
  844. struct cx88_core *core = dev->core;
  845. struct vb2_dvb_frontend *fe0, *fe1 = NULL;
  846. int mfe_shared = 0; /* bus not shared by default */
  847. int res = -EINVAL;
  848. if (0 != core->i2c_rc) {
  849. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  850. goto frontend_detach;
  851. }
  852. /* Get the first frontend */
  853. fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
  854. if (!fe0)
  855. goto frontend_detach;
  856. /* multi-frontend gate control is undefined or defaults to fe0 */
  857. dev->frontends.gate = 0;
  858. /* Sets the gate control callback to be used by i2c command calls */
  859. core->gate_ctrl = cx88_dvb_gate_ctrl;
  860. /* init frontend(s) */
  861. switch (core->boardnr) {
  862. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  863. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  864. &connexant_refboard_config,
  865. &core->i2c_adap);
  866. if (fe0->dvb.frontend != NULL) {
  867. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  868. 0x61, &core->i2c_adap,
  869. DVB_PLL_THOMSON_DTT759X))
  870. goto frontend_detach;
  871. }
  872. break;
  873. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  874. case CX88_BOARD_CONEXANT_DVB_T1:
  875. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  876. case CX88_BOARD_WINFAST_DTV1000:
  877. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  878. &connexant_refboard_config,
  879. &core->i2c_adap);
  880. if (fe0->dvb.frontend != NULL) {
  881. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  882. 0x60, &core->i2c_adap,
  883. DVB_PLL_THOMSON_DTT7579))
  884. goto frontend_detach;
  885. }
  886. break;
  887. case CX88_BOARD_WINFAST_DTV2000H:
  888. case CX88_BOARD_HAUPPAUGE_HVR1100:
  889. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  890. case CX88_BOARD_HAUPPAUGE_HVR1300:
  891. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  892. &hauppauge_hvr_config,
  893. &core->i2c_adap);
  894. if (fe0->dvb.frontend != NULL) {
  895. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  896. &core->i2c_adap, 0x61,
  897. TUNER_PHILIPS_FMD1216ME_MK3))
  898. goto frontend_detach;
  899. }
  900. break;
  901. case CX88_BOARD_WINFAST_DTV2000H_J:
  902. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  903. &hauppauge_hvr_config,
  904. &core->i2c_adap);
  905. if (fe0->dvb.frontend != NULL) {
  906. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  907. &core->i2c_adap, 0x61,
  908. TUNER_PHILIPS_FMD1216MEX_MK3))
  909. goto frontend_detach;
  910. }
  911. break;
  912. case CX88_BOARD_HAUPPAUGE_HVR3000:
  913. /* MFE frontend 1 */
  914. mfe_shared = 1;
  915. dev->frontends.gate = 2;
  916. /* DVB-S init */
  917. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  918. &hauppauge_novas_config,
  919. &dev->core->i2c_adap);
  920. if (fe0->dvb.frontend) {
  921. if (!dvb_attach(isl6421_attach,
  922. fe0->dvb.frontend,
  923. &dev->core->i2c_adap,
  924. 0x08, ISL6421_DCL, 0x00, false))
  925. goto frontend_detach;
  926. }
  927. /* MFE frontend 2 */
  928. fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
  929. if (!fe1)
  930. goto frontend_detach;
  931. /* DVB-T init */
  932. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  933. &hauppauge_hvr_config,
  934. &dev->core->i2c_adap);
  935. if (fe1->dvb.frontend) {
  936. fe1->dvb.frontend->id = 1;
  937. if (!dvb_attach(simple_tuner_attach,
  938. fe1->dvb.frontend,
  939. &dev->core->i2c_adap,
  940. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  941. goto frontend_detach;
  942. }
  943. break;
  944. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  945. fe0->dvb.frontend = dvb_attach(mt352_attach,
  946. &dvico_fusionhdtv,
  947. &core->i2c_adap);
  948. if (fe0->dvb.frontend != NULL) {
  949. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  950. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  951. goto frontend_detach;
  952. break;
  953. }
  954. /* ZL10353 replaces MT352 on later cards */
  955. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  956. &dvico_fusionhdtv_plus_v1_1,
  957. &core->i2c_adap);
  958. if (fe0->dvb.frontend != NULL) {
  959. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  960. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  961. goto frontend_detach;
  962. }
  963. break;
  964. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  965. /* The tin box says DEE1601, but it seems to be DTT7579
  966. * compatible, with a slightly different MT352 AGC gain. */
  967. fe0->dvb.frontend = dvb_attach(mt352_attach,
  968. &dvico_fusionhdtv_dual,
  969. &core->i2c_adap);
  970. if (fe0->dvb.frontend != NULL) {
  971. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  972. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  973. goto frontend_detach;
  974. break;
  975. }
  976. /* ZL10353 replaces MT352 on later cards */
  977. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  978. &dvico_fusionhdtv_plus_v1_1,
  979. &core->i2c_adap);
  980. if (fe0->dvb.frontend != NULL) {
  981. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  982. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  983. goto frontend_detach;
  984. }
  985. break;
  986. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  987. fe0->dvb.frontend = dvb_attach(mt352_attach,
  988. &dvico_fusionhdtv,
  989. &core->i2c_adap);
  990. if (fe0->dvb.frontend != NULL) {
  991. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  992. 0x61, NULL, DVB_PLL_LG_Z201))
  993. goto frontend_detach;
  994. }
  995. break;
  996. case CX88_BOARD_KWORLD_DVB_T:
  997. case CX88_BOARD_DNTV_LIVE_DVB_T:
  998. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  999. fe0->dvb.frontend = dvb_attach(mt352_attach,
  1000. &dntv_live_dvbt_config,
  1001. &core->i2c_adap);
  1002. if (fe0->dvb.frontend != NULL) {
  1003. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  1004. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  1005. goto frontend_detach;
  1006. }
  1007. break;
  1008. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  1009. #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
  1010. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  1011. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  1012. &dev->vp3054->adap);
  1013. if (fe0->dvb.frontend != NULL) {
  1014. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1015. &core->i2c_adap, 0x61,
  1016. TUNER_PHILIPS_FMD1216ME_MK3))
  1017. goto frontend_detach;
  1018. }
  1019. #else
  1020. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  1021. core->name);
  1022. #endif
  1023. break;
  1024. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  1025. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1026. &dvico_fusionhdtv_hybrid,
  1027. &core->i2c_adap);
  1028. if (fe0->dvb.frontend != NULL) {
  1029. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1030. &core->i2c_adap, 0x61,
  1031. TUNER_THOMSON_FE6600))
  1032. goto frontend_detach;
  1033. }
  1034. break;
  1035. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  1036. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1037. &dvico_fusionhdtv_xc3028,
  1038. &core->i2c_adap);
  1039. if (fe0->dvb.frontend == NULL)
  1040. fe0->dvb.frontend = dvb_attach(mt352_attach,
  1041. &dvico_fusionhdtv_mt352_xc3028,
  1042. &core->i2c_adap);
  1043. /*
  1044. * On this board, the demod provides the I2C bus pullup.
  1045. * We must not permit gate_ctrl to be performed, or
  1046. * the xc3028 cannot communicate on the bus.
  1047. */
  1048. if (fe0->dvb.frontend)
  1049. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1050. if (attach_xc3028(0x61, dev) < 0)
  1051. goto frontend_detach;
  1052. break;
  1053. case CX88_BOARD_PCHDTV_HD3000:
  1054. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  1055. &core->i2c_adap);
  1056. if (fe0->dvb.frontend != NULL) {
  1057. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1058. &core->i2c_adap, 0x61,
  1059. TUNER_THOMSON_DTT761X))
  1060. goto frontend_detach;
  1061. }
  1062. break;
  1063. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  1064. dev->ts_gen_cntrl = 0x08;
  1065. /* Do a hardware reset of chip before using it. */
  1066. cx_clear(MO_GP0_IO, 1);
  1067. mdelay(100);
  1068. cx_set(MO_GP0_IO, 1);
  1069. mdelay(200);
  1070. /* Select RF connector callback */
  1071. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  1072. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1073. &fusionhdtv_3_gold,
  1074. &core->i2c_adap);
  1075. if (fe0->dvb.frontend != NULL) {
  1076. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1077. &core->i2c_adap, 0x61,
  1078. TUNER_MICROTUNE_4042FI5))
  1079. goto frontend_detach;
  1080. }
  1081. break;
  1082. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  1083. dev->ts_gen_cntrl = 0x08;
  1084. /* Do a hardware reset of chip before using it. */
  1085. cx_clear(MO_GP0_IO, 1);
  1086. mdelay(100);
  1087. cx_set(MO_GP0_IO, 9);
  1088. mdelay(200);
  1089. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1090. &fusionhdtv_3_gold,
  1091. &core->i2c_adap);
  1092. if (fe0->dvb.frontend != NULL) {
  1093. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1094. &core->i2c_adap, 0x61,
  1095. TUNER_THOMSON_DTT761X))
  1096. goto frontend_detach;
  1097. }
  1098. break;
  1099. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1100. dev->ts_gen_cntrl = 0x08;
  1101. /* Do a hardware reset of chip before using it. */
  1102. cx_clear(MO_GP0_IO, 1);
  1103. mdelay(100);
  1104. cx_set(MO_GP0_IO, 1);
  1105. mdelay(200);
  1106. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1107. &fusionhdtv_5_gold,
  1108. &core->i2c_adap);
  1109. if (fe0->dvb.frontend != NULL) {
  1110. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1111. &core->i2c_adap, 0x61,
  1112. TUNER_LG_TDVS_H06XF))
  1113. goto frontend_detach;
  1114. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1115. &core->i2c_adap, 0x43))
  1116. goto frontend_detach;
  1117. }
  1118. break;
  1119. case CX88_BOARD_PCHDTV_HD5500:
  1120. dev->ts_gen_cntrl = 0x08;
  1121. /* Do a hardware reset of chip before using it. */
  1122. cx_clear(MO_GP0_IO, 1);
  1123. mdelay(100);
  1124. cx_set(MO_GP0_IO, 1);
  1125. mdelay(200);
  1126. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1127. &pchdtv_hd5500,
  1128. &core->i2c_adap);
  1129. if (fe0->dvb.frontend != NULL) {
  1130. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1131. &core->i2c_adap, 0x61,
  1132. TUNER_LG_TDVS_H06XF))
  1133. goto frontend_detach;
  1134. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1135. &core->i2c_adap, 0x43))
  1136. goto frontend_detach;
  1137. }
  1138. break;
  1139. case CX88_BOARD_ATI_HDTVWONDER:
  1140. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  1141. &ati_hdtvwonder,
  1142. &core->i2c_adap);
  1143. if (fe0->dvb.frontend != NULL) {
  1144. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1145. &core->i2c_adap, 0x61,
  1146. TUNER_PHILIPS_TUV1236D))
  1147. goto frontend_detach;
  1148. }
  1149. break;
  1150. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  1151. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  1152. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1153. &hauppauge_novas_config,
  1154. &core->i2c_adap);
  1155. if (fe0->dvb.frontend) {
  1156. bool override_tone;
  1157. if (core->model == 92001)
  1158. override_tone = true;
  1159. else
  1160. override_tone = false;
  1161. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  1162. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00,
  1163. override_tone))
  1164. goto frontend_detach;
  1165. }
  1166. break;
  1167. case CX88_BOARD_KWORLD_DVBS_100:
  1168. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1169. &kworld_dvbs_100_config,
  1170. &core->i2c_adap);
  1171. if (fe0->dvb.frontend) {
  1172. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1173. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  1174. }
  1175. break;
  1176. case CX88_BOARD_GENIATECH_DVBS:
  1177. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1178. &geniatech_dvbs_config,
  1179. &core->i2c_adap);
  1180. if (fe0->dvb.frontend) {
  1181. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1182. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  1183. }
  1184. break;
  1185. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  1186. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1187. &pinnacle_pctv_hd_800i_config,
  1188. &core->i2c_adap);
  1189. if (fe0->dvb.frontend != NULL) {
  1190. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1191. &core->i2c_adap,
  1192. &pinnacle_pctv_hd_800i_tuner_config))
  1193. goto frontend_detach;
  1194. }
  1195. break;
  1196. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1197. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1198. &dvico_hdtv5_pci_nano_config,
  1199. &core->i2c_adap);
  1200. if (fe0->dvb.frontend != NULL) {
  1201. struct dvb_frontend *fe;
  1202. struct xc2028_config cfg = {
  1203. .i2c_adap = &core->i2c_adap,
  1204. .i2c_addr = 0x61,
  1205. };
  1206. static struct xc2028_ctrl ctl = {
  1207. .fname = XC2028_DEFAULT_FIRMWARE,
  1208. .max_len = 64,
  1209. .scode_table = XC3028_FE_OREN538,
  1210. };
  1211. fe = dvb_attach(xc2028_attach,
  1212. fe0->dvb.frontend, &cfg);
  1213. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  1214. fe->ops.tuner_ops.set_config(fe, &ctl);
  1215. }
  1216. break;
  1217. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  1218. case CX88_BOARD_WINFAST_DTV1800H:
  1219. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1220. &cx88_pinnacle_hybrid_pctv,
  1221. &core->i2c_adap);
  1222. if (fe0->dvb.frontend) {
  1223. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1224. if (attach_xc3028(0x61, dev) < 0)
  1225. goto frontend_detach;
  1226. }
  1227. break;
  1228. case CX88_BOARD_WINFAST_DTV1800H_XC4000:
  1229. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1230. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1231. &cx88_pinnacle_hybrid_pctv,
  1232. &core->i2c_adap);
  1233. if (fe0->dvb.frontend) {
  1234. struct xc4000_config cfg = {
  1235. .i2c_address = 0x61,
  1236. .default_pm = 0,
  1237. .dvb_amplitude = 134,
  1238. .set_smoothedcvbs = 1,
  1239. .if_khz = 4560
  1240. };
  1241. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1242. if (attach_xc4000(dev, &cfg) < 0)
  1243. goto frontend_detach;
  1244. }
  1245. break;
  1246. case CX88_BOARD_GENIATECH_X8000_MT:
  1247. dev->ts_gen_cntrl = 0x00;
  1248. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1249. &cx88_geniatech_x8000_mt,
  1250. &core->i2c_adap);
  1251. if (attach_xc3028(0x61, dev) < 0)
  1252. goto frontend_detach;
  1253. break;
  1254. case CX88_BOARD_KWORLD_ATSC_120:
  1255. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1256. &kworld_atsc_120_config,
  1257. &core->i2c_adap);
  1258. if (attach_xc3028(0x61, dev) < 0)
  1259. goto frontend_detach;
  1260. break;
  1261. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  1262. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  1263. &dvico_fusionhdtv7_config,
  1264. &core->i2c_adap);
  1265. if (fe0->dvb.frontend != NULL) {
  1266. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1267. &core->i2c_adap,
  1268. &dvico_fusionhdtv7_tuner_config))
  1269. goto frontend_detach;
  1270. }
  1271. break;
  1272. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1273. /* MFE frontend 1 */
  1274. mfe_shared = 1;
  1275. dev->frontends.gate = 2;
  1276. /* DVB-S/S2 Init */
  1277. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1278. &hauppauge_hvr4000_config,
  1279. &dev->core->i2c_adap);
  1280. if (fe0->dvb.frontend) {
  1281. if (!dvb_attach(isl6421_attach,
  1282. fe0->dvb.frontend,
  1283. &dev->core->i2c_adap,
  1284. 0x08, ISL6421_DCL, 0x00, false))
  1285. goto frontend_detach;
  1286. }
  1287. /* MFE frontend 2 */
  1288. fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
  1289. if (!fe1)
  1290. goto frontend_detach;
  1291. /* DVB-T Init */
  1292. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  1293. &hauppauge_hvr_config,
  1294. &dev->core->i2c_adap);
  1295. if (fe1->dvb.frontend) {
  1296. fe1->dvb.frontend->id = 1;
  1297. if (!dvb_attach(simple_tuner_attach,
  1298. fe1->dvb.frontend,
  1299. &dev->core->i2c_adap,
  1300. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  1301. goto frontend_detach;
  1302. }
  1303. break;
  1304. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  1305. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1306. &hauppauge_hvr4000_config,
  1307. &dev->core->i2c_adap);
  1308. if (fe0->dvb.frontend) {
  1309. if (!dvb_attach(isl6421_attach,
  1310. fe0->dvb.frontend,
  1311. &dev->core->i2c_adap,
  1312. 0x08, ISL6421_DCL, 0x00, false))
  1313. goto frontend_detach;
  1314. }
  1315. break;
  1316. case CX88_BOARD_PROF_6200:
  1317. case CX88_BOARD_TBS_8910:
  1318. case CX88_BOARD_TEVII_S420:
  1319. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1320. &tevii_tuner_sharp_config,
  1321. &core->i2c_adap);
  1322. if (fe0->dvb.frontend != NULL) {
  1323. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  1324. &core->i2c_adap, DVB_PLL_OPERA1))
  1325. goto frontend_detach;
  1326. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1327. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1328. } else {
  1329. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  1330. &tevii_tuner_earda_config,
  1331. &core->i2c_adap);
  1332. if (fe0->dvb.frontend != NULL) {
  1333. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  1334. &core->i2c_adap))
  1335. goto frontend_detach;
  1336. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1337. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1338. }
  1339. }
  1340. break;
  1341. case CX88_BOARD_TEVII_S460:
  1342. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1343. &tevii_s460_config,
  1344. &core->i2c_adap);
  1345. if (fe0->dvb.frontend != NULL)
  1346. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1347. break;
  1348. case CX88_BOARD_TEVII_S464:
  1349. fe0->dvb.frontend = dvb_attach(ds3000_attach,
  1350. &tevii_ds3000_config,
  1351. &core->i2c_adap);
  1352. if (fe0->dvb.frontend != NULL) {
  1353. dvb_attach(ts2020_attach, fe0->dvb.frontend,
  1354. &tevii_ts2020_config, &core->i2c_adap);
  1355. fe0->dvb.frontend->ops.set_voltage =
  1356. tevii_dvbs_set_voltage;
  1357. }
  1358. break;
  1359. case CX88_BOARD_OMICOM_SS4_PCI:
  1360. case CX88_BOARD_TBS_8920:
  1361. case CX88_BOARD_PROF_7300:
  1362. case CX88_BOARD_SATTRADE_ST4200:
  1363. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1364. &hauppauge_hvr4000_config,
  1365. &core->i2c_adap);
  1366. if (fe0->dvb.frontend != NULL)
  1367. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1368. break;
  1369. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1370. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1371. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1372. &core->i2c_adap);
  1373. if (fe0->dvb.frontend) {
  1374. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1375. if (attach_xc3028(0x61, dev) < 0)
  1376. goto frontend_detach;
  1377. }
  1378. break;
  1379. case CX88_BOARD_PROF_7301:{
  1380. struct dvb_tuner_ops *tuner_ops = NULL;
  1381. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  1382. &prof_7301_stv0900_config,
  1383. &core->i2c_adap, 0);
  1384. if (fe0->dvb.frontend != NULL) {
  1385. if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
  1386. &prof_7301_stb6100_config,
  1387. &core->i2c_adap))
  1388. goto frontend_detach;
  1389. tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
  1390. tuner_ops->set_frequency = stb6100_set_freq;
  1391. tuner_ops->get_frequency = stb6100_get_freq;
  1392. tuner_ops->set_bandwidth = stb6100_set_bandw;
  1393. tuner_ops->get_bandwidth = stb6100_get_bandw;
  1394. core->prev_set_voltage =
  1395. fe0->dvb.frontend->ops.set_voltage;
  1396. fe0->dvb.frontend->ops.set_voltage =
  1397. tevii_dvbs_set_voltage;
  1398. }
  1399. break;
  1400. }
  1401. case CX88_BOARD_SAMSUNG_SMT_7020:
  1402. dev->ts_gen_cntrl = 0x08;
  1403. cx_set(MO_GP0_IO, 0x0101);
  1404. cx_clear(MO_GP0_IO, 0x01);
  1405. mdelay(100);
  1406. cx_set(MO_GP0_IO, 0x01);
  1407. mdelay(200);
  1408. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1409. &samsung_stv0299_config,
  1410. &dev->core->i2c_adap);
  1411. if (fe0->dvb.frontend) {
  1412. fe0->dvb.frontend->ops.tuner_ops.set_params =
  1413. samsung_smt_7020_tuner_set_params;
  1414. fe0->dvb.frontend->tuner_priv =
  1415. &dev->core->i2c_adap;
  1416. fe0->dvb.frontend->ops.set_voltage =
  1417. samsung_smt_7020_set_voltage;
  1418. fe0->dvb.frontend->ops.set_tone =
  1419. samsung_smt_7020_set_tone;
  1420. }
  1421. break;
  1422. case CX88_BOARD_TWINHAN_VP1027_DVBS:
  1423. dev->ts_gen_cntrl = 0x00;
  1424. fe0->dvb.frontend = dvb_attach(mb86a16_attach,
  1425. &twinhan_vp1027,
  1426. &core->i2c_adap);
  1427. if (fe0->dvb.frontend) {
  1428. core->prev_set_voltage =
  1429. fe0->dvb.frontend->ops.set_voltage;
  1430. fe0->dvb.frontend->ops.set_voltage =
  1431. vp1027_set_voltage;
  1432. }
  1433. break;
  1434. default:
  1435. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1436. core->name);
  1437. break;
  1438. }
  1439. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1440. printk(KERN_ERR
  1441. "%s/2: frontend initialization failed\n",
  1442. core->name);
  1443. goto frontend_detach;
  1444. }
  1445. /* define general-purpose callback pointer */
  1446. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1447. /* Ensure all frontends negotiate bus access */
  1448. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1449. if (fe1)
  1450. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1451. /* Put the analog decoder in standby to keep it quiet */
  1452. call_all(core, core, s_power, 0);
  1453. /* register everything */
  1454. res = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1455. &dev->pci->dev, NULL, adapter_nr,
  1456. mfe_shared);
  1457. if (res)
  1458. goto frontend_detach;
  1459. return res;
  1460. frontend_detach:
  1461. core->gate_ctrl = NULL;
  1462. vb2_dvb_dealloc_frontends(&dev->frontends);
  1463. return res;
  1464. }
  1465. /* ----------------------------------------------------------- */
  1466. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1467. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1468. {
  1469. struct cx88_core *core = drv->core;
  1470. int err = 0;
  1471. dprintk( 1, "%s\n", __func__);
  1472. switch (core->boardnr) {
  1473. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1474. /* We arrive here with either the cx23416 or the cx22702
  1475. * on the bus. Take the bus from the cx23416 and enable the
  1476. * cx22702 demod
  1477. */
  1478. /* Toggle reset on cx22702 leaving i2c active */
  1479. cx_set(MO_GP0_IO, 0x00000080);
  1480. udelay(1000);
  1481. cx_clear(MO_GP0_IO, 0x00000080);
  1482. udelay(50);
  1483. cx_set(MO_GP0_IO, 0x00000080);
  1484. udelay(1000);
  1485. /* enable the cx22702 pins */
  1486. cx_clear(MO_GP0_IO, 0x00000004);
  1487. udelay(1000);
  1488. break;
  1489. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1490. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1491. /* Toggle reset on cx22702 leaving i2c active */
  1492. cx_set(MO_GP0_IO, 0x00000080);
  1493. udelay(1000);
  1494. cx_clear(MO_GP0_IO, 0x00000080);
  1495. udelay(50);
  1496. cx_set(MO_GP0_IO, 0x00000080);
  1497. udelay(1000);
  1498. switch (core->dvbdev->frontends.active_fe_id) {
  1499. case 1: /* DVB-S/S2 Enabled */
  1500. /* tri-state the cx22702 pins */
  1501. cx_set(MO_GP0_IO, 0x00000004);
  1502. /* Take the cx24116/cx24123 out of reset */
  1503. cx_write(MO_SRST_IO, 1);
  1504. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1505. break;
  1506. case 2: /* DVB-T Enabled */
  1507. /* Put the cx24116/cx24123 into reset */
  1508. cx_write(MO_SRST_IO, 0);
  1509. /* enable the cx22702 pins */
  1510. cx_clear(MO_GP0_IO, 0x00000004);
  1511. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1512. break;
  1513. }
  1514. udelay(1000);
  1515. break;
  1516. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1517. /* set RF input to AIR for DVB-T (GPIO 16) */
  1518. cx_write(MO_GP2_IO, 0x0101);
  1519. break;
  1520. default:
  1521. err = -ENODEV;
  1522. }
  1523. return err;
  1524. }
  1525. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1526. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1527. {
  1528. struct cx88_core *core = drv->core;
  1529. int err = 0;
  1530. dprintk( 1, "%s\n", __func__);
  1531. switch (core->boardnr) {
  1532. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1533. /* Do Nothing, leave the cx22702 on the bus. */
  1534. break;
  1535. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1536. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1537. break;
  1538. default:
  1539. err = -ENODEV;
  1540. }
  1541. return err;
  1542. }
  1543. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1544. {
  1545. struct cx88_core *core = drv->core;
  1546. struct cx8802_dev *dev = drv->core->dvbdev;
  1547. int err;
  1548. struct vb2_dvb_frontend *fe;
  1549. int i;
  1550. dprintk( 1, "%s\n", __func__);
  1551. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1552. core->boardnr,
  1553. core->name,
  1554. core->pci_bus,
  1555. core->pci_slot);
  1556. err = -ENODEV;
  1557. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1558. goto fail_core;
  1559. /* If vp3054 isn't enabled, a stub will just return 0 */
  1560. err = vp3054_i2c_probe(dev);
  1561. if (0 != err)
  1562. goto fail_core;
  1563. /* dvb stuff */
  1564. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1565. dev->ts_gen_cntrl = 0x0c;
  1566. err = cx8802_alloc_frontends(dev);
  1567. if (err)
  1568. goto fail_core;
  1569. err = -ENODEV;
  1570. for (i = 1; i <= core->board.num_frontends; i++) {
  1571. struct vb2_queue *q;
  1572. fe = vb2_dvb_get_frontend(&core->dvbdev->frontends, i);
  1573. if (fe == NULL) {
  1574. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1575. __func__, i);
  1576. goto fail_probe;
  1577. }
  1578. q = &fe->dvb.dvbq;
  1579. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1580. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
  1581. q->gfp_flags = GFP_DMA32;
  1582. q->min_buffers_needed = 2;
  1583. q->drv_priv = dev;
  1584. q->buf_struct_size = sizeof(struct cx88_buffer);
  1585. q->ops = &dvb_qops;
  1586. q->mem_ops = &vb2_dma_sg_memops;
  1587. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1588. q->lock = &core->lock;
  1589. q->dev = &dev->pci->dev;
  1590. err = vb2_queue_init(q);
  1591. if (err < 0)
  1592. goto fail_probe;
  1593. /* init struct vb2_dvb */
  1594. fe->dvb.name = dev->core->name;
  1595. }
  1596. err = dvb_register(dev);
  1597. if (err)
  1598. /* frontends/adapter de-allocated in dvb_register */
  1599. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1600. core->name, err);
  1601. return err;
  1602. fail_probe:
  1603. vb2_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1604. fail_core:
  1605. return err;
  1606. }
  1607. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1608. {
  1609. struct cx88_core *core = drv->core;
  1610. struct cx8802_dev *dev = drv->core->dvbdev;
  1611. dprintk( 1, "%s\n", __func__);
  1612. vb2_dvb_unregister_bus(&dev->frontends);
  1613. vp3054_i2c_remove(dev);
  1614. core->gate_ctrl = NULL;
  1615. return 0;
  1616. }
  1617. static struct cx8802_driver cx8802_dvb_driver = {
  1618. .type_id = CX88_MPEG_DVB,
  1619. .hw_access = CX8802_DRVCTL_SHARED,
  1620. .probe = cx8802_dvb_probe,
  1621. .remove = cx8802_dvb_remove,
  1622. .advise_acquire = cx8802_dvb_advise_acquire,
  1623. .advise_release = cx8802_dvb_advise_release,
  1624. };
  1625. static int __init dvb_init(void)
  1626. {
  1627. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %s loaded\n",
  1628. CX88_VERSION);
  1629. return cx8802_register_driver(&cx8802_dvb_driver);
  1630. }
  1631. static void __exit dvb_fini(void)
  1632. {
  1633. cx8802_unregister_driver(&cx8802_dvb_driver);
  1634. }
  1635. module_init(dvb_init);
  1636. module_exit(dvb_fini);