isp.c 62 KB

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  1. /*
  2. * isp.c
  3. *
  4. * TI OMAP3 ISP - Core
  5. *
  6. * Copyright (C) 2006-2010 Nokia Corporation
  7. * Copyright (C) 2007-2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <[email protected]>
  10. * Sakari Ailus <[email protected]>
  11. *
  12. * Contributors:
  13. * Laurent Pinchart <[email protected]>
  14. * Sakari Ailus <[email protected]>
  15. * David Cohen <[email protected]>
  16. * Stanimir Varbanov <[email protected]>
  17. * Vimarsh Zutshi <[email protected]>
  18. * Tuukka Toivonen <[email protected]>
  19. * Sergio Aguirre <[email protected]>
  20. * Antti Koskipaa <[email protected]>
  21. * Ivan T. Ivanov <[email protected]>
  22. * RaniSuneela <[email protected]>
  23. * Atanas Filipov <[email protected]>
  24. * Gjorgji Rosikopulos <[email protected]>
  25. * Hiroshi DOYU <[email protected]>
  26. * Nayden Kanchev <[email protected]>
  27. * Phil Carmody <[email protected]>
  28. * Artem Bityutskiy <[email protected]>
  29. * Dominic Curran <[email protected]>
  30. * Ilkka Myllyperkio <[email protected]>
  31. * Pallavi Kulkarni <[email protected]>
  32. * Vaibhav Hiremath <[email protected]>
  33. * Mohit Jalori <[email protected]>
  34. * Sameer Venkatraman <[email protected]>
  35. * Senthilvadivu Guruswamy <[email protected]>
  36. * Thara Gopinath <[email protected]>
  37. * Toni Leinonen <[email protected]>
  38. * Troy Laramy <[email protected]>
  39. *
  40. * This program is free software; you can redistribute it and/or modify
  41. * it under the terms of the GNU General Public License version 2 as
  42. * published by the Free Software Foundation.
  43. */
  44. #include <asm/cacheflush.h>
  45. #include <linux/clk.h>
  46. #include <linux/clkdev.h>
  47. #include <linux/delay.h>
  48. #include <linux/device.h>
  49. #include <linux/dma-mapping.h>
  50. #include <linux/i2c.h>
  51. #include <linux/interrupt.h>
  52. #include <linux/mfd/syscon.h>
  53. #include <linux/module.h>
  54. #include <linux/omap-iommu.h>
  55. #include <linux/platform_device.h>
  56. #include <linux/regulator/consumer.h>
  57. #include <linux/slab.h>
  58. #include <linux/sched.h>
  59. #include <linux/vmalloc.h>
  60. #include <asm/dma-iommu.h>
  61. #include <media/v4l2-common.h>
  62. #include <media/v4l2-device.h>
  63. #include <media/v4l2-mc.h>
  64. #include <media/v4l2-of.h>
  65. #include "isp.h"
  66. #include "ispreg.h"
  67. #include "ispccdc.h"
  68. #include "isppreview.h"
  69. #include "ispresizer.h"
  70. #include "ispcsi2.h"
  71. #include "ispccp2.h"
  72. #include "isph3a.h"
  73. #include "isphist.h"
  74. static unsigned int autoidle;
  75. module_param(autoidle, int, 0444);
  76. MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
  77. static void isp_save_ctx(struct isp_device *isp);
  78. static void isp_restore_ctx(struct isp_device *isp);
  79. static const struct isp_res_mapping isp_res_maps[] = {
  80. {
  81. .isp_rev = ISP_REVISION_2_0,
  82. .offset = {
  83. /* first MMIO area */
  84. 0x0000, /* base, len 0x0070 */
  85. 0x0400, /* ccp2, len 0x01f0 */
  86. 0x0600, /* ccdc, len 0x00a8 */
  87. 0x0a00, /* hist, len 0x0048 */
  88. 0x0c00, /* h3a, len 0x0060 */
  89. 0x0e00, /* preview, len 0x00a0 */
  90. 0x1000, /* resizer, len 0x00ac */
  91. 0x1200, /* sbl, len 0x00fc */
  92. /* second MMIO area */
  93. 0x0000, /* csi2a, len 0x0170 */
  94. 0x0170, /* csiphy2, len 0x000c */
  95. },
  96. .phy_type = ISP_PHY_TYPE_3430,
  97. },
  98. {
  99. .isp_rev = ISP_REVISION_15_0,
  100. .offset = {
  101. /* first MMIO area */
  102. 0x0000, /* base, len 0x0070 */
  103. 0x0400, /* ccp2, len 0x01f0 */
  104. 0x0600, /* ccdc, len 0x00a8 */
  105. 0x0a00, /* hist, len 0x0048 */
  106. 0x0c00, /* h3a, len 0x0060 */
  107. 0x0e00, /* preview, len 0x00a0 */
  108. 0x1000, /* resizer, len 0x00ac */
  109. 0x1200, /* sbl, len 0x00fc */
  110. /* second MMIO area */
  111. 0x0000, /* csi2a, len 0x0170 (1st area) */
  112. 0x0170, /* csiphy2, len 0x000c */
  113. 0x01c0, /* csi2a, len 0x0040 (2nd area) */
  114. 0x0400, /* csi2c, len 0x0170 (1st area) */
  115. 0x0570, /* csiphy1, len 0x000c */
  116. 0x05c0, /* csi2c, len 0x0040 (2nd area) */
  117. },
  118. .phy_type = ISP_PHY_TYPE_3630,
  119. },
  120. };
  121. /* Structure for saving/restoring ISP module registers */
  122. static struct isp_reg isp_reg_list[] = {
  123. {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
  124. {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
  125. {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
  126. {0, ISP_TOK_TERM, 0}
  127. };
  128. /*
  129. * omap3isp_flush - Post pending L3 bus writes by doing a register readback
  130. * @isp: OMAP3 ISP device
  131. *
  132. * In order to force posting of pending writes, we need to write and
  133. * readback the same register, in this case the revision register.
  134. *
  135. * See this link for reference:
  136. * http://www.mail-archive.com/[email protected]/msg08149.html
  137. */
  138. void omap3isp_flush(struct isp_device *isp)
  139. {
  140. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  141. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  142. }
  143. /* -----------------------------------------------------------------------------
  144. * XCLK
  145. */
  146. #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
  147. static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
  148. {
  149. switch (xclk->id) {
  150. case ISP_XCLK_A:
  151. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  152. ISPTCTRL_CTRL_DIVA_MASK,
  153. divider << ISPTCTRL_CTRL_DIVA_SHIFT);
  154. break;
  155. case ISP_XCLK_B:
  156. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  157. ISPTCTRL_CTRL_DIVB_MASK,
  158. divider << ISPTCTRL_CTRL_DIVB_SHIFT);
  159. break;
  160. }
  161. }
  162. static int isp_xclk_prepare(struct clk_hw *hw)
  163. {
  164. struct isp_xclk *xclk = to_isp_xclk(hw);
  165. omap3isp_get(xclk->isp);
  166. return 0;
  167. }
  168. static void isp_xclk_unprepare(struct clk_hw *hw)
  169. {
  170. struct isp_xclk *xclk = to_isp_xclk(hw);
  171. omap3isp_put(xclk->isp);
  172. }
  173. static int isp_xclk_enable(struct clk_hw *hw)
  174. {
  175. struct isp_xclk *xclk = to_isp_xclk(hw);
  176. unsigned long flags;
  177. spin_lock_irqsave(&xclk->lock, flags);
  178. isp_xclk_update(xclk, xclk->divider);
  179. xclk->enabled = true;
  180. spin_unlock_irqrestore(&xclk->lock, flags);
  181. return 0;
  182. }
  183. static void isp_xclk_disable(struct clk_hw *hw)
  184. {
  185. struct isp_xclk *xclk = to_isp_xclk(hw);
  186. unsigned long flags;
  187. spin_lock_irqsave(&xclk->lock, flags);
  188. isp_xclk_update(xclk, 0);
  189. xclk->enabled = false;
  190. spin_unlock_irqrestore(&xclk->lock, flags);
  191. }
  192. static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
  193. unsigned long parent_rate)
  194. {
  195. struct isp_xclk *xclk = to_isp_xclk(hw);
  196. return parent_rate / xclk->divider;
  197. }
  198. static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
  199. {
  200. u32 divider;
  201. if (*rate >= parent_rate) {
  202. *rate = parent_rate;
  203. return ISPTCTRL_CTRL_DIV_BYPASS;
  204. }
  205. if (*rate == 0)
  206. *rate = 1;
  207. divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
  208. if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
  209. divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
  210. *rate = parent_rate / divider;
  211. return divider;
  212. }
  213. static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
  214. unsigned long *parent_rate)
  215. {
  216. isp_xclk_calc_divider(&rate, *parent_rate);
  217. return rate;
  218. }
  219. static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
  220. unsigned long parent_rate)
  221. {
  222. struct isp_xclk *xclk = to_isp_xclk(hw);
  223. unsigned long flags;
  224. u32 divider;
  225. divider = isp_xclk_calc_divider(&rate, parent_rate);
  226. spin_lock_irqsave(&xclk->lock, flags);
  227. xclk->divider = divider;
  228. if (xclk->enabled)
  229. isp_xclk_update(xclk, divider);
  230. spin_unlock_irqrestore(&xclk->lock, flags);
  231. dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
  232. __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
  233. return 0;
  234. }
  235. static const struct clk_ops isp_xclk_ops = {
  236. .prepare = isp_xclk_prepare,
  237. .unprepare = isp_xclk_unprepare,
  238. .enable = isp_xclk_enable,
  239. .disable = isp_xclk_disable,
  240. .recalc_rate = isp_xclk_recalc_rate,
  241. .round_rate = isp_xclk_round_rate,
  242. .set_rate = isp_xclk_set_rate,
  243. };
  244. static const char *isp_xclk_parent_name = "cam_mclk";
  245. static const struct clk_init_data isp_xclk_init_data = {
  246. .name = "cam_xclk",
  247. .ops = &isp_xclk_ops,
  248. .parent_names = &isp_xclk_parent_name,
  249. .num_parents = 1,
  250. };
  251. static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
  252. {
  253. unsigned int idx = clkspec->args[0];
  254. struct isp_device *isp = data;
  255. if (idx >= ARRAY_SIZE(isp->xclks))
  256. return ERR_PTR(-ENOENT);
  257. return isp->xclks[idx].clk;
  258. }
  259. static int isp_xclk_init(struct isp_device *isp)
  260. {
  261. struct device_node *np = isp->dev->of_node;
  262. struct clk_init_data init = { 0 };
  263. unsigned int i;
  264. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
  265. isp->xclks[i].clk = ERR_PTR(-EINVAL);
  266. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  267. struct isp_xclk *xclk = &isp->xclks[i];
  268. xclk->isp = isp;
  269. xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
  270. xclk->divider = 1;
  271. spin_lock_init(&xclk->lock);
  272. init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
  273. init.ops = &isp_xclk_ops;
  274. init.parent_names = &isp_xclk_parent_name;
  275. init.num_parents = 1;
  276. xclk->hw.init = &init;
  277. /*
  278. * The first argument is NULL in order to avoid circular
  279. * reference, as this driver takes reference on the
  280. * sensor subdevice modules and the sensors would take
  281. * reference on this module through clk_get().
  282. */
  283. xclk->clk = clk_register(NULL, &xclk->hw);
  284. if (IS_ERR(xclk->clk))
  285. return PTR_ERR(xclk->clk);
  286. }
  287. if (np)
  288. of_clk_add_provider(np, isp_xclk_src_get, isp);
  289. return 0;
  290. }
  291. static void isp_xclk_cleanup(struct isp_device *isp)
  292. {
  293. struct device_node *np = isp->dev->of_node;
  294. unsigned int i;
  295. if (np)
  296. of_clk_del_provider(np);
  297. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  298. struct isp_xclk *xclk = &isp->xclks[i];
  299. if (!IS_ERR(xclk->clk))
  300. clk_unregister(xclk->clk);
  301. }
  302. }
  303. /* -----------------------------------------------------------------------------
  304. * Interrupts
  305. */
  306. /*
  307. * isp_enable_interrupts - Enable ISP interrupts.
  308. * @isp: OMAP3 ISP device
  309. */
  310. static void isp_enable_interrupts(struct isp_device *isp)
  311. {
  312. static const u32 irq = IRQ0ENABLE_CSIA_IRQ
  313. | IRQ0ENABLE_CSIB_IRQ
  314. | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
  315. | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
  316. | IRQ0ENABLE_CCDC_VD0_IRQ
  317. | IRQ0ENABLE_CCDC_VD1_IRQ
  318. | IRQ0ENABLE_HS_VS_IRQ
  319. | IRQ0ENABLE_HIST_DONE_IRQ
  320. | IRQ0ENABLE_H3A_AWB_DONE_IRQ
  321. | IRQ0ENABLE_H3A_AF_DONE_IRQ
  322. | IRQ0ENABLE_PRV_DONE_IRQ
  323. | IRQ0ENABLE_RSZ_DONE_IRQ;
  324. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  325. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  326. }
  327. /*
  328. * isp_disable_interrupts - Disable ISP interrupts.
  329. * @isp: OMAP3 ISP device
  330. */
  331. static void isp_disable_interrupts(struct isp_device *isp)
  332. {
  333. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  334. }
  335. /*
  336. * isp_core_init - ISP core settings
  337. * @isp: OMAP3 ISP device
  338. * @idle: Consider idle state.
  339. *
  340. * Set the power settings for the ISP and SBL bus and configure the HS/VS
  341. * interrupt source.
  342. *
  343. * We need to configure the HS/VS interrupt source before interrupts get
  344. * enabled, as the sensor might be free-running and the ISP default setting
  345. * (HS edge) would put an unnecessary burden on the CPU.
  346. */
  347. static void isp_core_init(struct isp_device *isp, int idle)
  348. {
  349. isp_reg_writel(isp,
  350. ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
  351. ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
  352. ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
  353. ((isp->revision == ISP_REVISION_15_0) ?
  354. ISP_SYSCONFIG_AUTOIDLE : 0),
  355. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  356. isp_reg_writel(isp,
  357. (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
  358. ISPCTRL_SYNC_DETECT_VSRISE,
  359. OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  360. }
  361. /*
  362. * Configure the bridge and lane shifter. Valid inputs are
  363. *
  364. * CCDC_INPUT_PARALLEL: Parallel interface
  365. * CCDC_INPUT_CSI2A: CSI2a receiver
  366. * CCDC_INPUT_CCP2B: CCP2b receiver
  367. * CCDC_INPUT_CSI2C: CSI2c receiver
  368. *
  369. * The bridge and lane shifter are configured according to the selected input
  370. * and the ISP platform data.
  371. */
  372. void omap3isp_configure_bridge(struct isp_device *isp,
  373. enum ccdc_input_entity input,
  374. const struct isp_parallel_cfg *parcfg,
  375. unsigned int shift, unsigned int bridge)
  376. {
  377. u32 ispctrl_val;
  378. ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  379. ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
  380. ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
  381. ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
  382. ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
  383. ispctrl_val |= bridge;
  384. switch (input) {
  385. case CCDC_INPUT_PARALLEL:
  386. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
  387. ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
  388. shift += parcfg->data_lane_shift;
  389. break;
  390. case CCDC_INPUT_CSI2A:
  391. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
  392. break;
  393. case CCDC_INPUT_CCP2B:
  394. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
  395. break;
  396. case CCDC_INPUT_CSI2C:
  397. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
  398. break;
  399. default:
  400. return;
  401. }
  402. ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
  403. isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  404. }
  405. void omap3isp_hist_dma_done(struct isp_device *isp)
  406. {
  407. if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
  408. omap3isp_stat_pcr_busy(&isp->isp_hist)) {
  409. /* Histogram cannot be enabled in this frame anymore */
  410. atomic_set(&isp->isp_hist.buf_err, 1);
  411. dev_dbg(isp->dev, "hist: Out of synchronization with "
  412. "CCDC. Ignoring next buffer.\n");
  413. }
  414. }
  415. static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
  416. {
  417. static const char *name[] = {
  418. "CSIA_IRQ",
  419. "res1",
  420. "res2",
  421. "CSIB_LCM_IRQ",
  422. "CSIB_IRQ",
  423. "res5",
  424. "res6",
  425. "res7",
  426. "CCDC_VD0_IRQ",
  427. "CCDC_VD1_IRQ",
  428. "CCDC_VD2_IRQ",
  429. "CCDC_ERR_IRQ",
  430. "H3A_AF_DONE_IRQ",
  431. "H3A_AWB_DONE_IRQ",
  432. "res14",
  433. "res15",
  434. "HIST_DONE_IRQ",
  435. "CCDC_LSC_DONE",
  436. "CCDC_LSC_PREFETCH_COMPLETED",
  437. "CCDC_LSC_PREFETCH_ERROR",
  438. "PRV_DONE_IRQ",
  439. "CBUFF_IRQ",
  440. "res22",
  441. "res23",
  442. "RSZ_DONE_IRQ",
  443. "OVF_IRQ",
  444. "res26",
  445. "res27",
  446. "MMU_ERR_IRQ",
  447. "OCP_ERR_IRQ",
  448. "SEC_ERR_IRQ",
  449. "HS_VS_IRQ",
  450. };
  451. int i;
  452. dev_dbg(isp->dev, "ISP IRQ: ");
  453. for (i = 0; i < ARRAY_SIZE(name); i++) {
  454. if ((1 << i) & irqstatus)
  455. printk(KERN_CONT "%s ", name[i]);
  456. }
  457. printk(KERN_CONT "\n");
  458. }
  459. static void isp_isr_sbl(struct isp_device *isp)
  460. {
  461. struct device *dev = isp->dev;
  462. struct isp_pipeline *pipe;
  463. u32 sbl_pcr;
  464. /*
  465. * Handle shared buffer logic overflows for video buffers.
  466. * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
  467. */
  468. sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  469. isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  470. sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
  471. if (sbl_pcr)
  472. dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
  473. if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
  474. pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
  475. if (pipe != NULL)
  476. pipe->error = true;
  477. }
  478. if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
  479. pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
  480. if (pipe != NULL)
  481. pipe->error = true;
  482. }
  483. if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
  484. pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
  485. if (pipe != NULL)
  486. pipe->error = true;
  487. }
  488. if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
  489. pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
  490. if (pipe != NULL)
  491. pipe->error = true;
  492. }
  493. if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
  494. | ISPSBL_PCR_RSZ2_WBL_OVF
  495. | ISPSBL_PCR_RSZ3_WBL_OVF
  496. | ISPSBL_PCR_RSZ4_WBL_OVF)) {
  497. pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
  498. if (pipe != NULL)
  499. pipe->error = true;
  500. }
  501. if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
  502. omap3isp_stat_sbl_overflow(&isp->isp_af);
  503. if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
  504. omap3isp_stat_sbl_overflow(&isp->isp_aewb);
  505. }
  506. /*
  507. * isp_isr - Interrupt Service Routine for Camera ISP module.
  508. * @irq: Not used currently.
  509. * @_isp: Pointer to the OMAP3 ISP device
  510. *
  511. * Handles the corresponding callback if plugged in.
  512. */
  513. static irqreturn_t isp_isr(int irq, void *_isp)
  514. {
  515. static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
  516. IRQ0STATUS_CCDC_LSC_DONE_IRQ |
  517. IRQ0STATUS_CCDC_VD0_IRQ |
  518. IRQ0STATUS_CCDC_VD1_IRQ |
  519. IRQ0STATUS_HS_VS_IRQ;
  520. struct isp_device *isp = _isp;
  521. u32 irqstatus;
  522. irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  523. isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  524. isp_isr_sbl(isp);
  525. if (irqstatus & IRQ0STATUS_CSIA_IRQ)
  526. omap3isp_csi2_isr(&isp->isp_csi2a);
  527. if (irqstatus & IRQ0STATUS_CSIB_IRQ)
  528. omap3isp_ccp2_isr(&isp->isp_ccp2);
  529. if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
  530. if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
  531. omap3isp_preview_isr_frame_sync(&isp->isp_prev);
  532. if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
  533. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  534. omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
  535. omap3isp_stat_isr_frame_sync(&isp->isp_af);
  536. omap3isp_stat_isr_frame_sync(&isp->isp_hist);
  537. }
  538. if (irqstatus & ccdc_events)
  539. omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
  540. if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
  541. if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
  542. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  543. omap3isp_preview_isr(&isp->isp_prev);
  544. }
  545. if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
  546. omap3isp_resizer_isr(&isp->isp_res);
  547. if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
  548. omap3isp_stat_isr(&isp->isp_aewb);
  549. if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
  550. omap3isp_stat_isr(&isp->isp_af);
  551. if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
  552. omap3isp_stat_isr(&isp->isp_hist);
  553. omap3isp_flush(isp);
  554. #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
  555. isp_isr_dbg(isp, irqstatus);
  556. #endif
  557. return IRQ_HANDLED;
  558. }
  559. static const struct media_device_ops isp_media_ops = {
  560. .link_notify = v4l2_pipeline_link_notify,
  561. };
  562. /* -----------------------------------------------------------------------------
  563. * Pipeline stream management
  564. */
  565. /*
  566. * isp_pipeline_enable - Enable streaming on a pipeline
  567. * @pipe: ISP pipeline
  568. * @mode: Stream mode (single shot or continuous)
  569. *
  570. * Walk the entities chain starting at the pipeline output video node and start
  571. * all modules in the chain in the given mode.
  572. *
  573. * Return 0 if successful, or the return value of the failed video::s_stream
  574. * operation otherwise.
  575. */
  576. static int isp_pipeline_enable(struct isp_pipeline *pipe,
  577. enum isp_pipeline_stream_state mode)
  578. {
  579. struct isp_device *isp = pipe->output->isp;
  580. struct media_entity *entity;
  581. struct media_pad *pad;
  582. struct v4l2_subdev *subdev;
  583. unsigned long flags;
  584. int ret;
  585. /* Refuse to start streaming if an entity included in the pipeline has
  586. * crashed. This check must be performed before the loop below to avoid
  587. * starting entities if the pipeline won't start anyway (those entities
  588. * would then likely fail to stop, making the problem worse).
  589. */
  590. if (media_entity_enum_intersects(&pipe->ent_enum, &isp->crashed))
  591. return -EIO;
  592. spin_lock_irqsave(&pipe->lock, flags);
  593. pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
  594. spin_unlock_irqrestore(&pipe->lock, flags);
  595. pipe->do_propagation = false;
  596. entity = &pipe->output->video.entity;
  597. while (1) {
  598. pad = &entity->pads[0];
  599. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  600. break;
  601. pad = media_entity_remote_pad(pad);
  602. if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
  603. break;
  604. entity = pad->entity;
  605. subdev = media_entity_to_v4l2_subdev(entity);
  606. ret = v4l2_subdev_call(subdev, video, s_stream, mode);
  607. if (ret < 0 && ret != -ENOIOCTLCMD)
  608. return ret;
  609. if (subdev == &isp->isp_ccdc.subdev) {
  610. v4l2_subdev_call(&isp->isp_aewb.subdev, video,
  611. s_stream, mode);
  612. v4l2_subdev_call(&isp->isp_af.subdev, video,
  613. s_stream, mode);
  614. v4l2_subdev_call(&isp->isp_hist.subdev, video,
  615. s_stream, mode);
  616. pipe->do_propagation = true;
  617. }
  618. /* Stop at the first external sub-device. */
  619. if (subdev->dev != isp->dev)
  620. break;
  621. }
  622. return 0;
  623. }
  624. static int isp_pipeline_wait_resizer(struct isp_device *isp)
  625. {
  626. return omap3isp_resizer_busy(&isp->isp_res);
  627. }
  628. static int isp_pipeline_wait_preview(struct isp_device *isp)
  629. {
  630. return omap3isp_preview_busy(&isp->isp_prev);
  631. }
  632. static int isp_pipeline_wait_ccdc(struct isp_device *isp)
  633. {
  634. return omap3isp_stat_busy(&isp->isp_af)
  635. || omap3isp_stat_busy(&isp->isp_aewb)
  636. || omap3isp_stat_busy(&isp->isp_hist)
  637. || omap3isp_ccdc_busy(&isp->isp_ccdc);
  638. }
  639. #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
  640. static int isp_pipeline_wait(struct isp_device *isp,
  641. int(*busy)(struct isp_device *isp))
  642. {
  643. unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
  644. while (!time_after(jiffies, timeout)) {
  645. if (!busy(isp))
  646. return 0;
  647. }
  648. return 1;
  649. }
  650. /*
  651. * isp_pipeline_disable - Disable streaming on a pipeline
  652. * @pipe: ISP pipeline
  653. *
  654. * Walk the entities chain starting at the pipeline output video node and stop
  655. * all modules in the chain. Wait synchronously for the modules to be stopped if
  656. * necessary.
  657. *
  658. * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
  659. * can't be stopped (in which case a software reset of the ISP is probably
  660. * necessary).
  661. */
  662. static int isp_pipeline_disable(struct isp_pipeline *pipe)
  663. {
  664. struct isp_device *isp = pipe->output->isp;
  665. struct media_entity *entity;
  666. struct media_pad *pad;
  667. struct v4l2_subdev *subdev;
  668. int failure = 0;
  669. int ret;
  670. /*
  671. * We need to stop all the modules after CCDC first or they'll
  672. * never stop since they may not get a full frame from CCDC.
  673. */
  674. entity = &pipe->output->video.entity;
  675. while (1) {
  676. pad = &entity->pads[0];
  677. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  678. break;
  679. pad = media_entity_remote_pad(pad);
  680. if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
  681. break;
  682. entity = pad->entity;
  683. subdev = media_entity_to_v4l2_subdev(entity);
  684. if (subdev == &isp->isp_ccdc.subdev) {
  685. v4l2_subdev_call(&isp->isp_aewb.subdev,
  686. video, s_stream, 0);
  687. v4l2_subdev_call(&isp->isp_af.subdev,
  688. video, s_stream, 0);
  689. v4l2_subdev_call(&isp->isp_hist.subdev,
  690. video, s_stream, 0);
  691. }
  692. ret = v4l2_subdev_call(subdev, video, s_stream, 0);
  693. if (subdev == &isp->isp_res.subdev)
  694. ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
  695. else if (subdev == &isp->isp_prev.subdev)
  696. ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
  697. else if (subdev == &isp->isp_ccdc.subdev)
  698. ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
  699. /* Handle stop failures. An entity that fails to stop can
  700. * usually just be restarted. Flag the stop failure nonetheless
  701. * to trigger an ISP reset the next time the device is released,
  702. * just in case.
  703. *
  704. * The preview engine is a special case. A failure to stop can
  705. * mean a hardware crash. When that happens the preview engine
  706. * won't respond to read/write operations on the L4 bus anymore,
  707. * resulting in a bus fault and a kernel oops next time it gets
  708. * accessed. Mark it as crashed to prevent pipelines including
  709. * it from being started.
  710. */
  711. if (ret) {
  712. dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
  713. isp->stop_failure = true;
  714. if (subdev == &isp->isp_prev.subdev)
  715. media_entity_enum_set(&isp->crashed,
  716. &subdev->entity);
  717. failure = -ETIMEDOUT;
  718. }
  719. /* Stop at the first external sub-device. */
  720. if (subdev->dev != isp->dev)
  721. break;
  722. }
  723. return failure;
  724. }
  725. /*
  726. * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
  727. * @pipe: ISP pipeline
  728. * @state: Stream state (stopped, single shot or continuous)
  729. *
  730. * Set the pipeline to the given stream state. Pipelines can be started in
  731. * single-shot or continuous mode.
  732. *
  733. * Return 0 if successful, or the return value of the failed video::s_stream
  734. * operation otherwise. The pipeline state is not updated when the operation
  735. * fails, except when stopping the pipeline.
  736. */
  737. int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
  738. enum isp_pipeline_stream_state state)
  739. {
  740. int ret;
  741. if (state == ISP_PIPELINE_STREAM_STOPPED)
  742. ret = isp_pipeline_disable(pipe);
  743. else
  744. ret = isp_pipeline_enable(pipe, state);
  745. if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
  746. pipe->stream_state = state;
  747. return ret;
  748. }
  749. /*
  750. * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
  751. * @pipe: ISP pipeline
  752. *
  753. * Cancelling a stream mark all buffers on all video nodes in the pipeline as
  754. * erroneous and makes sure no new buffer can be queued. This function is called
  755. * when a fatal error that prevents any further operation on the pipeline
  756. * occurs.
  757. */
  758. void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
  759. {
  760. if (pipe->input)
  761. omap3isp_video_cancel_stream(pipe->input);
  762. if (pipe->output)
  763. omap3isp_video_cancel_stream(pipe->output);
  764. }
  765. /*
  766. * isp_pipeline_resume - Resume streaming on a pipeline
  767. * @pipe: ISP pipeline
  768. *
  769. * Resume video output and input and re-enable pipeline.
  770. */
  771. static void isp_pipeline_resume(struct isp_pipeline *pipe)
  772. {
  773. int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
  774. omap3isp_video_resume(pipe->output, !singleshot);
  775. if (singleshot)
  776. omap3isp_video_resume(pipe->input, 0);
  777. isp_pipeline_enable(pipe, pipe->stream_state);
  778. }
  779. /*
  780. * isp_pipeline_suspend - Suspend streaming on a pipeline
  781. * @pipe: ISP pipeline
  782. *
  783. * Suspend pipeline.
  784. */
  785. static void isp_pipeline_suspend(struct isp_pipeline *pipe)
  786. {
  787. isp_pipeline_disable(pipe);
  788. }
  789. /*
  790. * isp_pipeline_is_last - Verify if entity has an enabled link to the output
  791. * video node
  792. * @me: ISP module's media entity
  793. *
  794. * Returns 1 if the entity has an enabled link to the output video node or 0
  795. * otherwise. It's true only while pipeline can have no more than one output
  796. * node.
  797. */
  798. static int isp_pipeline_is_last(struct media_entity *me)
  799. {
  800. struct isp_pipeline *pipe;
  801. struct media_pad *pad;
  802. if (!me->pipe)
  803. return 0;
  804. pipe = to_isp_pipeline(me);
  805. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
  806. return 0;
  807. pad = media_entity_remote_pad(&pipe->output->pad);
  808. return pad->entity == me;
  809. }
  810. /*
  811. * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
  812. * @me: ISP module's media entity
  813. *
  814. * Suspend the whole pipeline if module's entity has an enabled link to the
  815. * output video node. It works only while pipeline can have no more than one
  816. * output node.
  817. */
  818. static void isp_suspend_module_pipeline(struct media_entity *me)
  819. {
  820. if (isp_pipeline_is_last(me))
  821. isp_pipeline_suspend(to_isp_pipeline(me));
  822. }
  823. /*
  824. * isp_resume_module_pipeline - Resume pipeline to which belongs the module
  825. * @me: ISP module's media entity
  826. *
  827. * Resume the whole pipeline if module's entity has an enabled link to the
  828. * output video node. It works only while pipeline can have no more than one
  829. * output node.
  830. */
  831. static void isp_resume_module_pipeline(struct media_entity *me)
  832. {
  833. if (isp_pipeline_is_last(me))
  834. isp_pipeline_resume(to_isp_pipeline(me));
  835. }
  836. /*
  837. * isp_suspend_modules - Suspend ISP submodules.
  838. * @isp: OMAP3 ISP device
  839. *
  840. * Returns 0 if suspend left in idle state all the submodules properly,
  841. * or returns 1 if a general Reset is required to suspend the submodules.
  842. */
  843. static int isp_suspend_modules(struct isp_device *isp)
  844. {
  845. unsigned long timeout;
  846. omap3isp_stat_suspend(&isp->isp_aewb);
  847. omap3isp_stat_suspend(&isp->isp_af);
  848. omap3isp_stat_suspend(&isp->isp_hist);
  849. isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
  850. isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
  851. isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
  852. isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
  853. isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
  854. timeout = jiffies + ISP_STOP_TIMEOUT;
  855. while (omap3isp_stat_busy(&isp->isp_af)
  856. || omap3isp_stat_busy(&isp->isp_aewb)
  857. || omap3isp_stat_busy(&isp->isp_hist)
  858. || omap3isp_preview_busy(&isp->isp_prev)
  859. || omap3isp_resizer_busy(&isp->isp_res)
  860. || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
  861. if (time_after(jiffies, timeout)) {
  862. dev_info(isp->dev, "can't stop modules.\n");
  863. return 1;
  864. }
  865. msleep(1);
  866. }
  867. return 0;
  868. }
  869. /*
  870. * isp_resume_modules - Resume ISP submodules.
  871. * @isp: OMAP3 ISP device
  872. */
  873. static void isp_resume_modules(struct isp_device *isp)
  874. {
  875. omap3isp_stat_resume(&isp->isp_aewb);
  876. omap3isp_stat_resume(&isp->isp_af);
  877. omap3isp_stat_resume(&isp->isp_hist);
  878. isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
  879. isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
  880. isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
  881. isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
  882. isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
  883. }
  884. /*
  885. * isp_reset - Reset ISP with a timeout wait for idle.
  886. * @isp: OMAP3 ISP device
  887. */
  888. static int isp_reset(struct isp_device *isp)
  889. {
  890. unsigned long timeout = 0;
  891. isp_reg_writel(isp,
  892. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
  893. | ISP_SYSCONFIG_SOFTRESET,
  894. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  895. while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
  896. ISP_SYSSTATUS) & 0x1)) {
  897. if (timeout++ > 10000) {
  898. dev_alert(isp->dev, "cannot reset ISP\n");
  899. return -ETIMEDOUT;
  900. }
  901. udelay(1);
  902. }
  903. isp->stop_failure = false;
  904. media_entity_enum_zero(&isp->crashed);
  905. return 0;
  906. }
  907. /*
  908. * isp_save_context - Saves the values of the ISP module registers.
  909. * @isp: OMAP3 ISP device
  910. * @reg_list: Structure containing pairs of register address and value to
  911. * modify on OMAP.
  912. */
  913. static void
  914. isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
  915. {
  916. struct isp_reg *next = reg_list;
  917. for (; next->reg != ISP_TOK_TERM; next++)
  918. next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
  919. }
  920. /*
  921. * isp_restore_context - Restores the values of the ISP module registers.
  922. * @isp: OMAP3 ISP device
  923. * @reg_list: Structure containing pairs of register address and value to
  924. * modify on OMAP.
  925. */
  926. static void
  927. isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
  928. {
  929. struct isp_reg *next = reg_list;
  930. for (; next->reg != ISP_TOK_TERM; next++)
  931. isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
  932. }
  933. /*
  934. * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  935. * @isp: OMAP3 ISP device
  936. *
  937. * Routine for saving the context of each module in the ISP.
  938. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  939. */
  940. static void isp_save_ctx(struct isp_device *isp)
  941. {
  942. isp_save_context(isp, isp_reg_list);
  943. omap_iommu_save_ctx(isp->dev);
  944. }
  945. /*
  946. * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  947. * @isp: OMAP3 ISP device
  948. *
  949. * Routine for restoring the context of each module in the ISP.
  950. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  951. */
  952. static void isp_restore_ctx(struct isp_device *isp)
  953. {
  954. isp_restore_context(isp, isp_reg_list);
  955. omap_iommu_restore_ctx(isp->dev);
  956. omap3isp_ccdc_restore_context(isp);
  957. omap3isp_preview_restore_context(isp);
  958. }
  959. /* -----------------------------------------------------------------------------
  960. * SBL resources management
  961. */
  962. #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
  963. OMAP3_ISP_SBL_CCDC_LSC_READ | \
  964. OMAP3_ISP_SBL_PREVIEW_READ | \
  965. OMAP3_ISP_SBL_RESIZER_READ)
  966. #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
  967. OMAP3_ISP_SBL_CSI2A_WRITE | \
  968. OMAP3_ISP_SBL_CSI2C_WRITE | \
  969. OMAP3_ISP_SBL_CCDC_WRITE | \
  970. OMAP3_ISP_SBL_PREVIEW_WRITE)
  971. void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
  972. {
  973. u32 sbl = 0;
  974. isp->sbl_resources |= res;
  975. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
  976. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  977. if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
  978. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  979. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
  980. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  981. if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
  982. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  983. if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
  984. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  985. if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
  986. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  987. isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  988. }
  989. void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
  990. {
  991. u32 sbl = 0;
  992. isp->sbl_resources &= ~res;
  993. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
  994. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  995. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
  996. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  997. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
  998. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  999. if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
  1000. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  1001. if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
  1002. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  1003. if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
  1004. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  1005. isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1006. }
  1007. /*
  1008. * isp_module_sync_idle - Helper to sync module with its idle state
  1009. * @me: ISP submodule's media entity
  1010. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1011. * @stopping: flag which tells module wants to stop
  1012. *
  1013. * This function checks if ISP submodule needs to wait for next interrupt. If
  1014. * yes, makes the caller to sleep while waiting for such event.
  1015. */
  1016. int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
  1017. atomic_t *stopping)
  1018. {
  1019. struct isp_pipeline *pipe = to_isp_pipeline(me);
  1020. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
  1021. (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1022. !isp_pipeline_ready(pipe)))
  1023. return 0;
  1024. /*
  1025. * atomic_set() doesn't include memory barrier on ARM platform for SMP
  1026. * scenario. We'll call it here to avoid race conditions.
  1027. */
  1028. atomic_set(stopping, 1);
  1029. smp_mb();
  1030. /*
  1031. * If module is the last one, it's writing to memory. In this case,
  1032. * it's necessary to check if the module is already paused due to
  1033. * DMA queue underrun or if it has to wait for next interrupt to be
  1034. * idle.
  1035. * If it isn't the last one, the function won't sleep but *stopping
  1036. * will still be set to warn next submodule caller's interrupt the
  1037. * module wants to be idle.
  1038. */
  1039. if (isp_pipeline_is_last(me)) {
  1040. struct isp_video *video = pipe->output;
  1041. unsigned long flags;
  1042. spin_lock_irqsave(&video->irqlock, flags);
  1043. if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
  1044. spin_unlock_irqrestore(&video->irqlock, flags);
  1045. atomic_set(stopping, 0);
  1046. smp_mb();
  1047. return 0;
  1048. }
  1049. spin_unlock_irqrestore(&video->irqlock, flags);
  1050. if (!wait_event_timeout(*wait, !atomic_read(stopping),
  1051. msecs_to_jiffies(1000))) {
  1052. atomic_set(stopping, 0);
  1053. smp_mb();
  1054. return -ETIMEDOUT;
  1055. }
  1056. }
  1057. return 0;
  1058. }
  1059. /*
  1060. * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
  1061. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1062. * @stopping: flag which tells module wants to stop
  1063. *
  1064. * This function checks if ISP submodule was stopping. In case of yes, it
  1065. * notices the caller by setting stopping to 0 and waking up the wait queue.
  1066. * Returns 1 if it was stopping or 0 otherwise.
  1067. */
  1068. int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
  1069. atomic_t *stopping)
  1070. {
  1071. if (atomic_cmpxchg(stopping, 1, 0)) {
  1072. wake_up(wait);
  1073. return 1;
  1074. }
  1075. return 0;
  1076. }
  1077. /* --------------------------------------------------------------------------
  1078. * Clock management
  1079. */
  1080. #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
  1081. ISPCTRL_HIST_CLK_EN | \
  1082. ISPCTRL_RSZ_CLK_EN | \
  1083. (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
  1084. (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
  1085. static void __isp_subclk_update(struct isp_device *isp)
  1086. {
  1087. u32 clk = 0;
  1088. /* AEWB and AF share the same clock. */
  1089. if (isp->subclk_resources &
  1090. (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
  1091. clk |= ISPCTRL_H3A_CLK_EN;
  1092. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
  1093. clk |= ISPCTRL_HIST_CLK_EN;
  1094. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
  1095. clk |= ISPCTRL_RSZ_CLK_EN;
  1096. /* NOTE: For CCDC & Preview submodules, we need to affect internal
  1097. * RAM as well.
  1098. */
  1099. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
  1100. clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
  1101. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
  1102. clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
  1103. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
  1104. ISPCTRL_CLKS_MASK, clk);
  1105. }
  1106. void omap3isp_subclk_enable(struct isp_device *isp,
  1107. enum isp_subclk_resource res)
  1108. {
  1109. isp->subclk_resources |= res;
  1110. __isp_subclk_update(isp);
  1111. }
  1112. void omap3isp_subclk_disable(struct isp_device *isp,
  1113. enum isp_subclk_resource res)
  1114. {
  1115. isp->subclk_resources &= ~res;
  1116. __isp_subclk_update(isp);
  1117. }
  1118. /*
  1119. * isp_enable_clocks - Enable ISP clocks
  1120. * @isp: OMAP3 ISP device
  1121. *
  1122. * Return 0 if successful, or clk_prepare_enable return value if any of them
  1123. * fails.
  1124. */
  1125. static int isp_enable_clocks(struct isp_device *isp)
  1126. {
  1127. int r;
  1128. unsigned long rate;
  1129. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
  1130. if (r) {
  1131. dev_err(isp->dev, "failed to enable cam_ick clock\n");
  1132. goto out_clk_enable_ick;
  1133. }
  1134. r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
  1135. if (r) {
  1136. dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
  1137. goto out_clk_enable_mclk;
  1138. }
  1139. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
  1140. if (r) {
  1141. dev_err(isp->dev, "failed to enable cam_mclk clock\n");
  1142. goto out_clk_enable_mclk;
  1143. }
  1144. rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
  1145. if (rate != CM_CAM_MCLK_HZ)
  1146. dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
  1147. " expected : %d\n"
  1148. " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
  1149. r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
  1150. if (r) {
  1151. dev_err(isp->dev, "failed to enable csi2_fck clock\n");
  1152. goto out_clk_enable_csi2_fclk;
  1153. }
  1154. return 0;
  1155. out_clk_enable_csi2_fclk:
  1156. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1157. out_clk_enable_mclk:
  1158. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1159. out_clk_enable_ick:
  1160. return r;
  1161. }
  1162. /*
  1163. * isp_disable_clocks - Disable ISP clocks
  1164. * @isp: OMAP3 ISP device
  1165. */
  1166. static void isp_disable_clocks(struct isp_device *isp)
  1167. {
  1168. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1169. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1170. clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
  1171. }
  1172. static const char *isp_clocks[] = {
  1173. "cam_ick",
  1174. "cam_mclk",
  1175. "csi2_96m_fck",
  1176. "l3_ick",
  1177. };
  1178. static int isp_get_clocks(struct isp_device *isp)
  1179. {
  1180. struct clk *clk;
  1181. unsigned int i;
  1182. for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
  1183. clk = devm_clk_get(isp->dev, isp_clocks[i]);
  1184. if (IS_ERR(clk)) {
  1185. dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
  1186. return PTR_ERR(clk);
  1187. }
  1188. isp->clock[i] = clk;
  1189. }
  1190. return 0;
  1191. }
  1192. /*
  1193. * omap3isp_get - Acquire the ISP resource.
  1194. *
  1195. * Initializes the clocks for the first acquire.
  1196. *
  1197. * Increment the reference count on the ISP. If the first reference is taken,
  1198. * enable clocks and power-up all submodules.
  1199. *
  1200. * Return a pointer to the ISP device structure, or NULL if an error occurred.
  1201. */
  1202. static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
  1203. {
  1204. struct isp_device *__isp = isp;
  1205. if (isp == NULL)
  1206. return NULL;
  1207. mutex_lock(&isp->isp_mutex);
  1208. if (isp->ref_count > 0)
  1209. goto out;
  1210. if (isp_enable_clocks(isp) < 0) {
  1211. __isp = NULL;
  1212. goto out;
  1213. }
  1214. /* We don't want to restore context before saving it! */
  1215. if (isp->has_context)
  1216. isp_restore_ctx(isp);
  1217. if (irq)
  1218. isp_enable_interrupts(isp);
  1219. out:
  1220. if (__isp != NULL)
  1221. isp->ref_count++;
  1222. mutex_unlock(&isp->isp_mutex);
  1223. return __isp;
  1224. }
  1225. struct isp_device *omap3isp_get(struct isp_device *isp)
  1226. {
  1227. return __omap3isp_get(isp, true);
  1228. }
  1229. /*
  1230. * omap3isp_put - Release the ISP
  1231. *
  1232. * Decrement the reference count on the ISP. If the last reference is released,
  1233. * power-down all submodules, disable clocks and free temporary buffers.
  1234. */
  1235. static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
  1236. {
  1237. if (isp == NULL)
  1238. return;
  1239. mutex_lock(&isp->isp_mutex);
  1240. BUG_ON(isp->ref_count == 0);
  1241. if (--isp->ref_count == 0) {
  1242. isp_disable_interrupts(isp);
  1243. if (save_ctx) {
  1244. isp_save_ctx(isp);
  1245. isp->has_context = 1;
  1246. }
  1247. /* Reset the ISP if an entity has failed to stop. This is the
  1248. * only way to recover from such conditions.
  1249. */
  1250. if (!media_entity_enum_empty(&isp->crashed) ||
  1251. isp->stop_failure)
  1252. isp_reset(isp);
  1253. isp_disable_clocks(isp);
  1254. }
  1255. mutex_unlock(&isp->isp_mutex);
  1256. }
  1257. void omap3isp_put(struct isp_device *isp)
  1258. {
  1259. __omap3isp_put(isp, true);
  1260. }
  1261. /* --------------------------------------------------------------------------
  1262. * Platform device driver
  1263. */
  1264. /*
  1265. * omap3isp_print_status - Prints the values of the ISP Control Module registers
  1266. * @isp: OMAP3 ISP device
  1267. */
  1268. #define ISP_PRINT_REGISTER(isp, name)\
  1269. dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
  1270. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
  1271. #define SBL_PRINT_REGISTER(isp, name)\
  1272. dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
  1273. isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
  1274. void omap3isp_print_status(struct isp_device *isp)
  1275. {
  1276. dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
  1277. ISP_PRINT_REGISTER(isp, SYSCONFIG);
  1278. ISP_PRINT_REGISTER(isp, SYSSTATUS);
  1279. ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
  1280. ISP_PRINT_REGISTER(isp, IRQ0STATUS);
  1281. ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
  1282. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
  1283. ISP_PRINT_REGISTER(isp, CTRL);
  1284. ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
  1285. ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
  1286. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
  1287. ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
  1288. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
  1289. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
  1290. ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
  1291. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
  1292. SBL_PRINT_REGISTER(isp, PCR);
  1293. SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
  1294. dev_dbg(isp->dev, "--------------------------------------------\n");
  1295. }
  1296. #ifdef CONFIG_PM
  1297. /*
  1298. * Power management support.
  1299. *
  1300. * As the ISP can't properly handle an input video stream interruption on a non
  1301. * frame boundary, the ISP pipelines need to be stopped before sensors get
  1302. * suspended. However, as suspending the sensors can require a running clock,
  1303. * which can be provided by the ISP, the ISP can't be completely suspended
  1304. * before the sensor.
  1305. *
  1306. * To solve this problem power management support is split into prepare/complete
  1307. * and suspend/resume operations. The pipelines are stopped in prepare() and the
  1308. * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
  1309. * resume(), and the the pipelines are restarted in complete().
  1310. *
  1311. * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
  1312. * yet.
  1313. */
  1314. static int isp_pm_prepare(struct device *dev)
  1315. {
  1316. struct isp_device *isp = dev_get_drvdata(dev);
  1317. int reset;
  1318. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1319. if (isp->ref_count == 0)
  1320. return 0;
  1321. reset = isp_suspend_modules(isp);
  1322. isp_disable_interrupts(isp);
  1323. isp_save_ctx(isp);
  1324. if (reset)
  1325. isp_reset(isp);
  1326. return 0;
  1327. }
  1328. static int isp_pm_suspend(struct device *dev)
  1329. {
  1330. struct isp_device *isp = dev_get_drvdata(dev);
  1331. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1332. if (isp->ref_count)
  1333. isp_disable_clocks(isp);
  1334. return 0;
  1335. }
  1336. static int isp_pm_resume(struct device *dev)
  1337. {
  1338. struct isp_device *isp = dev_get_drvdata(dev);
  1339. if (isp->ref_count == 0)
  1340. return 0;
  1341. return isp_enable_clocks(isp);
  1342. }
  1343. static void isp_pm_complete(struct device *dev)
  1344. {
  1345. struct isp_device *isp = dev_get_drvdata(dev);
  1346. if (isp->ref_count == 0)
  1347. return;
  1348. isp_restore_ctx(isp);
  1349. isp_enable_interrupts(isp);
  1350. isp_resume_modules(isp);
  1351. }
  1352. #else
  1353. #define isp_pm_prepare NULL
  1354. #define isp_pm_suspend NULL
  1355. #define isp_pm_resume NULL
  1356. #define isp_pm_complete NULL
  1357. #endif /* CONFIG_PM */
  1358. static void isp_unregister_entities(struct isp_device *isp)
  1359. {
  1360. media_device_unregister(&isp->media_dev);
  1361. omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
  1362. omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
  1363. omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
  1364. omap3isp_preview_unregister_entities(&isp->isp_prev);
  1365. omap3isp_resizer_unregister_entities(&isp->isp_res);
  1366. omap3isp_stat_unregister_entities(&isp->isp_aewb);
  1367. omap3isp_stat_unregister_entities(&isp->isp_af);
  1368. omap3isp_stat_unregister_entities(&isp->isp_hist);
  1369. v4l2_device_unregister(&isp->v4l2_dev);
  1370. media_device_cleanup(&isp->media_dev);
  1371. }
  1372. static int isp_link_entity(
  1373. struct isp_device *isp, struct media_entity *entity,
  1374. enum isp_interface_type interface)
  1375. {
  1376. struct media_entity *input;
  1377. unsigned int flags;
  1378. unsigned int pad;
  1379. unsigned int i;
  1380. /* Connect the sensor to the correct interface module.
  1381. * Parallel sensors are connected directly to the CCDC, while
  1382. * serial sensors are connected to the CSI2a, CCP2b or CSI2c
  1383. * receiver through CSIPHY1 or CSIPHY2.
  1384. */
  1385. switch (interface) {
  1386. case ISP_INTERFACE_PARALLEL:
  1387. input = &isp->isp_ccdc.subdev.entity;
  1388. pad = CCDC_PAD_SINK;
  1389. flags = 0;
  1390. break;
  1391. case ISP_INTERFACE_CSI2A_PHY2:
  1392. input = &isp->isp_csi2a.subdev.entity;
  1393. pad = CSI2_PAD_SINK;
  1394. flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
  1395. break;
  1396. case ISP_INTERFACE_CCP2B_PHY1:
  1397. case ISP_INTERFACE_CCP2B_PHY2:
  1398. input = &isp->isp_ccp2.subdev.entity;
  1399. pad = CCP2_PAD_SINK;
  1400. flags = 0;
  1401. break;
  1402. case ISP_INTERFACE_CSI2C_PHY1:
  1403. input = &isp->isp_csi2c.subdev.entity;
  1404. pad = CSI2_PAD_SINK;
  1405. flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
  1406. break;
  1407. default:
  1408. dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
  1409. interface);
  1410. return -EINVAL;
  1411. }
  1412. /*
  1413. * Not all interfaces are available on all revisions of the
  1414. * ISP. The sub-devices of those interfaces aren't initialised
  1415. * in such a case. Check this by ensuring the num_pads is
  1416. * non-zero.
  1417. */
  1418. if (!input->num_pads) {
  1419. dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
  1420. interface);
  1421. return -EINVAL;
  1422. }
  1423. for (i = 0; i < entity->num_pads; i++) {
  1424. if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
  1425. break;
  1426. }
  1427. if (i == entity->num_pads) {
  1428. dev_err(isp->dev, "%s: no source pad in external entity\n",
  1429. __func__);
  1430. return -EINVAL;
  1431. }
  1432. return media_create_pad_link(entity, i, input, pad, flags);
  1433. }
  1434. static int isp_register_entities(struct isp_device *isp)
  1435. {
  1436. int ret;
  1437. isp->media_dev.dev = isp->dev;
  1438. strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
  1439. sizeof(isp->media_dev.model));
  1440. isp->media_dev.hw_revision = isp->revision;
  1441. isp->media_dev.ops = &isp_media_ops;
  1442. media_device_init(&isp->media_dev);
  1443. isp->v4l2_dev.mdev = &isp->media_dev;
  1444. ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
  1445. if (ret < 0) {
  1446. dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
  1447. __func__, ret);
  1448. goto done;
  1449. }
  1450. /* Register internal entities */
  1451. ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
  1452. if (ret < 0)
  1453. goto done;
  1454. ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
  1455. if (ret < 0)
  1456. goto done;
  1457. ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
  1458. if (ret < 0)
  1459. goto done;
  1460. ret = omap3isp_preview_register_entities(&isp->isp_prev,
  1461. &isp->v4l2_dev);
  1462. if (ret < 0)
  1463. goto done;
  1464. ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
  1465. if (ret < 0)
  1466. goto done;
  1467. ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
  1468. if (ret < 0)
  1469. goto done;
  1470. ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
  1471. if (ret < 0)
  1472. goto done;
  1473. ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
  1474. if (ret < 0)
  1475. goto done;
  1476. done:
  1477. if (ret < 0)
  1478. isp_unregister_entities(isp);
  1479. return ret;
  1480. }
  1481. /*
  1482. * isp_create_links() - Create links for internal and external ISP entities
  1483. * @isp : Pointer to ISP device
  1484. *
  1485. * This function creates all links between ISP internal and external entities.
  1486. *
  1487. * Return: A negative error code on failure or zero on success. Possible error
  1488. * codes are those returned by media_create_pad_link().
  1489. */
  1490. static int isp_create_links(struct isp_device *isp)
  1491. {
  1492. int ret;
  1493. /* Create links between entities and video nodes. */
  1494. ret = media_create_pad_link(
  1495. &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
  1496. &isp->isp_csi2a.video_out.video.entity, 0, 0);
  1497. if (ret < 0)
  1498. return ret;
  1499. ret = media_create_pad_link(
  1500. &isp->isp_ccp2.video_in.video.entity, 0,
  1501. &isp->isp_ccp2.subdev.entity, CCP2_PAD_SINK, 0);
  1502. if (ret < 0)
  1503. return ret;
  1504. ret = media_create_pad_link(
  1505. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
  1506. &isp->isp_ccdc.video_out.video.entity, 0, 0);
  1507. if (ret < 0)
  1508. return ret;
  1509. ret = media_create_pad_link(
  1510. &isp->isp_prev.video_in.video.entity, 0,
  1511. &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
  1512. if (ret < 0)
  1513. return ret;
  1514. ret = media_create_pad_link(
  1515. &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
  1516. &isp->isp_prev.video_out.video.entity, 0, 0);
  1517. if (ret < 0)
  1518. return ret;
  1519. ret = media_create_pad_link(
  1520. &isp->isp_res.video_in.video.entity, 0,
  1521. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1522. if (ret < 0)
  1523. return ret;
  1524. ret = media_create_pad_link(
  1525. &isp->isp_res.subdev.entity, RESZ_PAD_SOURCE,
  1526. &isp->isp_res.video_out.video.entity, 0, 0);
  1527. if (ret < 0)
  1528. return ret;
  1529. /* Create links between entities. */
  1530. ret = media_create_pad_link(
  1531. &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
  1532. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1533. if (ret < 0)
  1534. return ret;
  1535. ret = media_create_pad_link(
  1536. &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
  1537. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1538. if (ret < 0)
  1539. return ret;
  1540. ret = media_create_pad_link(
  1541. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1542. &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
  1543. if (ret < 0)
  1544. return ret;
  1545. ret = media_create_pad_link(
  1546. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
  1547. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1548. if (ret < 0)
  1549. return ret;
  1550. ret = media_create_pad_link(
  1551. &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
  1552. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1553. if (ret < 0)
  1554. return ret;
  1555. ret = media_create_pad_link(
  1556. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1557. &isp->isp_aewb.subdev.entity, 0,
  1558. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1559. if (ret < 0)
  1560. return ret;
  1561. ret = media_create_pad_link(
  1562. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1563. &isp->isp_af.subdev.entity, 0,
  1564. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1565. if (ret < 0)
  1566. return ret;
  1567. ret = media_create_pad_link(
  1568. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1569. &isp->isp_hist.subdev.entity, 0,
  1570. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1571. if (ret < 0)
  1572. return ret;
  1573. return 0;
  1574. }
  1575. static void isp_cleanup_modules(struct isp_device *isp)
  1576. {
  1577. omap3isp_h3a_aewb_cleanup(isp);
  1578. omap3isp_h3a_af_cleanup(isp);
  1579. omap3isp_hist_cleanup(isp);
  1580. omap3isp_resizer_cleanup(isp);
  1581. omap3isp_preview_cleanup(isp);
  1582. omap3isp_ccdc_cleanup(isp);
  1583. omap3isp_ccp2_cleanup(isp);
  1584. omap3isp_csi2_cleanup(isp);
  1585. }
  1586. static int isp_initialize_modules(struct isp_device *isp)
  1587. {
  1588. int ret;
  1589. ret = omap3isp_csiphy_init(isp);
  1590. if (ret < 0) {
  1591. dev_err(isp->dev, "CSI PHY initialization failed\n");
  1592. goto error_csiphy;
  1593. }
  1594. ret = omap3isp_csi2_init(isp);
  1595. if (ret < 0) {
  1596. dev_err(isp->dev, "CSI2 initialization failed\n");
  1597. goto error_csi2;
  1598. }
  1599. ret = omap3isp_ccp2_init(isp);
  1600. if (ret < 0) {
  1601. dev_err(isp->dev, "CCP2 initialization failed\n");
  1602. goto error_ccp2;
  1603. }
  1604. ret = omap3isp_ccdc_init(isp);
  1605. if (ret < 0) {
  1606. dev_err(isp->dev, "CCDC initialization failed\n");
  1607. goto error_ccdc;
  1608. }
  1609. ret = omap3isp_preview_init(isp);
  1610. if (ret < 0) {
  1611. dev_err(isp->dev, "Preview initialization failed\n");
  1612. goto error_preview;
  1613. }
  1614. ret = omap3isp_resizer_init(isp);
  1615. if (ret < 0) {
  1616. dev_err(isp->dev, "Resizer initialization failed\n");
  1617. goto error_resizer;
  1618. }
  1619. ret = omap3isp_hist_init(isp);
  1620. if (ret < 0) {
  1621. dev_err(isp->dev, "Histogram initialization failed\n");
  1622. goto error_hist;
  1623. }
  1624. ret = omap3isp_h3a_aewb_init(isp);
  1625. if (ret < 0) {
  1626. dev_err(isp->dev, "H3A AEWB initialization failed\n");
  1627. goto error_h3a_aewb;
  1628. }
  1629. ret = omap3isp_h3a_af_init(isp);
  1630. if (ret < 0) {
  1631. dev_err(isp->dev, "H3A AF initialization failed\n");
  1632. goto error_h3a_af;
  1633. }
  1634. return 0;
  1635. error_h3a_af:
  1636. omap3isp_h3a_aewb_cleanup(isp);
  1637. error_h3a_aewb:
  1638. omap3isp_hist_cleanup(isp);
  1639. error_hist:
  1640. omap3isp_resizer_cleanup(isp);
  1641. error_resizer:
  1642. omap3isp_preview_cleanup(isp);
  1643. error_preview:
  1644. omap3isp_ccdc_cleanup(isp);
  1645. error_ccdc:
  1646. omap3isp_ccp2_cleanup(isp);
  1647. error_ccp2:
  1648. omap3isp_csi2_cleanup(isp);
  1649. error_csi2:
  1650. error_csiphy:
  1651. return ret;
  1652. }
  1653. static void isp_detach_iommu(struct isp_device *isp)
  1654. {
  1655. arm_iommu_detach_device(isp->dev);
  1656. arm_iommu_release_mapping(isp->mapping);
  1657. isp->mapping = NULL;
  1658. iommu_group_remove_device(isp->dev);
  1659. }
  1660. static int isp_attach_iommu(struct isp_device *isp)
  1661. {
  1662. struct dma_iommu_mapping *mapping;
  1663. struct iommu_group *group;
  1664. int ret;
  1665. /* Create a device group and add the device to it. */
  1666. group = iommu_group_alloc();
  1667. if (IS_ERR(group)) {
  1668. dev_err(isp->dev, "failed to allocate IOMMU group\n");
  1669. return PTR_ERR(group);
  1670. }
  1671. ret = iommu_group_add_device(group, isp->dev);
  1672. iommu_group_put(group);
  1673. if (ret < 0) {
  1674. dev_err(isp->dev, "failed to add device to IPMMU group\n");
  1675. return ret;
  1676. }
  1677. /*
  1678. * Create the ARM mapping, used by the ARM DMA mapping core to allocate
  1679. * VAs. This will allocate a corresponding IOMMU domain.
  1680. */
  1681. mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
  1682. if (IS_ERR(mapping)) {
  1683. dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
  1684. return PTR_ERR(mapping);
  1685. }
  1686. isp->mapping = mapping;
  1687. /* Attach the ARM VA mapping to the device. */
  1688. ret = arm_iommu_attach_device(isp->dev, mapping);
  1689. if (ret < 0) {
  1690. dev_err(isp->dev, "failed to attach device to VA mapping\n");
  1691. goto error;
  1692. }
  1693. return 0;
  1694. error:
  1695. arm_iommu_release_mapping(isp->mapping);
  1696. isp->mapping = NULL;
  1697. return ret;
  1698. }
  1699. /*
  1700. * isp_remove - Remove ISP platform device
  1701. * @pdev: Pointer to ISP platform device
  1702. *
  1703. * Always returns 0.
  1704. */
  1705. static int isp_remove(struct platform_device *pdev)
  1706. {
  1707. struct isp_device *isp = platform_get_drvdata(pdev);
  1708. v4l2_async_notifier_unregister(&isp->notifier);
  1709. isp_unregister_entities(isp);
  1710. isp_cleanup_modules(isp);
  1711. isp_xclk_cleanup(isp);
  1712. __omap3isp_get(isp, false);
  1713. isp_detach_iommu(isp);
  1714. __omap3isp_put(isp, false);
  1715. media_entity_enum_cleanup(&isp->crashed);
  1716. return 0;
  1717. }
  1718. enum isp_of_phy {
  1719. ISP_OF_PHY_PARALLEL = 0,
  1720. ISP_OF_PHY_CSIPHY1,
  1721. ISP_OF_PHY_CSIPHY2,
  1722. };
  1723. static int isp_of_parse_node(struct device *dev, struct device_node *node,
  1724. struct isp_async_subdev *isd)
  1725. {
  1726. struct isp_bus_cfg *buscfg = &isd->bus;
  1727. struct v4l2_of_endpoint vep;
  1728. unsigned int i;
  1729. int ret;
  1730. ret = v4l2_of_parse_endpoint(node, &vep);
  1731. if (ret)
  1732. return ret;
  1733. dev_dbg(dev, "parsing endpoint %s, interface %u\n", node->full_name,
  1734. vep.base.port);
  1735. switch (vep.base.port) {
  1736. case ISP_OF_PHY_PARALLEL:
  1737. buscfg->interface = ISP_INTERFACE_PARALLEL;
  1738. buscfg->bus.parallel.data_lane_shift =
  1739. vep.bus.parallel.data_shift;
  1740. buscfg->bus.parallel.clk_pol =
  1741. !!(vep.bus.parallel.flags
  1742. & V4L2_MBUS_PCLK_SAMPLE_FALLING);
  1743. buscfg->bus.parallel.hs_pol =
  1744. !!(vep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW);
  1745. buscfg->bus.parallel.vs_pol =
  1746. !!(vep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW);
  1747. buscfg->bus.parallel.fld_pol =
  1748. !!(vep.bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW);
  1749. buscfg->bus.parallel.data_pol =
  1750. !!(vep.bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW);
  1751. break;
  1752. case ISP_OF_PHY_CSIPHY1:
  1753. case ISP_OF_PHY_CSIPHY2:
  1754. /* FIXME: always assume CSI-2 for now. */
  1755. switch (vep.base.port) {
  1756. case ISP_OF_PHY_CSIPHY1:
  1757. buscfg->interface = ISP_INTERFACE_CSI2C_PHY1;
  1758. break;
  1759. case ISP_OF_PHY_CSIPHY2:
  1760. buscfg->interface = ISP_INTERFACE_CSI2A_PHY2;
  1761. break;
  1762. }
  1763. buscfg->bus.csi2.lanecfg.clk.pos = vep.bus.mipi_csi2.clock_lane;
  1764. buscfg->bus.csi2.lanecfg.clk.pol =
  1765. vep.bus.mipi_csi2.lane_polarities[0];
  1766. dev_dbg(dev, "clock lane polarity %u, pos %u\n",
  1767. buscfg->bus.csi2.lanecfg.clk.pol,
  1768. buscfg->bus.csi2.lanecfg.clk.pos);
  1769. for (i = 0; i < ISP_CSIPHY2_NUM_DATA_LANES; i++) {
  1770. buscfg->bus.csi2.lanecfg.data[i].pos =
  1771. vep.bus.mipi_csi2.data_lanes[i];
  1772. buscfg->bus.csi2.lanecfg.data[i].pol =
  1773. vep.bus.mipi_csi2.lane_polarities[i + 1];
  1774. dev_dbg(dev, "data lane %u polarity %u, pos %u\n", i,
  1775. buscfg->bus.csi2.lanecfg.data[i].pol,
  1776. buscfg->bus.csi2.lanecfg.data[i].pos);
  1777. }
  1778. /*
  1779. * FIXME: now we assume the CRC is always there.
  1780. * Implement a way to obtain this information from the
  1781. * sensor. Frame descriptors, perhaps?
  1782. */
  1783. buscfg->bus.csi2.crc = 1;
  1784. break;
  1785. default:
  1786. dev_warn(dev, "%s: invalid interface %u\n", node->full_name,
  1787. vep.base.port);
  1788. break;
  1789. }
  1790. return 0;
  1791. }
  1792. static int isp_of_parse_nodes(struct device *dev,
  1793. struct v4l2_async_notifier *notifier)
  1794. {
  1795. struct device_node *node = NULL;
  1796. notifier->subdevs = devm_kcalloc(
  1797. dev, ISP_MAX_SUBDEVS, sizeof(*notifier->subdevs), GFP_KERNEL);
  1798. if (!notifier->subdevs)
  1799. return -ENOMEM;
  1800. while (notifier->num_subdevs < ISP_MAX_SUBDEVS &&
  1801. (node = of_graph_get_next_endpoint(dev->of_node, node))) {
  1802. struct isp_async_subdev *isd;
  1803. isd = devm_kzalloc(dev, sizeof(*isd), GFP_KERNEL);
  1804. if (!isd) {
  1805. of_node_put(node);
  1806. return -ENOMEM;
  1807. }
  1808. notifier->subdevs[notifier->num_subdevs] = &isd->asd;
  1809. if (isp_of_parse_node(dev, node, isd)) {
  1810. of_node_put(node);
  1811. return -EINVAL;
  1812. }
  1813. isd->asd.match.of.node = of_graph_get_remote_port_parent(node);
  1814. of_node_put(node);
  1815. if (!isd->asd.match.of.node) {
  1816. dev_warn(dev, "bad remote port parent\n");
  1817. return -EINVAL;
  1818. }
  1819. isd->asd.match_type = V4L2_ASYNC_MATCH_OF;
  1820. notifier->num_subdevs++;
  1821. }
  1822. return notifier->num_subdevs;
  1823. }
  1824. static int isp_subdev_notifier_bound(struct v4l2_async_notifier *async,
  1825. struct v4l2_subdev *subdev,
  1826. struct v4l2_async_subdev *asd)
  1827. {
  1828. struct isp_async_subdev *isd =
  1829. container_of(asd, struct isp_async_subdev, asd);
  1830. isd->sd = subdev;
  1831. isd->sd->host_priv = &isd->bus;
  1832. return 0;
  1833. }
  1834. static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
  1835. {
  1836. struct isp_device *isp = container_of(async, struct isp_device,
  1837. notifier);
  1838. struct v4l2_device *v4l2_dev = &isp->v4l2_dev;
  1839. struct v4l2_subdev *sd;
  1840. struct isp_bus_cfg *bus;
  1841. int ret;
  1842. ret = media_entity_enum_init(&isp->crashed, &isp->media_dev);
  1843. if (ret)
  1844. return ret;
  1845. list_for_each_entry(sd, &v4l2_dev->subdevs, list) {
  1846. /* Only try to link entities whose interface was set on bound */
  1847. if (sd->host_priv) {
  1848. bus = (struct isp_bus_cfg *)sd->host_priv;
  1849. ret = isp_link_entity(isp, &sd->entity, bus->interface);
  1850. if (ret < 0)
  1851. return ret;
  1852. }
  1853. }
  1854. ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
  1855. if (ret < 0)
  1856. return ret;
  1857. return media_device_register(&isp->media_dev);
  1858. }
  1859. /*
  1860. * isp_probe - Probe ISP platform device
  1861. * @pdev: Pointer to ISP platform device
  1862. *
  1863. * Returns 0 if successful,
  1864. * -ENOMEM if no memory available,
  1865. * -ENODEV if no platform device resources found
  1866. * or no space for remapping registers,
  1867. * -EINVAL if couldn't install ISR,
  1868. * or clk_get return error value.
  1869. */
  1870. static int isp_probe(struct platform_device *pdev)
  1871. {
  1872. struct isp_device *isp;
  1873. struct resource *mem;
  1874. int ret;
  1875. int i, m;
  1876. isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
  1877. if (!isp) {
  1878. dev_err(&pdev->dev, "could not allocate memory\n");
  1879. return -ENOMEM;
  1880. }
  1881. ret = of_property_read_u32(pdev->dev.of_node, "ti,phy-type",
  1882. &isp->phy_type);
  1883. if (ret)
  1884. return ret;
  1885. isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
  1886. "syscon");
  1887. if (IS_ERR(isp->syscon))
  1888. return PTR_ERR(isp->syscon);
  1889. ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1,
  1890. &isp->syscon_offset);
  1891. if (ret)
  1892. return ret;
  1893. ret = isp_of_parse_nodes(&pdev->dev, &isp->notifier);
  1894. if (ret < 0)
  1895. return ret;
  1896. isp->autoidle = autoidle;
  1897. mutex_init(&isp->isp_mutex);
  1898. spin_lock_init(&isp->stat_lock);
  1899. isp->dev = &pdev->dev;
  1900. isp->ref_count = 0;
  1901. ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
  1902. if (ret)
  1903. goto error;
  1904. platform_set_drvdata(pdev, isp);
  1905. /* Regulators */
  1906. isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1");
  1907. isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2");
  1908. /* Clocks
  1909. *
  1910. * The ISP clock tree is revision-dependent. We thus need to enable ICLK
  1911. * manually to read the revision before calling __omap3isp_get().
  1912. *
  1913. * Start by mapping the ISP MMIO area, which is in two pieces.
  1914. * The ISP IOMMU is in between. Map both now, and fill in the
  1915. * ISP revision specific portions a little later in the
  1916. * function.
  1917. */
  1918. for (i = 0; i < 2; i++) {
  1919. unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0;
  1920. mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
  1921. isp->mmio_base[map_idx] =
  1922. devm_ioremap_resource(isp->dev, mem);
  1923. if (IS_ERR(isp->mmio_base[map_idx]))
  1924. return PTR_ERR(isp->mmio_base[map_idx]);
  1925. }
  1926. ret = isp_get_clocks(isp);
  1927. if (ret < 0)
  1928. goto error;
  1929. ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
  1930. if (ret < 0)
  1931. goto error;
  1932. isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  1933. dev_info(isp->dev, "Revision %d.%d found\n",
  1934. (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
  1935. clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
  1936. if (__omap3isp_get(isp, false) == NULL) {
  1937. ret = -ENODEV;
  1938. goto error;
  1939. }
  1940. ret = isp_reset(isp);
  1941. if (ret < 0)
  1942. goto error_isp;
  1943. ret = isp_xclk_init(isp);
  1944. if (ret < 0)
  1945. goto error_isp;
  1946. /* Memory resources */
  1947. for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
  1948. if (isp->revision == isp_res_maps[m].isp_rev)
  1949. break;
  1950. if (m == ARRAY_SIZE(isp_res_maps)) {
  1951. dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
  1952. (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
  1953. ret = -ENODEV;
  1954. goto error_isp;
  1955. }
  1956. for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++)
  1957. isp->mmio_base[i] =
  1958. isp->mmio_base[0] + isp_res_maps[m].offset[i];
  1959. for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++)
  1960. isp->mmio_base[i] =
  1961. isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1]
  1962. + isp_res_maps[m].offset[i];
  1963. isp->mmio_hist_base_phys =
  1964. mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST];
  1965. /* IOMMU */
  1966. ret = isp_attach_iommu(isp);
  1967. if (ret < 0) {
  1968. dev_err(&pdev->dev, "unable to attach to IOMMU\n");
  1969. goto error_isp;
  1970. }
  1971. /* Interrupt */
  1972. ret = platform_get_irq(pdev, 0);
  1973. if (ret <= 0) {
  1974. dev_err(isp->dev, "No IRQ resource\n");
  1975. ret = -ENODEV;
  1976. goto error_iommu;
  1977. }
  1978. isp->irq_num = ret;
  1979. if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
  1980. "OMAP3 ISP", isp)) {
  1981. dev_err(isp->dev, "Unable to request IRQ\n");
  1982. ret = -EINVAL;
  1983. goto error_iommu;
  1984. }
  1985. /* Entities */
  1986. ret = isp_initialize_modules(isp);
  1987. if (ret < 0)
  1988. goto error_iommu;
  1989. ret = isp_register_entities(isp);
  1990. if (ret < 0)
  1991. goto error_modules;
  1992. ret = isp_create_links(isp);
  1993. if (ret < 0)
  1994. goto error_register_entities;
  1995. isp->notifier.bound = isp_subdev_notifier_bound;
  1996. isp->notifier.complete = isp_subdev_notifier_complete;
  1997. ret = v4l2_async_notifier_register(&isp->v4l2_dev, &isp->notifier);
  1998. if (ret)
  1999. goto error_register_entities;
  2000. isp_core_init(isp, 1);
  2001. omap3isp_put(isp);
  2002. return 0;
  2003. error_register_entities:
  2004. isp_unregister_entities(isp);
  2005. error_modules:
  2006. isp_cleanup_modules(isp);
  2007. error_iommu:
  2008. isp_detach_iommu(isp);
  2009. error_isp:
  2010. isp_xclk_cleanup(isp);
  2011. __omap3isp_put(isp, false);
  2012. error:
  2013. mutex_destroy(&isp->isp_mutex);
  2014. return ret;
  2015. }
  2016. static const struct dev_pm_ops omap3isp_pm_ops = {
  2017. .prepare = isp_pm_prepare,
  2018. .suspend = isp_pm_suspend,
  2019. .resume = isp_pm_resume,
  2020. .complete = isp_pm_complete,
  2021. };
  2022. static struct platform_device_id omap3isp_id_table[] = {
  2023. { "omap3isp", 0 },
  2024. { },
  2025. };
  2026. MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
  2027. static const struct of_device_id omap3isp_of_table[] = {
  2028. { .compatible = "ti,omap3-isp" },
  2029. { },
  2030. };
  2031. MODULE_DEVICE_TABLE(of, omap3isp_of_table);
  2032. static struct platform_driver omap3isp_driver = {
  2033. .probe = isp_probe,
  2034. .remove = isp_remove,
  2035. .id_table = omap3isp_id_table,
  2036. .driver = {
  2037. .name = "omap3isp",
  2038. .pm = &omap3isp_pm_ops,
  2039. .of_match_table = omap3isp_of_table,
  2040. },
  2041. };
  2042. module_platform_driver(omap3isp_driver);
  2043. MODULE_AUTHOR("Nokia Corporation");
  2044. MODULE_DESCRIPTION("TI OMAP3 ISP driver");
  2045. MODULE_LICENSE("GPL");
  2046. MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);