mtk-smi.c 10 KB

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  1. /*
  2. * Copyright (c) 2015-2016 MediaTek Inc.
  3. * Author: Yong Wu <[email protected]>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/component.h>
  16. #include <linux/device.h>
  17. #include <linux/err.h>
  18. #include <linux/io.h>
  19. #include <linux/of.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/pm_runtime.h>
  23. #include <soc/mediatek/smi.h>
  24. #include <dt-bindings/memory/mt2701-larb-port.h>
  25. #define SMI_LARB_MMU_EN 0xf00
  26. #define REG_SMI_SECUR_CON_BASE 0x5c0
  27. /* every register control 8 port, register offset 0x4 */
  28. #define REG_SMI_SECUR_CON_OFFSET(id) (((id) >> 3) << 2)
  29. #define REG_SMI_SECUR_CON_ADDR(id) \
  30. (REG_SMI_SECUR_CON_BASE + REG_SMI_SECUR_CON_OFFSET(id))
  31. /*
  32. * every port have 4 bit to control, bit[port + 3] control virtual or physical,
  33. * bit[port + 2 : port + 1] control the domain, bit[port] control the security
  34. * or non-security.
  35. */
  36. #define SMI_SECUR_CON_VAL_MSK(id) (~(0xf << (((id) & 0x7) << 2)))
  37. #define SMI_SECUR_CON_VAL_VIRT(id) BIT((((id) & 0x7) << 2) + 3)
  38. /* mt2701 domain should be set to 3 */
  39. #define SMI_SECUR_CON_VAL_DOMAIN(id) (0x3 << ((((id) & 0x7) << 2) + 1))
  40. struct mtk_smi_larb_gen {
  41. int port_in_larb[MTK_LARB_NR_MAX + 1];
  42. void (*config_port)(struct device *);
  43. };
  44. struct mtk_smi {
  45. struct device *dev;
  46. struct clk *clk_apb, *clk_smi;
  47. struct clk *clk_async; /*only needed by mt2701*/
  48. void __iomem *smi_ao_base;
  49. };
  50. struct mtk_smi_larb { /* larb: local arbiter */
  51. struct mtk_smi smi;
  52. void __iomem *base;
  53. struct device *smi_common_dev;
  54. const struct mtk_smi_larb_gen *larb_gen;
  55. int larbid;
  56. u32 *mmu;
  57. };
  58. enum mtk_smi_gen {
  59. MTK_SMI_GEN1,
  60. MTK_SMI_GEN2
  61. };
  62. static int mtk_smi_enable(const struct mtk_smi *smi)
  63. {
  64. int ret;
  65. ret = pm_runtime_get_sync(smi->dev);
  66. if (ret < 0)
  67. return ret;
  68. ret = clk_prepare_enable(smi->clk_apb);
  69. if (ret)
  70. goto err_put_pm;
  71. ret = clk_prepare_enable(smi->clk_smi);
  72. if (ret)
  73. goto err_disable_apb;
  74. return 0;
  75. err_disable_apb:
  76. clk_disable_unprepare(smi->clk_apb);
  77. err_put_pm:
  78. pm_runtime_put_sync(smi->dev);
  79. return ret;
  80. }
  81. static void mtk_smi_disable(const struct mtk_smi *smi)
  82. {
  83. clk_disable_unprepare(smi->clk_smi);
  84. clk_disable_unprepare(smi->clk_apb);
  85. pm_runtime_put_sync(smi->dev);
  86. }
  87. int mtk_smi_larb_get(struct device *larbdev)
  88. {
  89. struct mtk_smi_larb *larb = dev_get_drvdata(larbdev);
  90. const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
  91. struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
  92. int ret;
  93. /* Enable the smi-common's power and clocks */
  94. ret = mtk_smi_enable(common);
  95. if (ret)
  96. return ret;
  97. /* Enable the larb's power and clocks */
  98. ret = mtk_smi_enable(&larb->smi);
  99. if (ret) {
  100. mtk_smi_disable(common);
  101. return ret;
  102. }
  103. /* Configure the iommu info for this larb */
  104. larb_gen->config_port(larbdev);
  105. return 0;
  106. }
  107. EXPORT_SYMBOL_GPL(mtk_smi_larb_get);
  108. void mtk_smi_larb_put(struct device *larbdev)
  109. {
  110. struct mtk_smi_larb *larb = dev_get_drvdata(larbdev);
  111. struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
  112. /*
  113. * Don't de-configure the iommu info for this larb since there may be
  114. * several modules in this larb.
  115. * The iommu info will be reset after power off.
  116. */
  117. mtk_smi_disable(&larb->smi);
  118. mtk_smi_disable(common);
  119. }
  120. EXPORT_SYMBOL_GPL(mtk_smi_larb_put);
  121. static int
  122. mtk_smi_larb_bind(struct device *dev, struct device *master, void *data)
  123. {
  124. struct mtk_smi_larb *larb = dev_get_drvdata(dev);
  125. struct mtk_smi_iommu *smi_iommu = data;
  126. unsigned int i;
  127. for (i = 0; i < smi_iommu->larb_nr; i++) {
  128. if (dev == smi_iommu->larb_imu[i].dev) {
  129. /* The 'mmu' may be updated in iommu-attach/detach. */
  130. larb->mmu = &smi_iommu->larb_imu[i].mmu;
  131. return 0;
  132. }
  133. }
  134. return -ENODEV;
  135. }
  136. static void mtk_smi_larb_config_port(struct device *dev)
  137. {
  138. struct mtk_smi_larb *larb = dev_get_drvdata(dev);
  139. writel(*larb->mmu, larb->base + SMI_LARB_MMU_EN);
  140. }
  141. static void mtk_smi_larb_config_port_gen1(struct device *dev)
  142. {
  143. struct mtk_smi_larb *larb = dev_get_drvdata(dev);
  144. const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen;
  145. struct mtk_smi *common = dev_get_drvdata(larb->smi_common_dev);
  146. int i, m4u_port_id, larb_port_num;
  147. u32 sec_con_val, reg_val;
  148. m4u_port_id = larb_gen->port_in_larb[larb->larbid];
  149. larb_port_num = larb_gen->port_in_larb[larb->larbid + 1]
  150. - larb_gen->port_in_larb[larb->larbid];
  151. for (i = 0; i < larb_port_num; i++, m4u_port_id++) {
  152. if (*larb->mmu & BIT(i)) {
  153. /* bit[port + 3] controls the virtual or physical */
  154. sec_con_val = SMI_SECUR_CON_VAL_VIRT(m4u_port_id);
  155. } else {
  156. /* do not need to enable m4u for this port */
  157. continue;
  158. }
  159. reg_val = readl(common->smi_ao_base
  160. + REG_SMI_SECUR_CON_ADDR(m4u_port_id));
  161. reg_val &= SMI_SECUR_CON_VAL_MSK(m4u_port_id);
  162. reg_val |= sec_con_val;
  163. reg_val |= SMI_SECUR_CON_VAL_DOMAIN(m4u_port_id);
  164. writel(reg_val,
  165. common->smi_ao_base
  166. + REG_SMI_SECUR_CON_ADDR(m4u_port_id));
  167. }
  168. }
  169. static void
  170. mtk_smi_larb_unbind(struct device *dev, struct device *master, void *data)
  171. {
  172. /* Do nothing as the iommu is always enabled. */
  173. }
  174. static const struct component_ops mtk_smi_larb_component_ops = {
  175. .bind = mtk_smi_larb_bind,
  176. .unbind = mtk_smi_larb_unbind,
  177. };
  178. static const struct mtk_smi_larb_gen mtk_smi_larb_mt8173 = {
  179. /* mt8173 do not need the port in larb */
  180. .config_port = mtk_smi_larb_config_port,
  181. };
  182. static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701 = {
  183. .port_in_larb = {
  184. LARB0_PORT_OFFSET, LARB1_PORT_OFFSET,
  185. LARB2_PORT_OFFSET, LARB3_PORT_OFFSET
  186. },
  187. .config_port = mtk_smi_larb_config_port_gen1,
  188. };
  189. static const struct of_device_id mtk_smi_larb_of_ids[] = {
  190. {
  191. .compatible = "mediatek,mt8173-smi-larb",
  192. .data = &mtk_smi_larb_mt8173
  193. },
  194. {
  195. .compatible = "mediatek,mt2701-smi-larb",
  196. .data = &mtk_smi_larb_mt2701
  197. },
  198. {}
  199. };
  200. static int mtk_smi_larb_probe(struct platform_device *pdev)
  201. {
  202. struct mtk_smi_larb *larb;
  203. struct resource *res;
  204. struct device *dev = &pdev->dev;
  205. struct device_node *smi_node;
  206. struct platform_device *smi_pdev;
  207. const struct of_device_id *of_id;
  208. if (!dev->pm_domain)
  209. return -EPROBE_DEFER;
  210. of_id = of_match_node(mtk_smi_larb_of_ids, pdev->dev.of_node);
  211. if (!of_id)
  212. return -EINVAL;
  213. larb = devm_kzalloc(dev, sizeof(*larb), GFP_KERNEL);
  214. if (!larb)
  215. return -ENOMEM;
  216. larb->larb_gen = of_id->data;
  217. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  218. larb->base = devm_ioremap_resource(dev, res);
  219. if (IS_ERR(larb->base))
  220. return PTR_ERR(larb->base);
  221. larb->smi.clk_apb = devm_clk_get(dev, "apb");
  222. if (IS_ERR(larb->smi.clk_apb))
  223. return PTR_ERR(larb->smi.clk_apb);
  224. larb->smi.clk_smi = devm_clk_get(dev, "smi");
  225. if (IS_ERR(larb->smi.clk_smi))
  226. return PTR_ERR(larb->smi.clk_smi);
  227. larb->smi.dev = dev;
  228. smi_node = of_parse_phandle(dev->of_node, "mediatek,smi", 0);
  229. if (!smi_node)
  230. return -EINVAL;
  231. smi_pdev = of_find_device_by_node(smi_node);
  232. of_node_put(smi_node);
  233. if (smi_pdev) {
  234. larb->smi_common_dev = &smi_pdev->dev;
  235. } else {
  236. dev_err(dev, "Failed to get the smi_common device\n");
  237. return -EINVAL;
  238. }
  239. pm_runtime_enable(dev);
  240. platform_set_drvdata(pdev, larb);
  241. return component_add(dev, &mtk_smi_larb_component_ops);
  242. }
  243. static int mtk_smi_larb_remove(struct platform_device *pdev)
  244. {
  245. pm_runtime_disable(&pdev->dev);
  246. component_del(&pdev->dev, &mtk_smi_larb_component_ops);
  247. return 0;
  248. }
  249. static struct platform_driver mtk_smi_larb_driver = {
  250. .probe = mtk_smi_larb_probe,
  251. .remove = mtk_smi_larb_remove,
  252. .driver = {
  253. .name = "mtk-smi-larb",
  254. .of_match_table = mtk_smi_larb_of_ids,
  255. }
  256. };
  257. static const struct of_device_id mtk_smi_common_of_ids[] = {
  258. {
  259. .compatible = "mediatek,mt8173-smi-common",
  260. .data = (void *)MTK_SMI_GEN2
  261. },
  262. {
  263. .compatible = "mediatek,mt2701-smi-common",
  264. .data = (void *)MTK_SMI_GEN1
  265. },
  266. {}
  267. };
  268. static int mtk_smi_common_probe(struct platform_device *pdev)
  269. {
  270. struct device *dev = &pdev->dev;
  271. struct mtk_smi *common;
  272. struct resource *res;
  273. const struct of_device_id *of_id;
  274. enum mtk_smi_gen smi_gen;
  275. if (!dev->pm_domain)
  276. return -EPROBE_DEFER;
  277. common = devm_kzalloc(dev, sizeof(*common), GFP_KERNEL);
  278. if (!common)
  279. return -ENOMEM;
  280. common->dev = dev;
  281. common->clk_apb = devm_clk_get(dev, "apb");
  282. if (IS_ERR(common->clk_apb))
  283. return PTR_ERR(common->clk_apb);
  284. common->clk_smi = devm_clk_get(dev, "smi");
  285. if (IS_ERR(common->clk_smi))
  286. return PTR_ERR(common->clk_smi);
  287. of_id = of_match_node(mtk_smi_common_of_ids, pdev->dev.of_node);
  288. if (!of_id)
  289. return -EINVAL;
  290. /*
  291. * for mtk smi gen 1, we need to get the ao(always on) base to config
  292. * m4u port, and we need to enable the aync clock for transform the smi
  293. * clock into emi clock domain, but for mtk smi gen2, there's no smi ao
  294. * base.
  295. */
  296. smi_gen = (enum mtk_smi_gen)of_id->data;
  297. if (smi_gen == MTK_SMI_GEN1) {
  298. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  299. common->smi_ao_base = devm_ioremap_resource(dev, res);
  300. if (IS_ERR(common->smi_ao_base))
  301. return PTR_ERR(common->smi_ao_base);
  302. common->clk_async = devm_clk_get(dev, "async");
  303. if (IS_ERR(common->clk_async))
  304. return PTR_ERR(common->clk_async);
  305. clk_prepare_enable(common->clk_async);
  306. }
  307. pm_runtime_enable(dev);
  308. platform_set_drvdata(pdev, common);
  309. return 0;
  310. }
  311. static int mtk_smi_common_remove(struct platform_device *pdev)
  312. {
  313. pm_runtime_disable(&pdev->dev);
  314. return 0;
  315. }
  316. static struct platform_driver mtk_smi_common_driver = {
  317. .probe = mtk_smi_common_probe,
  318. .remove = mtk_smi_common_remove,
  319. .driver = {
  320. .name = "mtk-smi-common",
  321. .of_match_table = mtk_smi_common_of_ids,
  322. }
  323. };
  324. static int __init mtk_smi_init(void)
  325. {
  326. int ret;
  327. ret = platform_driver_register(&mtk_smi_common_driver);
  328. if (ret != 0) {
  329. pr_err("Failed to register SMI driver\n");
  330. return ret;
  331. }
  332. ret = platform_driver_register(&mtk_smi_larb_driver);
  333. if (ret != 0) {
  334. pr_err("Failed to register SMI-LARB driver\n");
  335. goto err_unreg_smi;
  336. }
  337. return ret;
  338. err_unreg_smi:
  339. platform_driver_unregister(&mtk_smi_common_driver);
  340. return ret;
  341. }
  342. subsys_initcall(mtk_smi_init);