palmas-regulator.c 44 KB

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  1. /*
  2. * Driver for Regulator part of Palmas PMIC Chips
  3. *
  4. * Copyright 2011-2013 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <[email protected]>
  7. * Author: Ian Lartey <[email protected]>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/slab.h>
  23. #include <linux/regmap.h>
  24. #include <linux/mfd/palmas.h>
  25. #include <linux/of.h>
  26. #include <linux/of_platform.h>
  27. #include <linux/regulator/of_regulator.h>
  28. static const struct regulator_linear_range smps_low_ranges[] = {
  29. REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
  30. REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
  31. REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
  32. REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0),
  33. };
  34. static const struct regulator_linear_range smps_high_ranges[] = {
  35. REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
  36. REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0),
  37. REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000),
  38. REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
  39. };
  40. static struct palmas_regs_info palmas_generic_regs_info[] = {
  41. {
  42. .name = "SMPS12",
  43. .sname = "smps1-in",
  44. .vsel_addr = PALMAS_SMPS12_VOLTAGE,
  45. .ctrl_addr = PALMAS_SMPS12_CTRL,
  46. .tstep_addr = PALMAS_SMPS12_TSTEP,
  47. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
  48. },
  49. {
  50. .name = "SMPS123",
  51. .sname = "smps1-in",
  52. .vsel_addr = PALMAS_SMPS12_VOLTAGE,
  53. .ctrl_addr = PALMAS_SMPS12_CTRL,
  54. .tstep_addr = PALMAS_SMPS12_TSTEP,
  55. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
  56. },
  57. {
  58. .name = "SMPS3",
  59. .sname = "smps3-in",
  60. .vsel_addr = PALMAS_SMPS3_VOLTAGE,
  61. .ctrl_addr = PALMAS_SMPS3_CTRL,
  62. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3,
  63. },
  64. {
  65. .name = "SMPS45",
  66. .sname = "smps4-in",
  67. .vsel_addr = PALMAS_SMPS45_VOLTAGE,
  68. .ctrl_addr = PALMAS_SMPS45_CTRL,
  69. .tstep_addr = PALMAS_SMPS45_TSTEP,
  70. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
  71. },
  72. {
  73. .name = "SMPS457",
  74. .sname = "smps4-in",
  75. .vsel_addr = PALMAS_SMPS45_VOLTAGE,
  76. .ctrl_addr = PALMAS_SMPS45_CTRL,
  77. .tstep_addr = PALMAS_SMPS45_TSTEP,
  78. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
  79. },
  80. {
  81. .name = "SMPS6",
  82. .sname = "smps6-in",
  83. .vsel_addr = PALMAS_SMPS6_VOLTAGE,
  84. .ctrl_addr = PALMAS_SMPS6_CTRL,
  85. .tstep_addr = PALMAS_SMPS6_TSTEP,
  86. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6,
  87. },
  88. {
  89. .name = "SMPS7",
  90. .sname = "smps7-in",
  91. .vsel_addr = PALMAS_SMPS7_VOLTAGE,
  92. .ctrl_addr = PALMAS_SMPS7_CTRL,
  93. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7,
  94. },
  95. {
  96. .name = "SMPS8",
  97. .sname = "smps8-in",
  98. .vsel_addr = PALMAS_SMPS8_VOLTAGE,
  99. .ctrl_addr = PALMAS_SMPS8_CTRL,
  100. .tstep_addr = PALMAS_SMPS8_TSTEP,
  101. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8,
  102. },
  103. {
  104. .name = "SMPS9",
  105. .sname = "smps9-in",
  106. .vsel_addr = PALMAS_SMPS9_VOLTAGE,
  107. .ctrl_addr = PALMAS_SMPS9_CTRL,
  108. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9,
  109. },
  110. {
  111. .name = "SMPS10_OUT2",
  112. .sname = "smps10-in",
  113. .ctrl_addr = PALMAS_SMPS10_CTRL,
  114. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
  115. },
  116. {
  117. .name = "SMPS10_OUT1",
  118. .sname = "smps10-out2",
  119. .ctrl_addr = PALMAS_SMPS10_CTRL,
  120. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
  121. },
  122. {
  123. .name = "LDO1",
  124. .sname = "ldo1-in",
  125. .vsel_addr = PALMAS_LDO1_VOLTAGE,
  126. .ctrl_addr = PALMAS_LDO1_CTRL,
  127. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1,
  128. },
  129. {
  130. .name = "LDO2",
  131. .sname = "ldo2-in",
  132. .vsel_addr = PALMAS_LDO2_VOLTAGE,
  133. .ctrl_addr = PALMAS_LDO2_CTRL,
  134. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2,
  135. },
  136. {
  137. .name = "LDO3",
  138. .sname = "ldo3-in",
  139. .vsel_addr = PALMAS_LDO3_VOLTAGE,
  140. .ctrl_addr = PALMAS_LDO3_CTRL,
  141. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3,
  142. },
  143. {
  144. .name = "LDO4",
  145. .sname = "ldo4-in",
  146. .vsel_addr = PALMAS_LDO4_VOLTAGE,
  147. .ctrl_addr = PALMAS_LDO4_CTRL,
  148. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4,
  149. },
  150. {
  151. .name = "LDO5",
  152. .sname = "ldo5-in",
  153. .vsel_addr = PALMAS_LDO5_VOLTAGE,
  154. .ctrl_addr = PALMAS_LDO5_CTRL,
  155. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5,
  156. },
  157. {
  158. .name = "LDO6",
  159. .sname = "ldo6-in",
  160. .vsel_addr = PALMAS_LDO6_VOLTAGE,
  161. .ctrl_addr = PALMAS_LDO6_CTRL,
  162. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6,
  163. },
  164. {
  165. .name = "LDO7",
  166. .sname = "ldo7-in",
  167. .vsel_addr = PALMAS_LDO7_VOLTAGE,
  168. .ctrl_addr = PALMAS_LDO7_CTRL,
  169. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7,
  170. },
  171. {
  172. .name = "LDO8",
  173. .sname = "ldo8-in",
  174. .vsel_addr = PALMAS_LDO8_VOLTAGE,
  175. .ctrl_addr = PALMAS_LDO8_CTRL,
  176. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8,
  177. },
  178. {
  179. .name = "LDO9",
  180. .sname = "ldo9-in",
  181. .vsel_addr = PALMAS_LDO9_VOLTAGE,
  182. .ctrl_addr = PALMAS_LDO9_CTRL,
  183. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9,
  184. },
  185. {
  186. .name = "LDOLN",
  187. .sname = "ldoln-in",
  188. .vsel_addr = PALMAS_LDOLN_VOLTAGE,
  189. .ctrl_addr = PALMAS_LDOLN_CTRL,
  190. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
  191. },
  192. {
  193. .name = "LDOUSB",
  194. .sname = "ldousb-in",
  195. .vsel_addr = PALMAS_LDOUSB_VOLTAGE,
  196. .ctrl_addr = PALMAS_LDOUSB_CTRL,
  197. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
  198. },
  199. {
  200. .name = "REGEN1",
  201. .ctrl_addr = PALMAS_REGEN1_CTRL,
  202. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1,
  203. },
  204. {
  205. .name = "REGEN2",
  206. .ctrl_addr = PALMAS_REGEN2_CTRL,
  207. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2,
  208. },
  209. {
  210. .name = "REGEN3",
  211. .ctrl_addr = PALMAS_REGEN3_CTRL,
  212. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3,
  213. },
  214. {
  215. .name = "SYSEN1",
  216. .ctrl_addr = PALMAS_SYSEN1_CTRL,
  217. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1,
  218. },
  219. {
  220. .name = "SYSEN2",
  221. .ctrl_addr = PALMAS_SYSEN2_CTRL,
  222. .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2,
  223. },
  224. };
  225. static struct palmas_regs_info tps65917_regs_info[] = {
  226. {
  227. .name = "SMPS1",
  228. .sname = "smps1-in",
  229. .vsel_addr = TPS65917_SMPS1_VOLTAGE,
  230. .ctrl_addr = TPS65917_SMPS1_CTRL,
  231. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
  232. },
  233. {
  234. .name = "SMPS2",
  235. .sname = "smps2-in",
  236. .vsel_addr = TPS65917_SMPS2_VOLTAGE,
  237. .ctrl_addr = TPS65917_SMPS2_CTRL,
  238. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
  239. },
  240. {
  241. .name = "SMPS3",
  242. .sname = "smps3-in",
  243. .vsel_addr = TPS65917_SMPS3_VOLTAGE,
  244. .ctrl_addr = TPS65917_SMPS3_CTRL,
  245. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
  246. },
  247. {
  248. .name = "SMPS4",
  249. .sname = "smps4-in",
  250. .vsel_addr = TPS65917_SMPS4_VOLTAGE,
  251. .ctrl_addr = TPS65917_SMPS4_CTRL,
  252. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
  253. },
  254. {
  255. .name = "SMPS5",
  256. .sname = "smps5-in",
  257. .vsel_addr = TPS65917_SMPS5_VOLTAGE,
  258. .ctrl_addr = TPS65917_SMPS5_CTRL,
  259. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
  260. },
  261. {
  262. .name = "LDO1",
  263. .sname = "ldo1-in",
  264. .vsel_addr = TPS65917_LDO1_VOLTAGE,
  265. .ctrl_addr = TPS65917_LDO1_CTRL,
  266. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1,
  267. },
  268. {
  269. .name = "LDO2",
  270. .sname = "ldo2-in",
  271. .vsel_addr = TPS65917_LDO2_VOLTAGE,
  272. .ctrl_addr = TPS65917_LDO2_CTRL,
  273. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2,
  274. },
  275. {
  276. .name = "LDO3",
  277. .sname = "ldo3-in",
  278. .vsel_addr = TPS65917_LDO3_VOLTAGE,
  279. .ctrl_addr = TPS65917_LDO3_CTRL,
  280. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3,
  281. },
  282. {
  283. .name = "LDO4",
  284. .sname = "ldo4-in",
  285. .vsel_addr = TPS65917_LDO4_VOLTAGE,
  286. .ctrl_addr = TPS65917_LDO4_CTRL,
  287. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4,
  288. },
  289. {
  290. .name = "LDO5",
  291. .sname = "ldo5-in",
  292. .vsel_addr = TPS65917_LDO5_VOLTAGE,
  293. .ctrl_addr = TPS65917_LDO5_CTRL,
  294. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5,
  295. },
  296. {
  297. .name = "REGEN1",
  298. .ctrl_addr = TPS65917_REGEN1_CTRL,
  299. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
  300. },
  301. {
  302. .name = "REGEN2",
  303. .ctrl_addr = TPS65917_REGEN2_CTRL,
  304. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
  305. },
  306. {
  307. .name = "REGEN3",
  308. .ctrl_addr = TPS65917_REGEN3_CTRL,
  309. .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
  310. },
  311. };
  312. #define EXTERNAL_REQUESTOR(_id, _offset, _pos) \
  313. [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \
  314. .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \
  315. .reg_offset = _offset, \
  316. .bit_pos = _pos, \
  317. }
  318. static struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
  319. EXTERNAL_REQUESTOR(REGEN1, 0, 0),
  320. EXTERNAL_REQUESTOR(REGEN2, 0, 1),
  321. EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
  322. EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
  323. EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
  324. EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
  325. EXTERNAL_REQUESTOR(REGEN3, 0, 6),
  326. EXTERNAL_REQUESTOR(SMPS12, 1, 0),
  327. EXTERNAL_REQUESTOR(SMPS3, 1, 1),
  328. EXTERNAL_REQUESTOR(SMPS45, 1, 2),
  329. EXTERNAL_REQUESTOR(SMPS6, 1, 3),
  330. EXTERNAL_REQUESTOR(SMPS7, 1, 4),
  331. EXTERNAL_REQUESTOR(SMPS8, 1, 5),
  332. EXTERNAL_REQUESTOR(SMPS9, 1, 6),
  333. EXTERNAL_REQUESTOR(SMPS10, 1, 7),
  334. EXTERNAL_REQUESTOR(LDO1, 2, 0),
  335. EXTERNAL_REQUESTOR(LDO2, 2, 1),
  336. EXTERNAL_REQUESTOR(LDO3, 2, 2),
  337. EXTERNAL_REQUESTOR(LDO4, 2, 3),
  338. EXTERNAL_REQUESTOR(LDO5, 2, 4),
  339. EXTERNAL_REQUESTOR(LDO6, 2, 5),
  340. EXTERNAL_REQUESTOR(LDO7, 2, 6),
  341. EXTERNAL_REQUESTOR(LDO8, 2, 7),
  342. EXTERNAL_REQUESTOR(LDO9, 3, 0),
  343. EXTERNAL_REQUESTOR(LDOLN, 3, 1),
  344. EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
  345. };
  346. #define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \
  347. [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \
  348. .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \
  349. .reg_offset = _offset, \
  350. .bit_pos = _pos, \
  351. }
  352. static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = {
  353. EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0),
  354. EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1),
  355. EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6),
  356. EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0),
  357. EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1),
  358. EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2),
  359. EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3),
  360. EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4),
  361. EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0),
  362. EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1),
  363. EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2),
  364. EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3),
  365. EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4),
  366. };
  367. static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
  368. #define SMPS_CTRL_MODE_OFF 0x00
  369. #define SMPS_CTRL_MODE_ON 0x01
  370. #define SMPS_CTRL_MODE_ECO 0x02
  371. #define SMPS_CTRL_MODE_PWM 0x03
  372. #define PALMAS_SMPS_NUM_VOLTAGES 122
  373. #define PALMAS_SMPS10_NUM_VOLTAGES 2
  374. #define PALMAS_LDO_NUM_VOLTAGES 50
  375. #define SMPS10_VSEL (1<<3)
  376. #define SMPS10_BOOST_EN (1<<2)
  377. #define SMPS10_BYPASS_EN (1<<1)
  378. #define SMPS10_SWITCH_EN (1<<0)
  379. #define REGULATOR_SLAVE 0
  380. static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
  381. unsigned int *dest)
  382. {
  383. unsigned int addr;
  384. addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
  385. return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
  386. }
  387. static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
  388. unsigned int value)
  389. {
  390. unsigned int addr;
  391. addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
  392. return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
  393. }
  394. static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
  395. unsigned int *dest)
  396. {
  397. unsigned int addr;
  398. addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
  399. return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
  400. }
  401. static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
  402. unsigned int value)
  403. {
  404. unsigned int addr;
  405. addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
  406. return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
  407. }
  408. static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
  409. {
  410. int id = rdev_get_id(dev);
  411. struct palmas_pmic *pmic = rdev_get_drvdata(dev);
  412. struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
  413. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  414. unsigned int reg;
  415. bool rail_enable = true;
  416. palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, &reg);
  417. reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  418. if (reg == SMPS_CTRL_MODE_OFF)
  419. rail_enable = false;
  420. switch (mode) {
  421. case REGULATOR_MODE_NORMAL:
  422. reg |= SMPS_CTRL_MODE_ON;
  423. break;
  424. case REGULATOR_MODE_IDLE:
  425. reg |= SMPS_CTRL_MODE_ECO;
  426. break;
  427. case REGULATOR_MODE_FAST:
  428. reg |= SMPS_CTRL_MODE_PWM;
  429. break;
  430. default:
  431. return -EINVAL;
  432. }
  433. pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  434. if (rail_enable)
  435. palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg);
  436. /* Switch the enable value to ensure this is used for enable */
  437. pmic->desc[id].enable_val = pmic->current_reg_mode[id];
  438. return 0;
  439. }
  440. static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
  441. {
  442. struct palmas_pmic *pmic = rdev_get_drvdata(dev);
  443. int id = rdev_get_id(dev);
  444. unsigned int reg;
  445. reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  446. switch (reg) {
  447. case SMPS_CTRL_MODE_ON:
  448. return REGULATOR_MODE_NORMAL;
  449. case SMPS_CTRL_MODE_ECO:
  450. return REGULATOR_MODE_IDLE;
  451. case SMPS_CTRL_MODE_PWM:
  452. return REGULATOR_MODE_FAST;
  453. }
  454. return 0;
  455. }
  456. static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
  457. int ramp_delay)
  458. {
  459. int id = rdev_get_id(rdev);
  460. struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
  461. struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
  462. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  463. unsigned int reg = 0;
  464. int ret;
  465. /* SMPS3 and SMPS7 do not have tstep_addr setting */
  466. switch (id) {
  467. case PALMAS_REG_SMPS3:
  468. case PALMAS_REG_SMPS7:
  469. return 0;
  470. }
  471. if (ramp_delay <= 0)
  472. reg = 0;
  473. else if (ramp_delay <= 2500)
  474. reg = 3;
  475. else if (ramp_delay <= 5000)
  476. reg = 2;
  477. else
  478. reg = 1;
  479. ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg);
  480. if (ret < 0) {
  481. dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
  482. return ret;
  483. }
  484. pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
  485. return ret;
  486. }
  487. static struct regulator_ops palmas_ops_smps = {
  488. .is_enabled = regulator_is_enabled_regmap,
  489. .enable = regulator_enable_regmap,
  490. .disable = regulator_disable_regmap,
  491. .set_mode = palmas_set_mode_smps,
  492. .get_mode = palmas_get_mode_smps,
  493. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  494. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  495. .list_voltage = regulator_list_voltage_linear_range,
  496. .map_voltage = regulator_map_voltage_linear_range,
  497. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  498. .set_ramp_delay = palmas_smps_set_ramp_delay,
  499. };
  500. static struct regulator_ops palmas_ops_ext_control_smps = {
  501. .set_mode = palmas_set_mode_smps,
  502. .get_mode = palmas_get_mode_smps,
  503. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  504. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  505. .list_voltage = regulator_list_voltage_linear_range,
  506. .map_voltage = regulator_map_voltage_linear_range,
  507. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  508. .set_ramp_delay = palmas_smps_set_ramp_delay,
  509. };
  510. static struct regulator_ops palmas_ops_smps10 = {
  511. .is_enabled = regulator_is_enabled_regmap,
  512. .enable = regulator_enable_regmap,
  513. .disable = regulator_disable_regmap,
  514. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  515. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  516. .list_voltage = regulator_list_voltage_linear,
  517. .map_voltage = regulator_map_voltage_linear,
  518. .set_bypass = regulator_set_bypass_regmap,
  519. .get_bypass = regulator_get_bypass_regmap,
  520. };
  521. static struct regulator_ops tps65917_ops_smps = {
  522. .is_enabled = regulator_is_enabled_regmap,
  523. .enable = regulator_enable_regmap,
  524. .disable = regulator_disable_regmap,
  525. .set_mode = palmas_set_mode_smps,
  526. .get_mode = palmas_get_mode_smps,
  527. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  528. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  529. .list_voltage = regulator_list_voltage_linear_range,
  530. .map_voltage = regulator_map_voltage_linear_range,
  531. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  532. };
  533. static struct regulator_ops tps65917_ops_ext_control_smps = {
  534. .set_mode = palmas_set_mode_smps,
  535. .get_mode = palmas_get_mode_smps,
  536. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  537. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  538. .list_voltage = regulator_list_voltage_linear_range,
  539. .map_voltage = regulator_map_voltage_linear_range,
  540. };
  541. static int palmas_is_enabled_ldo(struct regulator_dev *dev)
  542. {
  543. int id = rdev_get_id(dev);
  544. struct palmas_pmic *pmic = rdev_get_drvdata(dev);
  545. struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
  546. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  547. unsigned int reg;
  548. palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, &reg);
  549. reg &= PALMAS_LDO1_CTRL_STATUS;
  550. return !!(reg);
  551. }
  552. static struct regulator_ops palmas_ops_ldo = {
  553. .is_enabled = palmas_is_enabled_ldo,
  554. .enable = regulator_enable_regmap,
  555. .disable = regulator_disable_regmap,
  556. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  557. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  558. .list_voltage = regulator_list_voltage_linear,
  559. .map_voltage = regulator_map_voltage_linear,
  560. };
  561. static struct regulator_ops palmas_ops_ldo9 = {
  562. .is_enabled = palmas_is_enabled_ldo,
  563. .enable = regulator_enable_regmap,
  564. .disable = regulator_disable_regmap,
  565. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  566. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  567. .list_voltage = regulator_list_voltage_linear,
  568. .map_voltage = regulator_map_voltage_linear,
  569. .set_bypass = regulator_set_bypass_regmap,
  570. .get_bypass = regulator_get_bypass_regmap,
  571. };
  572. static struct regulator_ops palmas_ops_ext_control_ldo = {
  573. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  574. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  575. .list_voltage = regulator_list_voltage_linear,
  576. .map_voltage = regulator_map_voltage_linear,
  577. };
  578. static struct regulator_ops palmas_ops_extreg = {
  579. .is_enabled = regulator_is_enabled_regmap,
  580. .enable = regulator_enable_regmap,
  581. .disable = regulator_disable_regmap,
  582. };
  583. static struct regulator_ops palmas_ops_ext_control_extreg = {
  584. };
  585. static struct regulator_ops tps65917_ops_ldo = {
  586. .is_enabled = palmas_is_enabled_ldo,
  587. .enable = regulator_enable_regmap,
  588. .disable = regulator_disable_regmap,
  589. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  590. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  591. .list_voltage = regulator_list_voltage_linear,
  592. .map_voltage = regulator_map_voltage_linear,
  593. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  594. };
  595. static struct regulator_ops tps65917_ops_ldo_1_2 = {
  596. .is_enabled = palmas_is_enabled_ldo,
  597. .enable = regulator_enable_regmap,
  598. .disable = regulator_disable_regmap,
  599. .get_voltage_sel = regulator_get_voltage_sel_regmap,
  600. .set_voltage_sel = regulator_set_voltage_sel_regmap,
  601. .list_voltage = regulator_list_voltage_linear,
  602. .map_voltage = regulator_map_voltage_linear,
  603. .set_voltage_time_sel = regulator_set_voltage_time_sel,
  604. .set_bypass = regulator_set_bypass_regmap,
  605. .get_bypass = regulator_get_bypass_regmap,
  606. };
  607. static int palmas_regulator_config_external(struct palmas *palmas, int id,
  608. struct palmas_reg_init *reg_init)
  609. {
  610. struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
  611. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  612. int ret;
  613. ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id,
  614. reg_init->roof_floor, true);
  615. if (ret < 0)
  616. dev_err(palmas->dev,
  617. "Ext control config for regulator %d failed %d\n",
  618. id, ret);
  619. return ret;
  620. }
  621. /*
  622. * setup the hardware based sleep configuration of the SMPS/LDO regulators
  623. * from the platform data. This is different to the software based control
  624. * supported by the regulator framework as it is controlled by toggling
  625. * pins on the PMIC such as PREQ, SYSEN, ...
  626. */
  627. static int palmas_smps_init(struct palmas *palmas, int id,
  628. struct palmas_reg_init *reg_init)
  629. {
  630. unsigned int reg;
  631. int ret;
  632. struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
  633. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  634. unsigned int addr = rinfo->ctrl_addr;
  635. ret = palmas_smps_read(palmas, addr, &reg);
  636. if (ret)
  637. return ret;
  638. switch (id) {
  639. case PALMAS_REG_SMPS10_OUT1:
  640. case PALMAS_REG_SMPS10_OUT2:
  641. reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
  642. if (reg_init->mode_sleep)
  643. reg |= reg_init->mode_sleep <<
  644. PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
  645. break;
  646. default:
  647. if (reg_init->warm_reset)
  648. reg |= PALMAS_SMPS12_CTRL_WR_S;
  649. else
  650. reg &= ~PALMAS_SMPS12_CTRL_WR_S;
  651. if (reg_init->roof_floor)
  652. reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
  653. else
  654. reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
  655. reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
  656. if (reg_init->mode_sleep)
  657. reg |= reg_init->mode_sleep <<
  658. PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
  659. }
  660. ret = palmas_smps_write(palmas, addr, reg);
  661. if (ret)
  662. return ret;
  663. if (rinfo->vsel_addr && reg_init->vsel) {
  664. reg = reg_init->vsel;
  665. ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg);
  666. if (ret)
  667. return ret;
  668. }
  669. if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
  670. (id != PALMAS_REG_SMPS10_OUT2)) {
  671. /* Enable externally controlled regulator */
  672. ret = palmas_smps_read(palmas, addr, &reg);
  673. if (ret < 0)
  674. return ret;
  675. if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) {
  676. reg |= SMPS_CTRL_MODE_ON;
  677. ret = palmas_smps_write(palmas, addr, reg);
  678. if (ret < 0)
  679. return ret;
  680. }
  681. return palmas_regulator_config_external(palmas, id, reg_init);
  682. }
  683. return 0;
  684. }
  685. static int palmas_ldo_init(struct palmas *palmas, int id,
  686. struct palmas_reg_init *reg_init)
  687. {
  688. unsigned int reg;
  689. unsigned int addr;
  690. int ret;
  691. struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
  692. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  693. addr = rinfo->ctrl_addr;
  694. ret = palmas_ldo_read(palmas, addr, &reg);
  695. if (ret)
  696. return ret;
  697. if (reg_init->warm_reset)
  698. reg |= PALMAS_LDO1_CTRL_WR_S;
  699. else
  700. reg &= ~PALMAS_LDO1_CTRL_WR_S;
  701. if (reg_init->mode_sleep)
  702. reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
  703. else
  704. reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
  705. ret = palmas_ldo_write(palmas, addr, reg);
  706. if (ret)
  707. return ret;
  708. if (reg_init->roof_floor) {
  709. /* Enable externally controlled regulator */
  710. ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
  711. addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
  712. PALMAS_LDO1_CTRL_MODE_ACTIVE);
  713. if (ret < 0) {
  714. dev_err(palmas->dev,
  715. "LDO Register 0x%02x update failed %d\n",
  716. addr, ret);
  717. return ret;
  718. }
  719. return palmas_regulator_config_external(palmas, id, reg_init);
  720. }
  721. return 0;
  722. }
  723. static int palmas_extreg_init(struct palmas *palmas, int id,
  724. struct palmas_reg_init *reg_init)
  725. {
  726. unsigned int addr;
  727. int ret;
  728. unsigned int val = 0;
  729. struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
  730. struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
  731. addr = rinfo->ctrl_addr;
  732. if (reg_init->mode_sleep)
  733. val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
  734. ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
  735. addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
  736. if (ret < 0) {
  737. dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
  738. addr, ret);
  739. return ret;
  740. }
  741. if (reg_init->roof_floor) {
  742. /* Enable externally controlled regulator */
  743. ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
  744. addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
  745. PALMAS_REGEN1_CTRL_MODE_ACTIVE);
  746. if (ret < 0) {
  747. dev_err(palmas->dev,
  748. "Resource Register 0x%02x update failed %d\n",
  749. addr, ret);
  750. return ret;
  751. }
  752. return palmas_regulator_config_external(palmas, id, reg_init);
  753. }
  754. return 0;
  755. }
  756. static void palmas_enable_ldo8_track(struct palmas *palmas)
  757. {
  758. unsigned int reg;
  759. unsigned int addr;
  760. int ret;
  761. struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
  762. struct palmas_regs_info *rinfo;
  763. rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8];
  764. addr = rinfo->ctrl_addr;
  765. ret = palmas_ldo_read(palmas, addr, &reg);
  766. if (ret) {
  767. dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
  768. return;
  769. }
  770. reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
  771. ret = palmas_ldo_write(palmas, addr, reg);
  772. if (ret < 0) {
  773. dev_err(palmas->dev, "Error in enabling tracking mode\n");
  774. return;
  775. }
  776. /*
  777. * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
  778. * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
  779. * and can be set from 0.45 to 1.65 V.
  780. */
  781. addr = rinfo->vsel_addr;
  782. ret = palmas_ldo_read(palmas, addr, &reg);
  783. if (ret) {
  784. dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
  785. return;
  786. }
  787. reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
  788. ret = palmas_ldo_write(palmas, addr, reg);
  789. if (ret < 0)
  790. dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
  791. return;
  792. }
  793. static int palmas_ldo_registration(struct palmas_pmic *pmic,
  794. struct palmas_pmic_driver_data *ddata,
  795. struct palmas_pmic_platform_data *pdata,
  796. const char *pdev_name,
  797. struct regulator_config config)
  798. {
  799. int id, ret;
  800. struct regulator_dev *rdev;
  801. struct palmas_reg_init *reg_init;
  802. struct palmas_regs_info *rinfo;
  803. struct regulator_desc *desc;
  804. for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
  805. if (pdata && pdata->reg_init[id])
  806. reg_init = pdata->reg_init[id];
  807. else
  808. reg_init = NULL;
  809. rinfo = &ddata->palmas_regs_info[id];
  810. /* Miss out regulators which are not available due
  811. * to alternate functions.
  812. */
  813. /* Register the regulators */
  814. desc = &pmic->desc[id];
  815. desc->name = rinfo->name;
  816. desc->id = id;
  817. desc->type = REGULATOR_VOLTAGE;
  818. desc->owner = THIS_MODULE;
  819. if (id < PALMAS_REG_REGEN1) {
  820. desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
  821. if (reg_init && reg_init->roof_floor)
  822. desc->ops = &palmas_ops_ext_control_ldo;
  823. else
  824. desc->ops = &palmas_ops_ldo;
  825. desc->min_uV = 900000;
  826. desc->uV_step = 50000;
  827. desc->linear_min_sel = 1;
  828. desc->enable_time = 500;
  829. desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
  830. rinfo->vsel_addr);
  831. desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
  832. desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
  833. rinfo->ctrl_addr);
  834. desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
  835. /* Check if LDO8 is in tracking mode or not */
  836. if (pdata && (id == PALMAS_REG_LDO8) &&
  837. pdata->enable_ldo8_tracking) {
  838. palmas_enable_ldo8_track(pmic->palmas);
  839. desc->min_uV = 450000;
  840. desc->uV_step = 25000;
  841. }
  842. /* LOD6 in vibrator mode will have enable time 2000us */
  843. if (pdata && pdata->ldo6_vibrator &&
  844. (id == PALMAS_REG_LDO6))
  845. desc->enable_time = 2000;
  846. if (id == PALMAS_REG_LDO9) {
  847. desc->ops = &palmas_ops_ldo9;
  848. desc->bypass_reg = desc->enable_reg;
  849. desc->bypass_val_on =
  850. PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
  851. desc->bypass_mask =
  852. PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
  853. }
  854. } else {
  855. if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3)
  856. continue;
  857. desc->n_voltages = 1;
  858. if (reg_init && reg_init->roof_floor)
  859. desc->ops = &palmas_ops_ext_control_extreg;
  860. else
  861. desc->ops = &palmas_ops_extreg;
  862. desc->enable_reg =
  863. PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
  864. rinfo->ctrl_addr);
  865. desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
  866. }
  867. if (pdata)
  868. config.init_data = pdata->reg_data[id];
  869. else
  870. config.init_data = NULL;
  871. desc->supply_name = rinfo->sname;
  872. config.of_node = ddata->palmas_matches[id].of_node;
  873. rdev = devm_regulator_register(pmic->dev, desc, &config);
  874. if (IS_ERR(rdev)) {
  875. dev_err(pmic->dev,
  876. "failed to register %s regulator\n",
  877. pdev_name);
  878. return PTR_ERR(rdev);
  879. }
  880. /* Save regulator for cleanup */
  881. pmic->rdev[id] = rdev;
  882. /* Initialise sleep/init values from platform data */
  883. if (pdata) {
  884. reg_init = pdata->reg_init[id];
  885. if (reg_init) {
  886. if (id <= ddata->ldo_end)
  887. ret = palmas_ldo_init(pmic->palmas, id,
  888. reg_init);
  889. else
  890. ret = palmas_extreg_init(pmic->palmas,
  891. id, reg_init);
  892. if (ret)
  893. return ret;
  894. }
  895. }
  896. }
  897. return 0;
  898. }
  899. static int tps65917_ldo_registration(struct palmas_pmic *pmic,
  900. struct palmas_pmic_driver_data *ddata,
  901. struct palmas_pmic_platform_data *pdata,
  902. const char *pdev_name,
  903. struct regulator_config config)
  904. {
  905. int id, ret;
  906. struct regulator_dev *rdev;
  907. struct palmas_reg_init *reg_init;
  908. struct palmas_regs_info *rinfo;
  909. struct regulator_desc *desc;
  910. for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
  911. if (pdata && pdata->reg_init[id])
  912. reg_init = pdata->reg_init[id];
  913. else
  914. reg_init = NULL;
  915. /* Miss out regulators which are not available due
  916. * to alternate functions.
  917. */
  918. rinfo = &ddata->palmas_regs_info[id];
  919. /* Register the regulators */
  920. desc = &pmic->desc[id];
  921. desc->name = rinfo->name;
  922. desc->id = id;
  923. desc->type = REGULATOR_VOLTAGE;
  924. desc->owner = THIS_MODULE;
  925. if (id < TPS65917_REG_REGEN1) {
  926. desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
  927. if (reg_init && reg_init->roof_floor)
  928. desc->ops = &palmas_ops_ext_control_ldo;
  929. else
  930. desc->ops = &tps65917_ops_ldo;
  931. desc->min_uV = 900000;
  932. desc->uV_step = 50000;
  933. desc->linear_min_sel = 1;
  934. desc->enable_time = 500;
  935. desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
  936. rinfo->vsel_addr);
  937. desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
  938. desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
  939. rinfo->ctrl_addr);
  940. desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
  941. /*
  942. * To be confirmed. Discussion on going with PMIC Team.
  943. * It is of the order of ~60mV/uS.
  944. */
  945. desc->ramp_delay = 2500;
  946. if (id == TPS65917_REG_LDO1 ||
  947. id == TPS65917_REG_LDO2) {
  948. desc->ops = &tps65917_ops_ldo_1_2;
  949. desc->bypass_reg = desc->enable_reg;
  950. desc->bypass_val_on =
  951. TPS65917_LDO1_CTRL_BYPASS_EN;
  952. desc->bypass_mask =
  953. TPS65917_LDO1_CTRL_BYPASS_EN;
  954. }
  955. } else {
  956. desc->n_voltages = 1;
  957. if (reg_init && reg_init->roof_floor)
  958. desc->ops = &palmas_ops_ext_control_extreg;
  959. else
  960. desc->ops = &palmas_ops_extreg;
  961. desc->enable_reg =
  962. PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
  963. rinfo->ctrl_addr);
  964. desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
  965. }
  966. if (pdata)
  967. config.init_data = pdata->reg_data[id];
  968. else
  969. config.init_data = NULL;
  970. desc->supply_name = rinfo->sname;
  971. config.of_node = ddata->palmas_matches[id].of_node;
  972. rdev = devm_regulator_register(pmic->dev, desc, &config);
  973. if (IS_ERR(rdev)) {
  974. dev_err(pmic->dev,
  975. "failed to register %s regulator\n",
  976. pdev_name);
  977. return PTR_ERR(rdev);
  978. }
  979. /* Save regulator for cleanup */
  980. pmic->rdev[id] = rdev;
  981. /* Initialise sleep/init values from platform data */
  982. if (pdata) {
  983. reg_init = pdata->reg_init[id];
  984. if (reg_init) {
  985. if (id < TPS65917_REG_REGEN1)
  986. ret = palmas_ldo_init(pmic->palmas,
  987. id, reg_init);
  988. else
  989. ret = palmas_extreg_init(pmic->palmas,
  990. id, reg_init);
  991. if (ret)
  992. return ret;
  993. }
  994. }
  995. }
  996. return 0;
  997. }
  998. static int palmas_smps_registration(struct palmas_pmic *pmic,
  999. struct palmas_pmic_driver_data *ddata,
  1000. struct palmas_pmic_platform_data *pdata,
  1001. const char *pdev_name,
  1002. struct regulator_config config)
  1003. {
  1004. int id, ret;
  1005. unsigned int addr, reg;
  1006. struct regulator_dev *rdev;
  1007. struct palmas_reg_init *reg_init;
  1008. struct palmas_regs_info *rinfo;
  1009. struct regulator_desc *desc;
  1010. for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
  1011. bool ramp_delay_support = false;
  1012. /*
  1013. * Miss out regulators which are not available due
  1014. * to slaving configurations.
  1015. */
  1016. switch (id) {
  1017. case PALMAS_REG_SMPS12:
  1018. case PALMAS_REG_SMPS3:
  1019. if (pmic->smps123)
  1020. continue;
  1021. if (id == PALMAS_REG_SMPS12)
  1022. ramp_delay_support = true;
  1023. break;
  1024. case PALMAS_REG_SMPS123:
  1025. if (!pmic->smps123)
  1026. continue;
  1027. ramp_delay_support = true;
  1028. break;
  1029. case PALMAS_REG_SMPS45:
  1030. case PALMAS_REG_SMPS7:
  1031. if (pmic->smps457)
  1032. continue;
  1033. if (id == PALMAS_REG_SMPS45)
  1034. ramp_delay_support = true;
  1035. break;
  1036. case PALMAS_REG_SMPS457:
  1037. if (!pmic->smps457)
  1038. continue;
  1039. ramp_delay_support = true;
  1040. break;
  1041. case PALMAS_REG_SMPS10_OUT1:
  1042. case PALMAS_REG_SMPS10_OUT2:
  1043. if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST))
  1044. continue;
  1045. }
  1046. rinfo = &ddata->palmas_regs_info[id];
  1047. desc = &pmic->desc[id];
  1048. if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
  1049. ramp_delay_support = true;
  1050. if (ramp_delay_support) {
  1051. addr = rinfo->tstep_addr;
  1052. ret = palmas_smps_read(pmic->palmas, addr, &reg);
  1053. if (ret < 0) {
  1054. dev_err(pmic->dev,
  1055. "reading TSTEP reg failed: %d\n", ret);
  1056. return ret;
  1057. }
  1058. desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3];
  1059. pmic->ramp_delay[id] = desc->ramp_delay;
  1060. }
  1061. /* Initialise sleep/init values from platform data */
  1062. if (pdata && pdata->reg_init[id]) {
  1063. reg_init = pdata->reg_init[id];
  1064. ret = palmas_smps_init(pmic->palmas, id, reg_init);
  1065. if (ret)
  1066. return ret;
  1067. } else {
  1068. reg_init = NULL;
  1069. }
  1070. /* Register the regulators */
  1071. desc->name = rinfo->name;
  1072. desc->id = id;
  1073. switch (id) {
  1074. case PALMAS_REG_SMPS10_OUT1:
  1075. case PALMAS_REG_SMPS10_OUT2:
  1076. desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
  1077. desc->ops = &palmas_ops_smps10;
  1078. desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1079. PALMAS_SMPS10_CTRL);
  1080. desc->vsel_mask = SMPS10_VSEL;
  1081. desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1082. PALMAS_SMPS10_CTRL);
  1083. if (id == PALMAS_REG_SMPS10_OUT1)
  1084. desc->enable_mask = SMPS10_SWITCH_EN;
  1085. else
  1086. desc->enable_mask = SMPS10_BOOST_EN;
  1087. desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1088. PALMAS_SMPS10_CTRL);
  1089. desc->bypass_val_on = SMPS10_BYPASS_EN;
  1090. desc->bypass_mask = SMPS10_BYPASS_EN;
  1091. desc->min_uV = 3750000;
  1092. desc->uV_step = 1250000;
  1093. break;
  1094. default:
  1095. /*
  1096. * Read and store the RANGE bit for later use
  1097. * This must be done before regulator is probed,
  1098. * otherwise we error in probe with unsupportable
  1099. * ranges. Read the current smps mode for later use.
  1100. */
  1101. addr = rinfo->vsel_addr;
  1102. desc->n_linear_ranges = 3;
  1103. ret = palmas_smps_read(pmic->palmas, addr, &reg);
  1104. if (ret)
  1105. return ret;
  1106. if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
  1107. pmic->range[id] = 1;
  1108. if (pmic->range[id])
  1109. desc->linear_ranges = smps_high_ranges;
  1110. else
  1111. desc->linear_ranges = smps_low_ranges;
  1112. if (reg_init && reg_init->roof_floor)
  1113. desc->ops = &palmas_ops_ext_control_smps;
  1114. else
  1115. desc->ops = &palmas_ops_smps;
  1116. desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
  1117. desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1118. rinfo->vsel_addr);
  1119. desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
  1120. /* Read the smps mode for later use. */
  1121. addr = rinfo->ctrl_addr;
  1122. ret = palmas_smps_read(pmic->palmas, addr, &reg);
  1123. if (ret)
  1124. return ret;
  1125. pmic->current_reg_mode[id] = reg &
  1126. PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  1127. desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1128. rinfo->ctrl_addr);
  1129. desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  1130. /* set_mode overrides this value */
  1131. desc->enable_val = SMPS_CTRL_MODE_ON;
  1132. }
  1133. desc->type = REGULATOR_VOLTAGE;
  1134. desc->owner = THIS_MODULE;
  1135. if (pdata)
  1136. config.init_data = pdata->reg_data[id];
  1137. else
  1138. config.init_data = NULL;
  1139. desc->supply_name = rinfo->sname;
  1140. config.of_node = ddata->palmas_matches[id].of_node;
  1141. rdev = devm_regulator_register(pmic->dev, desc, &config);
  1142. if (IS_ERR(rdev)) {
  1143. dev_err(pmic->dev,
  1144. "failed to register %s regulator\n",
  1145. pdev_name);
  1146. return PTR_ERR(rdev);
  1147. }
  1148. /* Save regulator for cleanup */
  1149. pmic->rdev[id] = rdev;
  1150. }
  1151. return 0;
  1152. }
  1153. static int tps65917_smps_registration(struct palmas_pmic *pmic,
  1154. struct palmas_pmic_driver_data *ddata,
  1155. struct palmas_pmic_platform_data *pdata,
  1156. const char *pdev_name,
  1157. struct regulator_config config)
  1158. {
  1159. int id, ret;
  1160. unsigned int addr, reg;
  1161. struct regulator_dev *rdev;
  1162. struct palmas_reg_init *reg_init;
  1163. struct palmas_regs_info *rinfo;
  1164. struct regulator_desc *desc;
  1165. for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
  1166. /*
  1167. * Miss out regulators which are not available due
  1168. * to slaving configurations.
  1169. */
  1170. desc = &pmic->desc[id];
  1171. desc->n_linear_ranges = 3;
  1172. if ((id == TPS65917_REG_SMPS2) && pmic->smps12)
  1173. continue;
  1174. /* Initialise sleep/init values from platform data */
  1175. if (pdata && pdata->reg_init[id]) {
  1176. reg_init = pdata->reg_init[id];
  1177. ret = palmas_smps_init(pmic->palmas, id, reg_init);
  1178. if (ret)
  1179. return ret;
  1180. } else {
  1181. reg_init = NULL;
  1182. }
  1183. rinfo = &ddata->palmas_regs_info[id];
  1184. /* Register the regulators */
  1185. desc->name = rinfo->name;
  1186. desc->id = id;
  1187. /*
  1188. * Read and store the RANGE bit for later use
  1189. * This must be done before regulator is probed,
  1190. * otherwise we error in probe with unsupportable
  1191. * ranges. Read the current smps mode for later use.
  1192. */
  1193. addr = rinfo->vsel_addr;
  1194. ret = palmas_smps_read(pmic->palmas, addr, &reg);
  1195. if (ret)
  1196. return ret;
  1197. if (reg & TPS65917_SMPS1_VOLTAGE_RANGE)
  1198. pmic->range[id] = 1;
  1199. if (pmic->range[id])
  1200. desc->linear_ranges = smps_high_ranges;
  1201. else
  1202. desc->linear_ranges = smps_low_ranges;
  1203. if (reg_init && reg_init->roof_floor)
  1204. desc->ops = &tps65917_ops_ext_control_smps;
  1205. else
  1206. desc->ops = &tps65917_ops_smps;
  1207. desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
  1208. desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1209. rinfo->vsel_addr);
  1210. desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
  1211. desc->ramp_delay = 2500;
  1212. /* Read the smps mode for later use. */
  1213. addr = rinfo->ctrl_addr;
  1214. ret = palmas_smps_read(pmic->palmas, addr, &reg);
  1215. if (ret)
  1216. return ret;
  1217. pmic->current_reg_mode[id] = reg &
  1218. PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  1219. desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
  1220. rinfo->ctrl_addr);
  1221. desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
  1222. /* set_mode overrides this value */
  1223. desc->enable_val = SMPS_CTRL_MODE_ON;
  1224. desc->type = REGULATOR_VOLTAGE;
  1225. desc->owner = THIS_MODULE;
  1226. if (pdata)
  1227. config.init_data = pdata->reg_data[id];
  1228. else
  1229. config.init_data = NULL;
  1230. desc->supply_name = rinfo->sname;
  1231. config.of_node = ddata->palmas_matches[id].of_node;
  1232. rdev = devm_regulator_register(pmic->dev, desc, &config);
  1233. if (IS_ERR(rdev)) {
  1234. dev_err(pmic->dev,
  1235. "failed to register %s regulator\n",
  1236. pdev_name);
  1237. return PTR_ERR(rdev);
  1238. }
  1239. /* Save regulator for cleanup */
  1240. pmic->rdev[id] = rdev;
  1241. }
  1242. return 0;
  1243. }
  1244. static struct of_regulator_match palmas_matches[] = {
  1245. { .name = "smps12", },
  1246. { .name = "smps123", },
  1247. { .name = "smps3", },
  1248. { .name = "smps45", },
  1249. { .name = "smps457", },
  1250. { .name = "smps6", },
  1251. { .name = "smps7", },
  1252. { .name = "smps8", },
  1253. { .name = "smps9", },
  1254. { .name = "smps10_out2", },
  1255. { .name = "smps10_out1", },
  1256. { .name = "ldo1", },
  1257. { .name = "ldo2", },
  1258. { .name = "ldo3", },
  1259. { .name = "ldo4", },
  1260. { .name = "ldo5", },
  1261. { .name = "ldo6", },
  1262. { .name = "ldo7", },
  1263. { .name = "ldo8", },
  1264. { .name = "ldo9", },
  1265. { .name = "ldoln", },
  1266. { .name = "ldousb", },
  1267. { .name = "regen1", },
  1268. { .name = "regen2", },
  1269. { .name = "regen3", },
  1270. { .name = "sysen1", },
  1271. { .name = "sysen2", },
  1272. };
  1273. static struct of_regulator_match tps65917_matches[] = {
  1274. { .name = "smps1", },
  1275. { .name = "smps2", },
  1276. { .name = "smps3", },
  1277. { .name = "smps4", },
  1278. { .name = "smps5", },
  1279. { .name = "ldo1", },
  1280. { .name = "ldo2", },
  1281. { .name = "ldo3", },
  1282. { .name = "ldo4", },
  1283. { .name = "ldo5", },
  1284. { .name = "regen1", },
  1285. { .name = "regen2", },
  1286. { .name = "regen3", },
  1287. { .name = "sysen1", },
  1288. { .name = "sysen2", },
  1289. };
  1290. static struct palmas_pmic_driver_data palmas_ddata = {
  1291. .smps_start = PALMAS_REG_SMPS12,
  1292. .smps_end = PALMAS_REG_SMPS10_OUT1,
  1293. .ldo_begin = PALMAS_REG_LDO1,
  1294. .ldo_end = PALMAS_REG_LDOUSB,
  1295. .max_reg = PALMAS_NUM_REGS,
  1296. .has_regen3 = true,
  1297. .palmas_regs_info = palmas_generic_regs_info,
  1298. .palmas_matches = palmas_matches,
  1299. .sleep_req_info = palma_sleep_req_info,
  1300. .smps_register = palmas_smps_registration,
  1301. .ldo_register = palmas_ldo_registration,
  1302. };
  1303. static struct palmas_pmic_driver_data tps65917_ddata = {
  1304. .smps_start = TPS65917_REG_SMPS1,
  1305. .smps_end = TPS65917_REG_SMPS5,
  1306. .ldo_begin = TPS65917_REG_LDO1,
  1307. .ldo_end = TPS65917_REG_LDO5,
  1308. .max_reg = TPS65917_NUM_REGS,
  1309. .has_regen3 = true,
  1310. .palmas_regs_info = tps65917_regs_info,
  1311. .palmas_matches = tps65917_matches,
  1312. .sleep_req_info = tps65917_sleep_req_info,
  1313. .smps_register = tps65917_smps_registration,
  1314. .ldo_register = tps65917_ldo_registration,
  1315. };
  1316. static int palmas_dt_to_pdata(struct device *dev,
  1317. struct device_node *node,
  1318. struct palmas_pmic_platform_data *pdata,
  1319. struct palmas_pmic_driver_data *ddata)
  1320. {
  1321. struct device_node *regulators;
  1322. u32 prop;
  1323. int idx, ret;
  1324. regulators = of_get_child_by_name(node, "regulators");
  1325. if (!regulators) {
  1326. dev_info(dev, "regulator node not found\n");
  1327. return 0;
  1328. }
  1329. ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
  1330. ddata->max_reg);
  1331. of_node_put(regulators);
  1332. if (ret < 0) {
  1333. dev_err(dev, "Error parsing regulator init data: %d\n", ret);
  1334. return 0;
  1335. }
  1336. for (idx = 0; idx < ddata->max_reg; idx++) {
  1337. static struct of_regulator_match *match;
  1338. struct palmas_reg_init *rinit;
  1339. struct device_node *np;
  1340. match = &ddata->palmas_matches[idx];
  1341. np = match->of_node;
  1342. if (!match->init_data || !np)
  1343. continue;
  1344. rinit = devm_kzalloc(dev, sizeof(*rinit), GFP_KERNEL);
  1345. if (!rinit)
  1346. return -ENOMEM;
  1347. pdata->reg_data[idx] = match->init_data;
  1348. pdata->reg_init[idx] = rinit;
  1349. rinit->warm_reset = of_property_read_bool(np, "ti,warm-reset");
  1350. ret = of_property_read_u32(np, "ti,roof-floor", &prop);
  1351. /* EINVAL: Property not found */
  1352. if (ret != -EINVAL) {
  1353. int econtrol;
  1354. /* use default value, when no value is specified */
  1355. econtrol = PALMAS_EXT_CONTROL_NSLEEP;
  1356. if (!ret) {
  1357. switch (prop) {
  1358. case 1:
  1359. econtrol = PALMAS_EXT_CONTROL_ENABLE1;
  1360. break;
  1361. case 2:
  1362. econtrol = PALMAS_EXT_CONTROL_ENABLE2;
  1363. break;
  1364. case 3:
  1365. econtrol = PALMAS_EXT_CONTROL_NSLEEP;
  1366. break;
  1367. default:
  1368. WARN_ON(1);
  1369. dev_warn(dev,
  1370. "%s: Invalid roof-floor option: %u\n",
  1371. match->name, prop);
  1372. break;
  1373. }
  1374. }
  1375. rinit->roof_floor = econtrol;
  1376. }
  1377. ret = of_property_read_u32(np, "ti,mode-sleep", &prop);
  1378. if (!ret)
  1379. rinit->mode_sleep = prop;
  1380. ret = of_property_read_bool(np, "ti,smps-range");
  1381. if (ret)
  1382. rinit->vsel = PALMAS_SMPS12_VOLTAGE_RANGE;
  1383. if (idx == PALMAS_REG_LDO8)
  1384. pdata->enable_ldo8_tracking = of_property_read_bool(
  1385. np, "ti,enable-ldo8-tracking");
  1386. }
  1387. pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
  1388. return 0;
  1389. }
  1390. static const struct of_device_id of_palmas_match_tbl[] = {
  1391. {
  1392. .compatible = "ti,palmas-pmic",
  1393. .data = &palmas_ddata,
  1394. },
  1395. {
  1396. .compatible = "ti,twl6035-pmic",
  1397. .data = &palmas_ddata,
  1398. },
  1399. {
  1400. .compatible = "ti,twl6036-pmic",
  1401. .data = &palmas_ddata,
  1402. },
  1403. {
  1404. .compatible = "ti,twl6037-pmic",
  1405. .data = &palmas_ddata,
  1406. },
  1407. {
  1408. .compatible = "ti,tps65913-pmic",
  1409. .data = &palmas_ddata,
  1410. },
  1411. {
  1412. .compatible = "ti,tps65914-pmic",
  1413. .data = &palmas_ddata,
  1414. },
  1415. {
  1416. .compatible = "ti,tps80036-pmic",
  1417. .data = &palmas_ddata,
  1418. },
  1419. {
  1420. .compatible = "ti,tps659038-pmic",
  1421. .data = &palmas_ddata,
  1422. },
  1423. {
  1424. .compatible = "ti,tps65917-pmic",
  1425. .data = &tps65917_ddata,
  1426. },
  1427. { /* end */ }
  1428. };
  1429. static int palmas_regulators_probe(struct platform_device *pdev)
  1430. {
  1431. struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
  1432. struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
  1433. struct device_node *node = pdev->dev.of_node;
  1434. struct palmas_pmic_driver_data *driver_data;
  1435. struct regulator_config config = { };
  1436. struct palmas_pmic *pmic;
  1437. const char *pdev_name;
  1438. const struct of_device_id *match;
  1439. int ret = 0;
  1440. unsigned int reg;
  1441. match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev);
  1442. if (!match)
  1443. return -ENODATA;
  1444. driver_data = (struct palmas_pmic_driver_data *)match->data;
  1445. pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
  1446. if (!pdata)
  1447. return -ENOMEM;
  1448. pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
  1449. if (!pmic)
  1450. return -ENOMEM;
  1451. if (of_device_is_compatible(node, "ti,tps659038-pmic")) {
  1452. palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr =
  1453. TPS659038_REGEN2_CTRL;
  1454. palmas_ddata.has_regen3 = false;
  1455. }
  1456. pmic->dev = &pdev->dev;
  1457. pmic->palmas = palmas;
  1458. palmas->pmic = pmic;
  1459. platform_set_drvdata(pdev, pmic);
  1460. pmic->palmas->pmic_ddata = driver_data;
  1461. ret = palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data);
  1462. if (ret)
  1463. return ret;
  1464. ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
  1465. if (ret)
  1466. return ret;
  1467. if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)
  1468. pmic->smps123 = 1;
  1469. if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
  1470. pmic->smps457 = 1;
  1471. config.regmap = palmas->regmap[REGULATOR_SLAVE];
  1472. config.dev = &pdev->dev;
  1473. config.driver_data = pmic;
  1474. pdev_name = pdev->name;
  1475. ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name,
  1476. config);
  1477. if (ret)
  1478. return ret;
  1479. ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name,
  1480. config);
  1481. return ret;
  1482. }
  1483. static struct platform_driver palmas_driver = {
  1484. .driver = {
  1485. .name = "palmas-pmic",
  1486. .of_match_table = of_palmas_match_tbl,
  1487. },
  1488. .probe = palmas_regulators_probe,
  1489. };
  1490. static int __init palmas_init(void)
  1491. {
  1492. return platform_driver_register(&palmas_driver);
  1493. }
  1494. subsys_initcall(palmas_init);
  1495. static void __exit palmas_exit(void)
  1496. {
  1497. platform_driver_unregister(&palmas_driver);
  1498. }
  1499. module_exit(palmas_exit);
  1500. MODULE_AUTHOR("Graeme Gregory <[email protected]>");
  1501. MODULE_DESCRIPTION("Palmas voltage regulator driver");
  1502. MODULE_LICENSE("GPL");
  1503. MODULE_ALIAS("platform:palmas-pmic");
  1504. MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);