rtc-s3c.c 21 KB

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  1. /* drivers/rtc/rtc-s3c.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com/
  5. *
  6. * Copyright (c) 2004,2006 Simtec Electronics
  7. * Ben Dooks, <[email protected]>
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * S3C2410/S3C2440/S3C24XX Internal RTC Driver
  15. */
  16. #include <linux/module.h>
  17. #include <linux/fs.h>
  18. #include <linux/string.h>
  19. #include <linux/init.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/rtc.h>
  23. #include <linux/bcd.h>
  24. #include <linux/clk.h>
  25. #include <linux/log2.h>
  26. #include <linux/slab.h>
  27. #include <linux/of.h>
  28. #include <linux/uaccess.h>
  29. #include <linux/io.h>
  30. #include <asm/irq.h>
  31. #include "rtc-s3c.h"
  32. struct s3c_rtc {
  33. struct device *dev;
  34. struct rtc_device *rtc;
  35. void __iomem *base;
  36. struct clk *rtc_clk;
  37. struct clk *rtc_src_clk;
  38. bool clk_disabled;
  39. struct s3c_rtc_data *data;
  40. int irq_alarm;
  41. int irq_tick;
  42. spinlock_t pie_lock;
  43. spinlock_t alarm_clk_lock;
  44. int ticnt_save, ticnt_en_save;
  45. bool wake_en;
  46. };
  47. struct s3c_rtc_data {
  48. int max_user_freq;
  49. bool needs_src_clk;
  50. void (*irq_handler) (struct s3c_rtc *info, int mask);
  51. void (*set_freq) (struct s3c_rtc *info, int freq);
  52. void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
  53. void (*select_tick_clk) (struct s3c_rtc *info);
  54. void (*save_tick_cnt) (struct s3c_rtc *info);
  55. void (*restore_tick_cnt) (struct s3c_rtc *info);
  56. void (*enable) (struct s3c_rtc *info);
  57. void (*disable) (struct s3c_rtc *info);
  58. };
  59. static void s3c_rtc_enable_clk(struct s3c_rtc *info)
  60. {
  61. unsigned long irq_flags;
  62. spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
  63. if (info->clk_disabled) {
  64. clk_enable(info->rtc_clk);
  65. if (info->data->needs_src_clk)
  66. clk_enable(info->rtc_src_clk);
  67. info->clk_disabled = false;
  68. }
  69. spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
  70. }
  71. static void s3c_rtc_disable_clk(struct s3c_rtc *info)
  72. {
  73. unsigned long irq_flags;
  74. spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
  75. if (!info->clk_disabled) {
  76. if (info->data->needs_src_clk)
  77. clk_disable(info->rtc_src_clk);
  78. clk_disable(info->rtc_clk);
  79. info->clk_disabled = true;
  80. }
  81. spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
  82. }
  83. /* IRQ Handlers */
  84. static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
  85. {
  86. struct s3c_rtc *info = (struct s3c_rtc *)id;
  87. if (info->data->irq_handler)
  88. info->data->irq_handler(info, S3C2410_INTP_TIC);
  89. return IRQ_HANDLED;
  90. }
  91. static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
  92. {
  93. struct s3c_rtc *info = (struct s3c_rtc *)id;
  94. if (info->data->irq_handler)
  95. info->data->irq_handler(info, S3C2410_INTP_ALM);
  96. return IRQ_HANDLED;
  97. }
  98. /* Update control registers */
  99. static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
  100. {
  101. struct s3c_rtc *info = dev_get_drvdata(dev);
  102. unsigned int tmp;
  103. dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
  104. s3c_rtc_enable_clk(info);
  105. tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
  106. if (enabled)
  107. tmp |= S3C2410_RTCALM_ALMEN;
  108. writeb(tmp, info->base + S3C2410_RTCALM);
  109. s3c_rtc_disable_clk(info);
  110. if (enabled)
  111. s3c_rtc_enable_clk(info);
  112. else
  113. s3c_rtc_disable_clk(info);
  114. return 0;
  115. }
  116. /* Set RTC frequency */
  117. static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
  118. {
  119. if (!is_power_of_2(freq))
  120. return -EINVAL;
  121. s3c_rtc_enable_clk(info);
  122. spin_lock_irq(&info->pie_lock);
  123. if (info->data->set_freq)
  124. info->data->set_freq(info, freq);
  125. spin_unlock_irq(&info->pie_lock);
  126. s3c_rtc_disable_clk(info);
  127. return 0;
  128. }
  129. /* Time read/write */
  130. static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  131. {
  132. struct s3c_rtc *info = dev_get_drvdata(dev);
  133. unsigned int have_retried = 0;
  134. s3c_rtc_enable_clk(info);
  135. retry_get_time:
  136. rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
  137. rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
  138. rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
  139. rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
  140. rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
  141. rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
  142. /* the only way to work out whether the system was mid-update
  143. * when we read it is to check the second counter, and if it
  144. * is zero, then we re-try the entire read
  145. */
  146. if (rtc_tm->tm_sec == 0 && !have_retried) {
  147. have_retried = 1;
  148. goto retry_get_time;
  149. }
  150. rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
  151. rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
  152. rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
  153. rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
  154. rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
  155. rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
  156. s3c_rtc_disable_clk(info);
  157. rtc_tm->tm_year += 100;
  158. dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
  159. 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
  160. rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
  161. rtc_tm->tm_mon -= 1;
  162. return rtc_valid_tm(rtc_tm);
  163. }
  164. static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
  165. {
  166. struct s3c_rtc *info = dev_get_drvdata(dev);
  167. int year = tm->tm_year - 100;
  168. dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
  169. 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
  170. tm->tm_hour, tm->tm_min, tm->tm_sec);
  171. /* we get around y2k by simply not supporting it */
  172. if (year < 0 || year >= 100) {
  173. dev_err(dev, "rtc only supports 100 years\n");
  174. return -EINVAL;
  175. }
  176. s3c_rtc_enable_clk(info);
  177. writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
  178. writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
  179. writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
  180. writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
  181. writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
  182. writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
  183. s3c_rtc_disable_clk(info);
  184. return 0;
  185. }
  186. static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
  187. {
  188. struct s3c_rtc *info = dev_get_drvdata(dev);
  189. struct rtc_time *alm_tm = &alrm->time;
  190. unsigned int alm_en;
  191. s3c_rtc_enable_clk(info);
  192. alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
  193. alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
  194. alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
  195. alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
  196. alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
  197. alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
  198. alm_en = readb(info->base + S3C2410_RTCALM);
  199. s3c_rtc_disable_clk(info);
  200. alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
  201. dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  202. alm_en,
  203. 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
  204. alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
  205. /* decode the alarm enable field */
  206. if (alm_en & S3C2410_RTCALM_SECEN)
  207. alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
  208. if (alm_en & S3C2410_RTCALM_MINEN)
  209. alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
  210. if (alm_en & S3C2410_RTCALM_HOUREN)
  211. alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
  212. if (alm_en & S3C2410_RTCALM_DAYEN)
  213. alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
  214. if (alm_en & S3C2410_RTCALM_MONEN) {
  215. alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
  216. alm_tm->tm_mon -= 1;
  217. }
  218. if (alm_en & S3C2410_RTCALM_YEAREN)
  219. alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
  220. return 0;
  221. }
  222. static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  223. {
  224. struct s3c_rtc *info = dev_get_drvdata(dev);
  225. struct rtc_time *tm = &alrm->time;
  226. unsigned int alrm_en;
  227. int year = tm->tm_year - 100;
  228. dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  229. alrm->enabled,
  230. 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
  231. tm->tm_hour, tm->tm_min, tm->tm_sec);
  232. s3c_rtc_enable_clk(info);
  233. alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
  234. writeb(0x00, info->base + S3C2410_RTCALM);
  235. if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
  236. alrm_en |= S3C2410_RTCALM_SECEN;
  237. writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
  238. }
  239. if (tm->tm_min < 60 && tm->tm_min >= 0) {
  240. alrm_en |= S3C2410_RTCALM_MINEN;
  241. writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
  242. }
  243. if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
  244. alrm_en |= S3C2410_RTCALM_HOUREN;
  245. writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
  246. }
  247. if (year < 100 && year >= 0) {
  248. alrm_en |= S3C2410_RTCALM_YEAREN;
  249. writeb(bin2bcd(year), info->base + S3C2410_ALMYEAR);
  250. }
  251. if (tm->tm_mon < 12 && tm->tm_mon >= 0) {
  252. alrm_en |= S3C2410_RTCALM_MONEN;
  253. writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON);
  254. }
  255. if (tm->tm_mday <= 31 && tm->tm_mday >= 1) {
  256. alrm_en |= S3C2410_RTCALM_DAYEN;
  257. writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE);
  258. }
  259. dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
  260. writeb(alrm_en, info->base + S3C2410_RTCALM);
  261. s3c_rtc_disable_clk(info);
  262. s3c_rtc_setaie(dev, alrm->enabled);
  263. return 0;
  264. }
  265. static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
  266. {
  267. struct s3c_rtc *info = dev_get_drvdata(dev);
  268. s3c_rtc_enable_clk(info);
  269. if (info->data->enable_tick)
  270. info->data->enable_tick(info, seq);
  271. s3c_rtc_disable_clk(info);
  272. return 0;
  273. }
  274. static const struct rtc_class_ops s3c_rtcops = {
  275. .read_time = s3c_rtc_gettime,
  276. .set_time = s3c_rtc_settime,
  277. .read_alarm = s3c_rtc_getalarm,
  278. .set_alarm = s3c_rtc_setalarm,
  279. .proc = s3c_rtc_proc,
  280. .alarm_irq_enable = s3c_rtc_setaie,
  281. };
  282. static void s3c24xx_rtc_enable(struct s3c_rtc *info)
  283. {
  284. unsigned int con, tmp;
  285. con = readw(info->base + S3C2410_RTCCON);
  286. /* re-enable the device, and check it is ok */
  287. if ((con & S3C2410_RTCCON_RTCEN) == 0) {
  288. dev_info(info->dev, "rtc disabled, re-enabling\n");
  289. tmp = readw(info->base + S3C2410_RTCCON);
  290. writew(tmp | S3C2410_RTCCON_RTCEN,
  291. info->base + S3C2410_RTCCON);
  292. }
  293. if (con & S3C2410_RTCCON_CNTSEL) {
  294. dev_info(info->dev, "removing RTCCON_CNTSEL\n");
  295. tmp = readw(info->base + S3C2410_RTCCON);
  296. writew(tmp & ~S3C2410_RTCCON_CNTSEL,
  297. info->base + S3C2410_RTCCON);
  298. }
  299. if (con & S3C2410_RTCCON_CLKRST) {
  300. dev_info(info->dev, "removing RTCCON_CLKRST\n");
  301. tmp = readw(info->base + S3C2410_RTCCON);
  302. writew(tmp & ~S3C2410_RTCCON_CLKRST,
  303. info->base + S3C2410_RTCCON);
  304. }
  305. }
  306. static void s3c24xx_rtc_disable(struct s3c_rtc *info)
  307. {
  308. unsigned int con;
  309. con = readw(info->base + S3C2410_RTCCON);
  310. con &= ~S3C2410_RTCCON_RTCEN;
  311. writew(con, info->base + S3C2410_RTCCON);
  312. con = readb(info->base + S3C2410_TICNT);
  313. con &= ~S3C2410_TICNT_ENABLE;
  314. writeb(con, info->base + S3C2410_TICNT);
  315. }
  316. static void s3c6410_rtc_disable(struct s3c_rtc *info)
  317. {
  318. unsigned int con;
  319. con = readw(info->base + S3C2410_RTCCON);
  320. con &= ~S3C64XX_RTCCON_TICEN;
  321. con &= ~S3C2410_RTCCON_RTCEN;
  322. writew(con, info->base + S3C2410_RTCCON);
  323. }
  324. static int s3c_rtc_remove(struct platform_device *pdev)
  325. {
  326. struct s3c_rtc *info = platform_get_drvdata(pdev);
  327. s3c_rtc_setaie(info->dev, 0);
  328. if (info->data->needs_src_clk)
  329. clk_unprepare(info->rtc_src_clk);
  330. clk_unprepare(info->rtc_clk);
  331. return 0;
  332. }
  333. static const struct of_device_id s3c_rtc_dt_match[];
  334. static struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
  335. {
  336. const struct of_device_id *match;
  337. match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
  338. return (struct s3c_rtc_data *)match->data;
  339. }
  340. static int s3c_rtc_probe(struct platform_device *pdev)
  341. {
  342. struct s3c_rtc *info = NULL;
  343. struct rtc_time rtc_tm;
  344. struct resource *res;
  345. int ret;
  346. info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
  347. if (!info)
  348. return -ENOMEM;
  349. /* find the IRQs */
  350. info->irq_tick = platform_get_irq(pdev, 1);
  351. if (info->irq_tick < 0) {
  352. dev_err(&pdev->dev, "no irq for rtc tick\n");
  353. return info->irq_tick;
  354. }
  355. info->dev = &pdev->dev;
  356. info->data = s3c_rtc_get_data(pdev);
  357. if (!info->data) {
  358. dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
  359. return -EINVAL;
  360. }
  361. spin_lock_init(&info->pie_lock);
  362. spin_lock_init(&info->alarm_clk_lock);
  363. platform_set_drvdata(pdev, info);
  364. info->irq_alarm = platform_get_irq(pdev, 0);
  365. if (info->irq_alarm < 0) {
  366. dev_err(&pdev->dev, "no irq for alarm\n");
  367. return info->irq_alarm;
  368. }
  369. dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
  370. info->irq_tick, info->irq_alarm);
  371. /* get the memory region */
  372. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  373. info->base = devm_ioremap_resource(&pdev->dev, res);
  374. if (IS_ERR(info->base))
  375. return PTR_ERR(info->base);
  376. info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
  377. if (IS_ERR(info->rtc_clk)) {
  378. ret = PTR_ERR(info->rtc_clk);
  379. if (ret != -EPROBE_DEFER)
  380. dev_err(&pdev->dev, "failed to find rtc clock\n");
  381. else
  382. dev_dbg(&pdev->dev, "probe deferred due to missing rtc clk\n");
  383. return ret;
  384. }
  385. clk_prepare_enable(info->rtc_clk);
  386. if (info->data->needs_src_clk) {
  387. info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
  388. if (IS_ERR(info->rtc_src_clk)) {
  389. ret = PTR_ERR(info->rtc_src_clk);
  390. if (ret != -EPROBE_DEFER)
  391. dev_err(&pdev->dev,
  392. "failed to find rtc source clock\n");
  393. else
  394. dev_dbg(&pdev->dev,
  395. "probe deferred due to missing rtc src clk\n");
  396. clk_disable_unprepare(info->rtc_clk);
  397. return ret;
  398. }
  399. clk_prepare_enable(info->rtc_src_clk);
  400. }
  401. /* check to see if everything is setup correctly */
  402. if (info->data->enable)
  403. info->data->enable(info);
  404. dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
  405. readw(info->base + S3C2410_RTCCON));
  406. device_init_wakeup(&pdev->dev, 1);
  407. /* Check RTC Time */
  408. if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
  409. rtc_tm.tm_year = 100;
  410. rtc_tm.tm_mon = 0;
  411. rtc_tm.tm_mday = 1;
  412. rtc_tm.tm_hour = 0;
  413. rtc_tm.tm_min = 0;
  414. rtc_tm.tm_sec = 0;
  415. s3c_rtc_settime(&pdev->dev, &rtc_tm);
  416. dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
  417. }
  418. /* register RTC and exit */
  419. info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
  420. THIS_MODULE);
  421. if (IS_ERR(info->rtc)) {
  422. dev_err(&pdev->dev, "cannot attach rtc\n");
  423. ret = PTR_ERR(info->rtc);
  424. goto err_nortc;
  425. }
  426. ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
  427. 0, "s3c2410-rtc alarm", info);
  428. if (ret) {
  429. dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
  430. goto err_nortc;
  431. }
  432. ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
  433. 0, "s3c2410-rtc tick", info);
  434. if (ret) {
  435. dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
  436. goto err_nortc;
  437. }
  438. if (info->data->select_tick_clk)
  439. info->data->select_tick_clk(info);
  440. s3c_rtc_setfreq(info, 1);
  441. return 0;
  442. err_nortc:
  443. if (info->data->disable)
  444. info->data->disable(info);
  445. if (info->data->needs_src_clk)
  446. clk_disable_unprepare(info->rtc_src_clk);
  447. clk_disable_unprepare(info->rtc_clk);
  448. return ret;
  449. }
  450. #ifdef CONFIG_PM_SLEEP
  451. static int s3c_rtc_suspend(struct device *dev)
  452. {
  453. struct s3c_rtc *info = dev_get_drvdata(dev);
  454. s3c_rtc_enable_clk(info);
  455. /* save TICNT for anyone using periodic interrupts */
  456. if (info->data->save_tick_cnt)
  457. info->data->save_tick_cnt(info);
  458. if (info->data->disable)
  459. info->data->disable(info);
  460. if (device_may_wakeup(dev) && !info->wake_en) {
  461. if (enable_irq_wake(info->irq_alarm) == 0)
  462. info->wake_en = true;
  463. else
  464. dev_err(dev, "enable_irq_wake failed\n");
  465. }
  466. return 0;
  467. }
  468. static int s3c_rtc_resume(struct device *dev)
  469. {
  470. struct s3c_rtc *info = dev_get_drvdata(dev);
  471. if (info->data->enable)
  472. info->data->enable(info);
  473. if (info->data->restore_tick_cnt)
  474. info->data->restore_tick_cnt(info);
  475. s3c_rtc_disable_clk(info);
  476. if (device_may_wakeup(dev) && info->wake_en) {
  477. disable_irq_wake(info->irq_alarm);
  478. info->wake_en = false;
  479. }
  480. return 0;
  481. }
  482. #endif
  483. static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
  484. static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
  485. {
  486. rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
  487. }
  488. static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
  489. {
  490. rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
  491. writeb(mask, info->base + S3C2410_INTP);
  492. }
  493. static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
  494. {
  495. unsigned int tmp = 0;
  496. int val;
  497. tmp = readb(info->base + S3C2410_TICNT);
  498. tmp &= S3C2410_TICNT_ENABLE;
  499. val = (info->rtc->max_user_freq / freq) - 1;
  500. tmp |= val;
  501. writel(tmp, info->base + S3C2410_TICNT);
  502. }
  503. static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
  504. {
  505. unsigned int tmp = 0;
  506. int val;
  507. tmp = readb(info->base + S3C2410_TICNT);
  508. tmp &= S3C2410_TICNT_ENABLE;
  509. val = (info->rtc->max_user_freq / freq) - 1;
  510. tmp |= S3C2443_TICNT_PART(val);
  511. writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
  512. writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
  513. writel(tmp, info->base + S3C2410_TICNT);
  514. }
  515. static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
  516. {
  517. unsigned int tmp = 0;
  518. int val;
  519. tmp = readb(info->base + S3C2410_TICNT);
  520. tmp &= S3C2410_TICNT_ENABLE;
  521. val = (info->rtc->max_user_freq / freq) - 1;
  522. tmp |= S3C2443_TICNT_PART(val);
  523. writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
  524. writel(tmp, info->base + S3C2410_TICNT);
  525. }
  526. static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
  527. {
  528. int val;
  529. val = (info->rtc->max_user_freq / freq) - 1;
  530. writel(val, info->base + S3C2410_TICNT);
  531. }
  532. static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
  533. {
  534. unsigned int ticnt;
  535. ticnt = readb(info->base + S3C2410_TICNT);
  536. ticnt &= S3C2410_TICNT_ENABLE;
  537. seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
  538. }
  539. static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
  540. {
  541. unsigned int con;
  542. con = readw(info->base + S3C2410_RTCCON);
  543. con |= S3C2443_RTCCON_TICSEL;
  544. writew(con, info->base + S3C2410_RTCCON);
  545. }
  546. static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
  547. {
  548. unsigned int ticnt;
  549. ticnt = readw(info->base + S3C2410_RTCCON);
  550. ticnt &= S3C64XX_RTCCON_TICEN;
  551. seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
  552. }
  553. static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
  554. {
  555. info->ticnt_save = readb(info->base + S3C2410_TICNT);
  556. }
  557. static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
  558. {
  559. writeb(info->ticnt_save, info->base + S3C2410_TICNT);
  560. }
  561. static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
  562. {
  563. info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
  564. info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
  565. info->ticnt_save = readl(info->base + S3C2410_TICNT);
  566. }
  567. static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
  568. {
  569. unsigned int con;
  570. writel(info->ticnt_save, info->base + S3C2410_TICNT);
  571. if (info->ticnt_en_save) {
  572. con = readw(info->base + S3C2410_RTCCON);
  573. writew(con | info->ticnt_en_save,
  574. info->base + S3C2410_RTCCON);
  575. }
  576. }
  577. static struct s3c_rtc_data const s3c2410_rtc_data = {
  578. .max_user_freq = 128,
  579. .irq_handler = s3c24xx_rtc_irq,
  580. .set_freq = s3c2410_rtc_setfreq,
  581. .enable_tick = s3c24xx_rtc_enable_tick,
  582. .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
  583. .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
  584. .enable = s3c24xx_rtc_enable,
  585. .disable = s3c24xx_rtc_disable,
  586. };
  587. static struct s3c_rtc_data const s3c2416_rtc_data = {
  588. .max_user_freq = 32768,
  589. .irq_handler = s3c24xx_rtc_irq,
  590. .set_freq = s3c2416_rtc_setfreq,
  591. .enable_tick = s3c24xx_rtc_enable_tick,
  592. .select_tick_clk = s3c2416_rtc_select_tick_clk,
  593. .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
  594. .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
  595. .enable = s3c24xx_rtc_enable,
  596. .disable = s3c24xx_rtc_disable,
  597. };
  598. static struct s3c_rtc_data const s3c2443_rtc_data = {
  599. .max_user_freq = 32768,
  600. .irq_handler = s3c24xx_rtc_irq,
  601. .set_freq = s3c2443_rtc_setfreq,
  602. .enable_tick = s3c24xx_rtc_enable_tick,
  603. .select_tick_clk = s3c2416_rtc_select_tick_clk,
  604. .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
  605. .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
  606. .enable = s3c24xx_rtc_enable,
  607. .disable = s3c24xx_rtc_disable,
  608. };
  609. static struct s3c_rtc_data const s3c6410_rtc_data = {
  610. .max_user_freq = 32768,
  611. .needs_src_clk = true,
  612. .irq_handler = s3c6410_rtc_irq,
  613. .set_freq = s3c6410_rtc_setfreq,
  614. .enable_tick = s3c6410_rtc_enable_tick,
  615. .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
  616. .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
  617. .enable = s3c24xx_rtc_enable,
  618. .disable = s3c6410_rtc_disable,
  619. };
  620. static const struct of_device_id s3c_rtc_dt_match[] = {
  621. {
  622. .compatible = "samsung,s3c2410-rtc",
  623. .data = (void *)&s3c2410_rtc_data,
  624. }, {
  625. .compatible = "samsung,s3c2416-rtc",
  626. .data = (void *)&s3c2416_rtc_data,
  627. }, {
  628. .compatible = "samsung,s3c2443-rtc",
  629. .data = (void *)&s3c2443_rtc_data,
  630. }, {
  631. .compatible = "samsung,s3c6410-rtc",
  632. .data = (void *)&s3c6410_rtc_data,
  633. }, {
  634. .compatible = "samsung,exynos3250-rtc",
  635. .data = (void *)&s3c6410_rtc_data,
  636. },
  637. { /* sentinel */ },
  638. };
  639. MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
  640. static struct platform_driver s3c_rtc_driver = {
  641. .probe = s3c_rtc_probe,
  642. .remove = s3c_rtc_remove,
  643. .driver = {
  644. .name = "s3c-rtc",
  645. .pm = &s3c_rtc_pm_ops,
  646. .of_match_table = of_match_ptr(s3c_rtc_dt_match),
  647. },
  648. };
  649. module_platform_driver(s3c_rtc_driver);
  650. MODULE_DESCRIPTION("Samsung S3C RTC Driver");
  651. MODULE_AUTHOR("Ben Dooks <[email protected]>");
  652. MODULE_LICENSE("GPL");
  653. MODULE_ALIAS("platform:s3c2410-rtc");