8250_dma.c 6.5 KB

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  1. /*
  2. * 8250_dma.c - DMA Engine API support for 8250.c
  3. *
  4. * Copyright (C) 2013 Intel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/tty.h>
  12. #include <linux/tty_flip.h>
  13. #include <linux/serial_reg.h>
  14. #include <linux/dma-mapping.h>
  15. #include "8250.h"
  16. static void __dma_tx_complete(void *param)
  17. {
  18. struct uart_8250_port *p = param;
  19. struct uart_8250_dma *dma = p->dma;
  20. struct circ_buf *xmit = &p->port.state->xmit;
  21. unsigned long flags;
  22. int ret;
  23. dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
  24. UART_XMIT_SIZE, DMA_TO_DEVICE);
  25. spin_lock_irqsave(&p->port.lock, flags);
  26. dma->tx_running = 0;
  27. xmit->tail += dma->tx_size;
  28. xmit->tail &= UART_XMIT_SIZE - 1;
  29. p->port.icount.tx += dma->tx_size;
  30. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  31. uart_write_wakeup(&p->port);
  32. ret = serial8250_tx_dma(p);
  33. if (ret) {
  34. p->ier |= UART_IER_THRI;
  35. serial_port_out(&p->port, UART_IER, p->ier);
  36. }
  37. spin_unlock_irqrestore(&p->port.lock, flags);
  38. }
  39. static void __dma_rx_complete(void *param)
  40. {
  41. struct uart_8250_port *p = param;
  42. struct uart_8250_dma *dma = p->dma;
  43. struct tty_port *tty_port = &p->port.state->port;
  44. struct dma_tx_state state;
  45. int count;
  46. dma->rx_running = 0;
  47. dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
  48. count = dma->rx_size - state.residue;
  49. tty_insert_flip_string(tty_port, dma->rx_buf, count);
  50. p->port.icount.rx += count;
  51. tty_flip_buffer_push(tty_port);
  52. }
  53. int serial8250_tx_dma(struct uart_8250_port *p)
  54. {
  55. struct uart_8250_dma *dma = p->dma;
  56. struct circ_buf *xmit = &p->port.state->xmit;
  57. struct dma_async_tx_descriptor *desc;
  58. int ret;
  59. if (uart_tx_stopped(&p->port) || dma->tx_running ||
  60. uart_circ_empty(xmit))
  61. return 0;
  62. dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  63. desc = dmaengine_prep_slave_single(dma->txchan,
  64. dma->tx_addr + xmit->tail,
  65. dma->tx_size, DMA_MEM_TO_DEV,
  66. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  67. if (!desc) {
  68. ret = -EBUSY;
  69. goto err;
  70. }
  71. dma->tx_running = 1;
  72. desc->callback = __dma_tx_complete;
  73. desc->callback_param = p;
  74. dma->tx_cookie = dmaengine_submit(desc);
  75. dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
  76. UART_XMIT_SIZE, DMA_TO_DEVICE);
  77. dma_async_issue_pending(dma->txchan);
  78. if (dma->tx_err) {
  79. dma->tx_err = 0;
  80. if (p->ier & UART_IER_THRI) {
  81. p->ier &= ~UART_IER_THRI;
  82. serial_out(p, UART_IER, p->ier);
  83. }
  84. }
  85. return 0;
  86. err:
  87. dma->tx_err = 1;
  88. return ret;
  89. }
  90. int serial8250_rx_dma(struct uart_8250_port *p)
  91. {
  92. struct uart_8250_dma *dma = p->dma;
  93. struct dma_async_tx_descriptor *desc;
  94. if (dma->rx_running)
  95. return 0;
  96. desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
  97. dma->rx_size, DMA_DEV_TO_MEM,
  98. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  99. if (!desc)
  100. return -EBUSY;
  101. dma->rx_running = 1;
  102. desc->callback = __dma_rx_complete;
  103. desc->callback_param = p;
  104. dma->rx_cookie = dmaengine_submit(desc);
  105. dma_async_issue_pending(dma->rxchan);
  106. return 0;
  107. }
  108. void serial8250_rx_dma_flush(struct uart_8250_port *p)
  109. {
  110. struct uart_8250_dma *dma = p->dma;
  111. if (dma->rx_running) {
  112. dmaengine_pause(dma->rxchan);
  113. __dma_rx_complete(p);
  114. dmaengine_terminate_async(dma->rxchan);
  115. }
  116. }
  117. EXPORT_SYMBOL_GPL(serial8250_rx_dma_flush);
  118. int serial8250_request_dma(struct uart_8250_port *p)
  119. {
  120. struct uart_8250_dma *dma = p->dma;
  121. phys_addr_t rx_dma_addr = dma->rx_dma_addr ?
  122. dma->rx_dma_addr : p->port.mapbase;
  123. phys_addr_t tx_dma_addr = dma->tx_dma_addr ?
  124. dma->tx_dma_addr : p->port.mapbase;
  125. dma_cap_mask_t mask;
  126. struct dma_slave_caps caps;
  127. int ret;
  128. /* Default slave configuration parameters */
  129. dma->rxconf.direction = DMA_DEV_TO_MEM;
  130. dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
  131. dma->rxconf.src_addr = rx_dma_addr + UART_RX;
  132. dma->txconf.direction = DMA_MEM_TO_DEV;
  133. dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
  134. dma->txconf.dst_addr = tx_dma_addr + UART_TX;
  135. dma_cap_zero(mask);
  136. dma_cap_set(DMA_SLAVE, mask);
  137. /* Get a channel for RX */
  138. dma->rxchan = dma_request_slave_channel_compat(mask,
  139. dma->fn, dma->rx_param,
  140. p->port.dev, "rx");
  141. if (!dma->rxchan)
  142. return -ENODEV;
  143. /* 8250 rx dma requires dmaengine driver to support pause/terminate */
  144. ret = dma_get_slave_caps(dma->rxchan, &caps);
  145. if (ret)
  146. goto release_rx;
  147. if (!caps.cmd_pause || !caps.cmd_terminate ||
  148. caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR) {
  149. ret = -EINVAL;
  150. goto release_rx;
  151. }
  152. dmaengine_slave_config(dma->rxchan, &dma->rxconf);
  153. /* Get a channel for TX */
  154. dma->txchan = dma_request_slave_channel_compat(mask,
  155. dma->fn, dma->tx_param,
  156. p->port.dev, "tx");
  157. if (!dma->txchan) {
  158. ret = -ENODEV;
  159. goto release_rx;
  160. }
  161. /* 8250 tx dma requires dmaengine driver to support terminate */
  162. ret = dma_get_slave_caps(dma->txchan, &caps);
  163. if (ret)
  164. goto err;
  165. if (!caps.cmd_terminate) {
  166. ret = -EINVAL;
  167. goto err;
  168. }
  169. dmaengine_slave_config(dma->txchan, &dma->txconf);
  170. /* RX buffer */
  171. if (!dma->rx_size)
  172. dma->rx_size = PAGE_SIZE;
  173. dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
  174. &dma->rx_addr, GFP_KERNEL);
  175. if (!dma->rx_buf) {
  176. ret = -ENOMEM;
  177. goto err;
  178. }
  179. /* TX buffer */
  180. dma->tx_addr = dma_map_single(dma->txchan->device->dev,
  181. p->port.state->xmit.buf,
  182. UART_XMIT_SIZE,
  183. DMA_TO_DEVICE);
  184. if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) {
  185. dma_free_coherent(dma->rxchan->device->dev, dma->rx_size,
  186. dma->rx_buf, dma->rx_addr);
  187. ret = -ENOMEM;
  188. goto err;
  189. }
  190. dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
  191. return 0;
  192. err:
  193. dma_release_channel(dma->txchan);
  194. release_rx:
  195. dma_release_channel(dma->rxchan);
  196. return ret;
  197. }
  198. EXPORT_SYMBOL_GPL(serial8250_request_dma);
  199. void serial8250_release_dma(struct uart_8250_port *p)
  200. {
  201. struct uart_8250_dma *dma = p->dma;
  202. if (!dma)
  203. return;
  204. /* Release RX resources */
  205. dmaengine_terminate_sync(dma->rxchan);
  206. dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
  207. dma->rx_addr);
  208. dma_release_channel(dma->rxchan);
  209. dma->rxchan = NULL;
  210. /* Release TX resources */
  211. dmaengine_terminate_sync(dma->txchan);
  212. dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
  213. UART_XMIT_SIZE, DMA_TO_DEVICE);
  214. dma_release_channel(dma->txchan);
  215. dma->txchan = NULL;
  216. dma->tx_running = 0;
  217. dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
  218. }
  219. EXPORT_SYMBOL_GPL(serial8250_release_dma);