8250_mid.c 8.5 KB

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  1. /*
  2. * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
  3. *
  4. * Copyright (C) 2015 Intel Corporation
  5. * Author: Heikki Krogerus <[email protected]>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/bitops.h>
  12. #include <linux/module.h>
  13. #include <linux/pci.h>
  14. #include <linux/rational.h>
  15. #include <linux/dma/hsu.h>
  16. #include <linux/8250_pci.h>
  17. #include "8250.h"
  18. #define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b
  19. #define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c
  20. #define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d
  21. #define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191
  22. #define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8
  23. /* Intel MID Specific registers */
  24. #define INTEL_MID_UART_DNV_FISR 0x08
  25. #define INTEL_MID_UART_PS 0x30
  26. #define INTEL_MID_UART_MUL 0x34
  27. #define INTEL_MID_UART_DIV 0x38
  28. struct mid8250;
  29. struct mid8250_board {
  30. unsigned int flags;
  31. unsigned long freq;
  32. unsigned int base_baud;
  33. int (*setup)(struct mid8250 *, struct uart_port *p);
  34. void (*exit)(struct mid8250 *);
  35. };
  36. struct mid8250 {
  37. int line;
  38. int dma_index;
  39. struct pci_dev *dma_dev;
  40. struct uart_8250_dma dma;
  41. struct mid8250_board *board;
  42. struct hsu_dma_chip dma_chip;
  43. };
  44. /*****************************************************************************/
  45. static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
  46. {
  47. struct pci_dev *pdev = to_pci_dev(p->dev);
  48. switch (pdev->device) {
  49. case PCI_DEVICE_ID_INTEL_PNW_UART1:
  50. mid->dma_index = 0;
  51. break;
  52. case PCI_DEVICE_ID_INTEL_PNW_UART2:
  53. mid->dma_index = 1;
  54. break;
  55. case PCI_DEVICE_ID_INTEL_PNW_UART3:
  56. mid->dma_index = 2;
  57. break;
  58. default:
  59. return -EINVAL;
  60. }
  61. mid->dma_dev = pci_get_slot(pdev->bus,
  62. PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
  63. return 0;
  64. }
  65. static int tng_setup(struct mid8250 *mid, struct uart_port *p)
  66. {
  67. struct pci_dev *pdev = to_pci_dev(p->dev);
  68. int index = PCI_FUNC(pdev->devfn);
  69. /*
  70. * Device 0000:00:04.0 is not a real HSU port. It provides a global
  71. * register set for all HSU ports, although it has the same PCI ID.
  72. * Skip it here.
  73. */
  74. if (index-- == 0)
  75. return -ENODEV;
  76. mid->dma_index = index;
  77. mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
  78. return 0;
  79. }
  80. static int dnv_handle_irq(struct uart_port *p)
  81. {
  82. struct mid8250 *mid = p->private_data;
  83. struct uart_8250_port *up = up_to_u8250p(p);
  84. unsigned int fisr = serial_port_in(p, INTEL_MID_UART_DNV_FISR);
  85. u32 status;
  86. int ret = 0;
  87. int err;
  88. if (fisr & BIT(2)) {
  89. err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
  90. if (err > 0) {
  91. serial8250_rx_dma_flush(up);
  92. ret |= 1;
  93. } else if (err == 0)
  94. ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
  95. }
  96. if (fisr & BIT(1)) {
  97. err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
  98. if (err > 0)
  99. ret |= 1;
  100. else if (err == 0)
  101. ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status);
  102. }
  103. if (fisr & BIT(0))
  104. ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
  105. return IRQ_RETVAL(ret);
  106. }
  107. #define DNV_DMA_CHAN_OFFSET 0x80
  108. static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
  109. {
  110. struct hsu_dma_chip *chip = &mid->dma_chip;
  111. struct pci_dev *pdev = to_pci_dev(p->dev);
  112. unsigned int bar = FL_GET_BASE(mid->board->flags);
  113. int ret;
  114. chip->dev = &pdev->dev;
  115. chip->irq = pdev->irq;
  116. chip->regs = p->membase;
  117. chip->length = pci_resource_len(pdev, bar);
  118. chip->offset = DNV_DMA_CHAN_OFFSET;
  119. /* Falling back to PIO mode if DMA probing fails */
  120. ret = hsu_dma_probe(chip);
  121. if (ret)
  122. return 0;
  123. mid->dma_dev = pdev;
  124. p->handle_irq = dnv_handle_irq;
  125. return 0;
  126. }
  127. static void dnv_exit(struct mid8250 *mid)
  128. {
  129. if (!mid->dma_dev)
  130. return;
  131. hsu_dma_remove(&mid->dma_chip);
  132. }
  133. /*****************************************************************************/
  134. static void mid8250_set_termios(struct uart_port *p,
  135. struct ktermios *termios,
  136. struct ktermios *old)
  137. {
  138. unsigned int baud = tty_termios_baud_rate(termios);
  139. struct mid8250 *mid = p->private_data;
  140. unsigned short ps = 16;
  141. unsigned long fuart = baud * ps;
  142. unsigned long w = BIT(24) - 1;
  143. unsigned long mul, div;
  144. /* Gracefully handle the B0 case: fall back to B9600 */
  145. fuart = fuart ? fuart : 9600 * 16;
  146. if (mid->board->freq < fuart) {
  147. /* Find prescaler value that satisfies Fuart < Fref */
  148. if (mid->board->freq > baud)
  149. ps = mid->board->freq / baud; /* baud rate too high */
  150. else
  151. ps = 1; /* PLL case */
  152. fuart = baud * ps;
  153. } else {
  154. /* Get Fuart closer to Fref */
  155. fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
  156. }
  157. rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
  158. p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */
  159. writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */
  160. writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */
  161. writel(div, p->membase + INTEL_MID_UART_DIV);
  162. serial8250_do_set_termios(p, termios, old);
  163. }
  164. static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
  165. {
  166. struct hsu_dma_slave *s = param;
  167. if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
  168. return false;
  169. chan->private = s;
  170. return true;
  171. }
  172. static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
  173. {
  174. struct uart_8250_dma *dma = &mid->dma;
  175. struct device *dev = port->port.dev;
  176. struct hsu_dma_slave *rx_param;
  177. struct hsu_dma_slave *tx_param;
  178. if (!mid->dma_dev)
  179. return 0;
  180. rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
  181. if (!rx_param)
  182. return -ENOMEM;
  183. tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
  184. if (!tx_param)
  185. return -ENOMEM;
  186. rx_param->chan_id = mid->dma_index * 2 + 1;
  187. tx_param->chan_id = mid->dma_index * 2;
  188. dma->rxconf.src_maxburst = 64;
  189. dma->txconf.dst_maxburst = 64;
  190. rx_param->dma_dev = &mid->dma_dev->dev;
  191. tx_param->dma_dev = &mid->dma_dev->dev;
  192. dma->fn = mid8250_dma_filter;
  193. dma->rx_param = rx_param;
  194. dma->tx_param = tx_param;
  195. port->dma = dma;
  196. return 0;
  197. }
  198. static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  199. {
  200. struct uart_8250_port uart;
  201. struct mid8250 *mid;
  202. unsigned int bar;
  203. int ret;
  204. ret = pcim_enable_device(pdev);
  205. if (ret)
  206. return ret;
  207. pci_set_master(pdev);
  208. mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
  209. if (!mid)
  210. return -ENOMEM;
  211. mid->board = (struct mid8250_board *)id->driver_data;
  212. bar = FL_GET_BASE(mid->board->flags);
  213. memset(&uart, 0, sizeof(struct uart_8250_port));
  214. uart.port.dev = &pdev->dev;
  215. uart.port.irq = pdev->irq;
  216. uart.port.private_data = mid;
  217. uart.port.type = PORT_16750;
  218. uart.port.iotype = UPIO_MEM;
  219. uart.port.uartclk = mid->board->base_baud * 16;
  220. uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
  221. uart.port.set_termios = mid8250_set_termios;
  222. uart.port.mapbase = pci_resource_start(pdev, bar);
  223. uart.port.membase = pcim_iomap(pdev, bar, 0);
  224. if (!uart.port.membase)
  225. return -ENOMEM;
  226. if (mid->board->setup) {
  227. ret = mid->board->setup(mid, &uart.port);
  228. if (ret)
  229. return ret;
  230. }
  231. ret = mid8250_dma_setup(mid, &uart);
  232. if (ret)
  233. goto err;
  234. ret = serial8250_register_8250_port(&uart);
  235. if (ret < 0)
  236. goto err;
  237. mid->line = ret;
  238. pci_set_drvdata(pdev, mid);
  239. return 0;
  240. err:
  241. if (mid->board->exit)
  242. mid->board->exit(mid);
  243. return ret;
  244. }
  245. static void mid8250_remove(struct pci_dev *pdev)
  246. {
  247. struct mid8250 *mid = pci_get_drvdata(pdev);
  248. if (mid->board->exit)
  249. mid->board->exit(mid);
  250. serial8250_unregister_port(mid->line);
  251. }
  252. static const struct mid8250_board pnw_board = {
  253. .flags = FL_BASE0,
  254. .freq = 50000000,
  255. .base_baud = 115200,
  256. .setup = pnw_setup,
  257. };
  258. static const struct mid8250_board tng_board = {
  259. .flags = FL_BASE0,
  260. .freq = 38400000,
  261. .base_baud = 1843200,
  262. .setup = tng_setup,
  263. };
  264. static const struct mid8250_board dnv_board = {
  265. .flags = FL_BASE1,
  266. .freq = 133333333,
  267. .base_baud = 115200,
  268. .setup = dnv_setup,
  269. .exit = dnv_exit,
  270. };
  271. #define MID_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }
  272. static const struct pci_device_id pci_ids[] = {
  273. MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART1, pnw_board),
  274. MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART2, pnw_board),
  275. MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART3, pnw_board),
  276. MID_DEVICE(PCI_DEVICE_ID_INTEL_TNG_UART, tng_board),
  277. MID_DEVICE(PCI_DEVICE_ID_INTEL_DNV_UART, dnv_board),
  278. { },
  279. };
  280. MODULE_DEVICE_TABLE(pci, pci_ids);
  281. static struct pci_driver mid8250_pci_driver = {
  282. .name = "8250_mid",
  283. .id_table = pci_ids,
  284. .probe = mid8250_probe,
  285. .remove = mid8250_remove,
  286. };
  287. module_pci_driver(mid8250_pci_driver);
  288. MODULE_AUTHOR("Intel Corporation");
  289. MODULE_LICENSE("GPL v2");
  290. MODULE_DESCRIPTION("Intel MID UART driver");