vfio_pci.c 38 KB

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  1. /*
  2. * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
  3. * Author: Alex Williamson <[email protected]>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * Derived from original vfio:
  10. * Copyright 2010 Cisco Systems, Inc. All rights reserved.
  11. * Author: Tom Lyon, [email protected]
  12. */
  13. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14. #include <linux/device.h>
  15. #include <linux/eventfd.h>
  16. #include <linux/file.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/iommu.h>
  19. #include <linux/module.h>
  20. #include <linux/mutex.h>
  21. #include <linux/notifier.h>
  22. #include <linux/pci.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/slab.h>
  25. #include <linux/types.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/vfio.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/nospec.h>
  30. #include "vfio_pci_private.h"
  31. #define DRIVER_VERSION "0.2"
  32. #define DRIVER_AUTHOR "Alex Williamson <[email protected]>"
  33. #define DRIVER_DESC "VFIO PCI - User Level meta-driver"
  34. static char ids[1024] __initdata;
  35. module_param_string(ids, ids, sizeof(ids), 0);
  36. MODULE_PARM_DESC(ids, "Initial PCI IDs to add to the vfio driver, format is \"vendor:device[:subvendor[:subdevice[:class[:class_mask]]]]\" and multiple comma separated entries can be specified");
  37. static bool nointxmask;
  38. module_param_named(nointxmask, nointxmask, bool, S_IRUGO | S_IWUSR);
  39. MODULE_PARM_DESC(nointxmask,
  40. "Disable support for PCI 2.3 style INTx masking. If this resolves problems for specific devices, report lspci -vvvxxx to [email protected] so the device can be fixed automatically via the broken_intx_masking flag.");
  41. #ifdef CONFIG_VFIO_PCI_VGA
  42. static bool disable_vga;
  43. module_param(disable_vga, bool, S_IRUGO);
  44. MODULE_PARM_DESC(disable_vga, "Disable VGA resource access through vfio-pci");
  45. #endif
  46. static bool disable_idle_d3;
  47. module_param(disable_idle_d3, bool, S_IRUGO | S_IWUSR);
  48. MODULE_PARM_DESC(disable_idle_d3,
  49. "Disable using the PCI D3 low power state for idle, unused devices");
  50. static DEFINE_MUTEX(driver_lock);
  51. static inline bool vfio_vga_disabled(void)
  52. {
  53. #ifdef CONFIG_VFIO_PCI_VGA
  54. return disable_vga;
  55. #else
  56. return true;
  57. #endif
  58. }
  59. /*
  60. * Our VGA arbiter participation is limited since we don't know anything
  61. * about the device itself. However, if the device is the only VGA device
  62. * downstream of a bridge and VFIO VGA support is disabled, then we can
  63. * safely return legacy VGA IO and memory as not decoded since the user
  64. * has no way to get to it and routing can be disabled externally at the
  65. * bridge.
  66. */
  67. static unsigned int vfio_pci_set_vga_decode(void *opaque, bool single_vga)
  68. {
  69. struct vfio_pci_device *vdev = opaque;
  70. struct pci_dev *tmp = NULL, *pdev = vdev->pdev;
  71. unsigned char max_busnr;
  72. unsigned int decodes;
  73. if (single_vga || !vfio_vga_disabled() || pci_is_root_bus(pdev->bus))
  74. return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  75. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  76. max_busnr = pci_bus_max_busnr(pdev->bus);
  77. decodes = VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
  78. while ((tmp = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, tmp)) != NULL) {
  79. if (tmp == pdev ||
  80. pci_domain_nr(tmp->bus) != pci_domain_nr(pdev->bus) ||
  81. pci_is_root_bus(tmp->bus))
  82. continue;
  83. if (tmp->bus->number >= pdev->bus->number &&
  84. tmp->bus->number <= max_busnr) {
  85. pci_dev_put(tmp);
  86. decodes |= VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM;
  87. break;
  88. }
  89. }
  90. return decodes;
  91. }
  92. static inline bool vfio_pci_is_vga(struct pci_dev *pdev)
  93. {
  94. return (pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA;
  95. }
  96. static void vfio_pci_probe_mmaps(struct vfio_pci_device *vdev)
  97. {
  98. struct resource *res;
  99. int bar;
  100. struct vfio_pci_dummy_resource *dummy_res;
  101. INIT_LIST_HEAD(&vdev->dummy_resources_list);
  102. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  103. res = vdev->pdev->resource + bar;
  104. if (!IS_ENABLED(CONFIG_VFIO_PCI_MMAP))
  105. goto no_mmap;
  106. if (!(res->flags & IORESOURCE_MEM))
  107. goto no_mmap;
  108. /*
  109. * The PCI core shouldn't set up a resource with a
  110. * type but zero size. But there may be bugs that
  111. * cause us to do that.
  112. */
  113. if (!resource_size(res))
  114. goto no_mmap;
  115. if (resource_size(res) >= PAGE_SIZE) {
  116. vdev->bar_mmap_supported[bar] = true;
  117. continue;
  118. }
  119. if (!(res->start & ~PAGE_MASK)) {
  120. /*
  121. * Add a dummy resource to reserve the remainder
  122. * of the exclusive page in case that hot-add
  123. * device's bar is assigned into it.
  124. */
  125. dummy_res = kzalloc(sizeof(*dummy_res), GFP_KERNEL);
  126. if (dummy_res == NULL)
  127. goto no_mmap;
  128. dummy_res->resource.name = "vfio sub-page reserved";
  129. dummy_res->resource.start = res->end + 1;
  130. dummy_res->resource.end = res->start + PAGE_SIZE - 1;
  131. dummy_res->resource.flags = res->flags;
  132. if (request_resource(res->parent,
  133. &dummy_res->resource)) {
  134. kfree(dummy_res);
  135. goto no_mmap;
  136. }
  137. dummy_res->index = bar;
  138. list_add(&dummy_res->res_next,
  139. &vdev->dummy_resources_list);
  140. vdev->bar_mmap_supported[bar] = true;
  141. continue;
  142. }
  143. /*
  144. * Here we don't handle the case when the BAR is not page
  145. * aligned because we can't expect the BAR will be
  146. * assigned into the same location in a page in guest
  147. * when we passthrough the BAR. And it's hard to access
  148. * this BAR in userspace because we have no way to get
  149. * the BAR's location in a page.
  150. */
  151. no_mmap:
  152. vdev->bar_mmap_supported[bar] = false;
  153. }
  154. }
  155. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev);
  156. static void vfio_pci_disable(struct vfio_pci_device *vdev);
  157. /*
  158. * INTx masking requires the ability to disable INTx signaling via PCI_COMMAND
  159. * _and_ the ability detect when the device is asserting INTx via PCI_STATUS.
  160. * If a device implements the former but not the latter we would typically
  161. * expect broken_intx_masking be set and require an exclusive interrupt.
  162. * However since we do have control of the device's ability to assert INTx,
  163. * we can instead pretend that the device does not implement INTx, virtualizing
  164. * the pin register to report zero and maintaining DisINTx set on the host.
  165. */
  166. static bool vfio_pci_nointx(struct pci_dev *pdev)
  167. {
  168. switch (pdev->vendor) {
  169. case PCI_VENDOR_ID_INTEL:
  170. switch (pdev->device) {
  171. /* All i40e (XL710/X710) 10/20/40GbE NICs */
  172. case 0x1572:
  173. case 0x1574:
  174. case 0x1580 ... 0x1581:
  175. case 0x1583 ... 0x1589:
  176. case 0x37d0 ... 0x37d2:
  177. return true;
  178. default:
  179. return false;
  180. }
  181. }
  182. return false;
  183. }
  184. static int vfio_pci_enable(struct vfio_pci_device *vdev)
  185. {
  186. struct pci_dev *pdev = vdev->pdev;
  187. int ret;
  188. u16 cmd;
  189. u8 msix_pos;
  190. pci_set_power_state(pdev, PCI_D0);
  191. /* Don't allow our initial saved state to include busmaster */
  192. pci_clear_master(pdev);
  193. ret = pci_enable_device(pdev);
  194. if (ret)
  195. return ret;
  196. vdev->reset_works = (pci_reset_function(pdev) == 0);
  197. pci_save_state(pdev);
  198. vdev->pci_saved_state = pci_store_saved_state(pdev);
  199. if (!vdev->pci_saved_state)
  200. pr_debug("%s: Couldn't store %s saved state\n",
  201. __func__, dev_name(&pdev->dev));
  202. if (likely(!nointxmask)) {
  203. if (vfio_pci_nointx(pdev)) {
  204. dev_info(&pdev->dev, "Masking broken INTx support\n");
  205. vdev->nointx = true;
  206. pci_intx(pdev, 0);
  207. } else
  208. vdev->pci_2_3 = pci_intx_mask_supported(pdev);
  209. }
  210. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  211. if (vdev->pci_2_3 && (cmd & PCI_COMMAND_INTX_DISABLE)) {
  212. cmd &= ~PCI_COMMAND_INTX_DISABLE;
  213. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  214. }
  215. ret = vfio_config_init(vdev);
  216. if (ret) {
  217. kfree(vdev->pci_saved_state);
  218. vdev->pci_saved_state = NULL;
  219. pci_disable_device(pdev);
  220. return ret;
  221. }
  222. msix_pos = pdev->msix_cap;
  223. if (msix_pos) {
  224. u16 flags;
  225. u32 table;
  226. pci_read_config_word(pdev, msix_pos + PCI_MSIX_FLAGS, &flags);
  227. pci_read_config_dword(pdev, msix_pos + PCI_MSIX_TABLE, &table);
  228. vdev->msix_bar = table & PCI_MSIX_TABLE_BIR;
  229. vdev->msix_offset = table & PCI_MSIX_TABLE_OFFSET;
  230. vdev->msix_size = ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) * 16;
  231. } else
  232. vdev->msix_bar = 0xFF;
  233. if (!vfio_vga_disabled() && vfio_pci_is_vga(pdev))
  234. vdev->has_vga = true;
  235. if (vfio_pci_is_vga(pdev) &&
  236. pdev->vendor == PCI_VENDOR_ID_INTEL &&
  237. IS_ENABLED(CONFIG_VFIO_PCI_IGD)) {
  238. ret = vfio_pci_igd_init(vdev);
  239. if (ret) {
  240. dev_warn(&vdev->pdev->dev,
  241. "Failed to setup Intel IGD regions\n");
  242. vfio_pci_disable(vdev);
  243. return ret;
  244. }
  245. }
  246. vfio_pci_probe_mmaps(vdev);
  247. return 0;
  248. }
  249. static void vfio_pci_disable(struct vfio_pci_device *vdev)
  250. {
  251. struct pci_dev *pdev = vdev->pdev;
  252. struct vfio_pci_dummy_resource *dummy_res, *tmp;
  253. int i, bar;
  254. /* Stop the device from further DMA */
  255. pci_clear_master(pdev);
  256. vfio_pci_set_irqs_ioctl(vdev, VFIO_IRQ_SET_DATA_NONE |
  257. VFIO_IRQ_SET_ACTION_TRIGGER,
  258. vdev->irq_type, 0, 0, NULL);
  259. vdev->virq_disabled = false;
  260. for (i = 0; i < vdev->num_regions; i++)
  261. vdev->region[i].ops->release(vdev, &vdev->region[i]);
  262. vdev->num_regions = 0;
  263. kfree(vdev->region);
  264. vdev->region = NULL; /* don't krealloc a freed pointer */
  265. vfio_config_free(vdev);
  266. for (bar = PCI_STD_RESOURCES; bar <= PCI_STD_RESOURCE_END; bar++) {
  267. if (!vdev->barmap[bar])
  268. continue;
  269. pci_iounmap(pdev, vdev->barmap[bar]);
  270. pci_release_selected_regions(pdev, 1 << bar);
  271. vdev->barmap[bar] = NULL;
  272. }
  273. list_for_each_entry_safe(dummy_res, tmp,
  274. &vdev->dummy_resources_list, res_next) {
  275. list_del(&dummy_res->res_next);
  276. release_resource(&dummy_res->resource);
  277. kfree(dummy_res);
  278. }
  279. vdev->needs_reset = true;
  280. /*
  281. * If we have saved state, restore it. If we can reset the device,
  282. * even better. Resetting with current state seems better than
  283. * nothing, but saving and restoring current state without reset
  284. * is just busy work.
  285. */
  286. if (pci_load_and_free_saved_state(pdev, &vdev->pci_saved_state)) {
  287. pr_info("%s: Couldn't reload %s saved state\n",
  288. __func__, dev_name(&pdev->dev));
  289. if (!vdev->reset_works)
  290. goto out;
  291. pci_save_state(pdev);
  292. }
  293. /*
  294. * Disable INTx and MSI, presumably to avoid spurious interrupts
  295. * during reset. Stolen from pci_reset_function()
  296. */
  297. pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
  298. /*
  299. * Try to get the locks ourselves to prevent a deadlock. The
  300. * success of this is dependent on being able to lock the device,
  301. * which is not always possible.
  302. * We can not use the "try" reset interface here, which will
  303. * overwrite the previously restored configuration information.
  304. */
  305. if (vdev->reset_works && pci_cfg_access_trylock(pdev)) {
  306. if (device_trylock(&pdev->dev)) {
  307. if (!__pci_reset_function_locked(pdev))
  308. vdev->needs_reset = false;
  309. device_unlock(&pdev->dev);
  310. }
  311. pci_cfg_access_unlock(pdev);
  312. }
  313. pci_restore_state(pdev);
  314. out:
  315. pci_disable_device(pdev);
  316. vfio_pci_try_bus_reset(vdev);
  317. if (!disable_idle_d3)
  318. pci_set_power_state(pdev, PCI_D3hot);
  319. }
  320. static void vfio_pci_release(void *device_data)
  321. {
  322. struct vfio_pci_device *vdev = device_data;
  323. mutex_lock(&driver_lock);
  324. if (!(--vdev->refcnt)) {
  325. vfio_spapr_pci_eeh_release(vdev->pdev);
  326. vfio_pci_disable(vdev);
  327. }
  328. mutex_unlock(&driver_lock);
  329. module_put(THIS_MODULE);
  330. }
  331. static int vfio_pci_open(void *device_data)
  332. {
  333. struct vfio_pci_device *vdev = device_data;
  334. int ret = 0;
  335. if (!try_module_get(THIS_MODULE))
  336. return -ENODEV;
  337. mutex_lock(&driver_lock);
  338. if (!vdev->refcnt) {
  339. ret = vfio_pci_enable(vdev);
  340. if (ret)
  341. goto error;
  342. vfio_spapr_pci_eeh_open(vdev->pdev);
  343. }
  344. vdev->refcnt++;
  345. error:
  346. mutex_unlock(&driver_lock);
  347. if (ret)
  348. module_put(THIS_MODULE);
  349. return ret;
  350. }
  351. static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
  352. {
  353. if (irq_type == VFIO_PCI_INTX_IRQ_INDEX) {
  354. u8 pin;
  355. pci_read_config_byte(vdev->pdev, PCI_INTERRUPT_PIN, &pin);
  356. if (IS_ENABLED(CONFIG_VFIO_PCI_INTX) && !vdev->nointx && pin)
  357. return 1;
  358. } else if (irq_type == VFIO_PCI_MSI_IRQ_INDEX) {
  359. u8 pos;
  360. u16 flags;
  361. pos = vdev->pdev->msi_cap;
  362. if (pos) {
  363. pci_read_config_word(vdev->pdev,
  364. pos + PCI_MSI_FLAGS, &flags);
  365. return 1 << ((flags & PCI_MSI_FLAGS_QMASK) >> 1);
  366. }
  367. } else if (irq_type == VFIO_PCI_MSIX_IRQ_INDEX) {
  368. u8 pos;
  369. u16 flags;
  370. pos = vdev->pdev->msix_cap;
  371. if (pos) {
  372. pci_read_config_word(vdev->pdev,
  373. pos + PCI_MSIX_FLAGS, &flags);
  374. return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
  375. }
  376. } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
  377. if (pci_is_pcie(vdev->pdev))
  378. return 1;
  379. } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
  380. return 1;
  381. }
  382. return 0;
  383. }
  384. static int vfio_pci_count_devs(struct pci_dev *pdev, void *data)
  385. {
  386. (*(int *)data)++;
  387. return 0;
  388. }
  389. struct vfio_pci_fill_info {
  390. int max;
  391. int cur;
  392. struct vfio_pci_dependent_device *devices;
  393. };
  394. static int vfio_pci_fill_devs(struct pci_dev *pdev, void *data)
  395. {
  396. struct vfio_pci_fill_info *fill = data;
  397. struct iommu_group *iommu_group;
  398. if (fill->cur == fill->max)
  399. return -EAGAIN; /* Something changed, try again */
  400. iommu_group = iommu_group_get(&pdev->dev);
  401. if (!iommu_group)
  402. return -EPERM; /* Cannot reset non-isolated devices */
  403. fill->devices[fill->cur].group_id = iommu_group_id(iommu_group);
  404. fill->devices[fill->cur].segment = pci_domain_nr(pdev->bus);
  405. fill->devices[fill->cur].bus = pdev->bus->number;
  406. fill->devices[fill->cur].devfn = pdev->devfn;
  407. fill->cur++;
  408. iommu_group_put(iommu_group);
  409. return 0;
  410. }
  411. struct vfio_pci_group_entry {
  412. struct vfio_group *group;
  413. int id;
  414. };
  415. struct vfio_pci_group_info {
  416. int count;
  417. struct vfio_pci_group_entry *groups;
  418. };
  419. static int vfio_pci_validate_devs(struct pci_dev *pdev, void *data)
  420. {
  421. struct vfio_pci_group_info *info = data;
  422. struct iommu_group *group;
  423. int id, i;
  424. group = iommu_group_get(&pdev->dev);
  425. if (!group)
  426. return -EPERM;
  427. id = iommu_group_id(group);
  428. for (i = 0; i < info->count; i++)
  429. if (info->groups[i].id == id)
  430. break;
  431. iommu_group_put(group);
  432. return (i == info->count) ? -EINVAL : 0;
  433. }
  434. static bool vfio_pci_dev_below_slot(struct pci_dev *pdev, struct pci_slot *slot)
  435. {
  436. for (; pdev; pdev = pdev->bus->self)
  437. if (pdev->bus == slot->bus)
  438. return (pdev->slot == slot);
  439. return false;
  440. }
  441. struct vfio_pci_walk_info {
  442. int (*fn)(struct pci_dev *, void *data);
  443. void *data;
  444. struct pci_dev *pdev;
  445. bool slot;
  446. int ret;
  447. };
  448. static int vfio_pci_walk_wrapper(struct pci_dev *pdev, void *data)
  449. {
  450. struct vfio_pci_walk_info *walk = data;
  451. if (!walk->slot || vfio_pci_dev_below_slot(pdev, walk->pdev->slot))
  452. walk->ret = walk->fn(pdev, walk->data);
  453. return walk->ret;
  454. }
  455. static int vfio_pci_for_each_slot_or_bus(struct pci_dev *pdev,
  456. int (*fn)(struct pci_dev *,
  457. void *data), void *data,
  458. bool slot)
  459. {
  460. struct vfio_pci_walk_info walk = {
  461. .fn = fn, .data = data, .pdev = pdev, .slot = slot, .ret = 0,
  462. };
  463. pci_walk_bus(pdev->bus, vfio_pci_walk_wrapper, &walk);
  464. return walk.ret;
  465. }
  466. static int msix_sparse_mmap_cap(struct vfio_pci_device *vdev,
  467. struct vfio_info_cap *caps)
  468. {
  469. struct vfio_info_cap_header *header;
  470. struct vfio_region_info_cap_sparse_mmap *sparse;
  471. size_t end, size;
  472. int nr_areas = 2, i = 0;
  473. end = pci_resource_len(vdev->pdev, vdev->msix_bar);
  474. /* If MSI-X table is aligned to the start or end, only one area */
  475. if (((vdev->msix_offset & PAGE_MASK) == 0) ||
  476. (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) >= end))
  477. nr_areas = 1;
  478. size = sizeof(*sparse) + (nr_areas * sizeof(*sparse->areas));
  479. header = vfio_info_cap_add(caps, size,
  480. VFIO_REGION_INFO_CAP_SPARSE_MMAP, 1);
  481. if (IS_ERR(header))
  482. return PTR_ERR(header);
  483. sparse = container_of(header,
  484. struct vfio_region_info_cap_sparse_mmap, header);
  485. sparse->nr_areas = nr_areas;
  486. if (vdev->msix_offset & PAGE_MASK) {
  487. sparse->areas[i].offset = 0;
  488. sparse->areas[i].size = vdev->msix_offset & PAGE_MASK;
  489. i++;
  490. }
  491. if (PAGE_ALIGN(vdev->msix_offset + vdev->msix_size) < end) {
  492. sparse->areas[i].offset = PAGE_ALIGN(vdev->msix_offset +
  493. vdev->msix_size);
  494. sparse->areas[i].size = end - sparse->areas[i].offset;
  495. i++;
  496. }
  497. return 0;
  498. }
  499. static int region_type_cap(struct vfio_pci_device *vdev,
  500. struct vfio_info_cap *caps,
  501. unsigned int type, unsigned int subtype)
  502. {
  503. struct vfio_info_cap_header *header;
  504. struct vfio_region_info_cap_type *cap;
  505. header = vfio_info_cap_add(caps, sizeof(*cap),
  506. VFIO_REGION_INFO_CAP_TYPE, 1);
  507. if (IS_ERR(header))
  508. return PTR_ERR(header);
  509. cap = container_of(header, struct vfio_region_info_cap_type, header);
  510. cap->type = type;
  511. cap->subtype = subtype;
  512. return 0;
  513. }
  514. int vfio_pci_register_dev_region(struct vfio_pci_device *vdev,
  515. unsigned int type, unsigned int subtype,
  516. const struct vfio_pci_regops *ops,
  517. size_t size, u32 flags, void *data)
  518. {
  519. struct vfio_pci_region *region;
  520. region = krealloc(vdev->region,
  521. (vdev->num_regions + 1) * sizeof(*region),
  522. GFP_KERNEL);
  523. if (!region)
  524. return -ENOMEM;
  525. vdev->region = region;
  526. vdev->region[vdev->num_regions].type = type;
  527. vdev->region[vdev->num_regions].subtype = subtype;
  528. vdev->region[vdev->num_regions].ops = ops;
  529. vdev->region[vdev->num_regions].size = size;
  530. vdev->region[vdev->num_regions].flags = flags;
  531. vdev->region[vdev->num_regions].data = data;
  532. vdev->num_regions++;
  533. return 0;
  534. }
  535. static long vfio_pci_ioctl(void *device_data,
  536. unsigned int cmd, unsigned long arg)
  537. {
  538. struct vfio_pci_device *vdev = device_data;
  539. unsigned long minsz;
  540. if (cmd == VFIO_DEVICE_GET_INFO) {
  541. struct vfio_device_info info;
  542. minsz = offsetofend(struct vfio_device_info, num_irqs);
  543. if (copy_from_user(&info, (void __user *)arg, minsz))
  544. return -EFAULT;
  545. if (info.argsz < minsz)
  546. return -EINVAL;
  547. info.flags = VFIO_DEVICE_FLAGS_PCI;
  548. if (vdev->reset_works)
  549. info.flags |= VFIO_DEVICE_FLAGS_RESET;
  550. info.num_regions = VFIO_PCI_NUM_REGIONS + vdev->num_regions;
  551. info.num_irqs = VFIO_PCI_NUM_IRQS;
  552. return copy_to_user((void __user *)arg, &info, minsz) ?
  553. -EFAULT : 0;
  554. } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
  555. struct pci_dev *pdev = vdev->pdev;
  556. struct vfio_region_info info;
  557. struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
  558. int i, ret;
  559. minsz = offsetofend(struct vfio_region_info, offset);
  560. if (copy_from_user(&info, (void __user *)arg, minsz))
  561. return -EFAULT;
  562. if (info.argsz < minsz)
  563. return -EINVAL;
  564. switch (info.index) {
  565. case VFIO_PCI_CONFIG_REGION_INDEX:
  566. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  567. info.size = pdev->cfg_size;
  568. info.flags = VFIO_REGION_INFO_FLAG_READ |
  569. VFIO_REGION_INFO_FLAG_WRITE;
  570. break;
  571. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  572. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  573. info.size = pci_resource_len(pdev, info.index);
  574. if (!info.size) {
  575. info.flags = 0;
  576. break;
  577. }
  578. info.flags = VFIO_REGION_INFO_FLAG_READ |
  579. VFIO_REGION_INFO_FLAG_WRITE;
  580. if (vdev->bar_mmap_supported[info.index]) {
  581. info.flags |= VFIO_REGION_INFO_FLAG_MMAP;
  582. if (info.index == vdev->msix_bar) {
  583. ret = msix_sparse_mmap_cap(vdev, &caps);
  584. if (ret)
  585. return ret;
  586. }
  587. }
  588. break;
  589. case VFIO_PCI_ROM_REGION_INDEX:
  590. {
  591. void __iomem *io;
  592. size_t size;
  593. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  594. info.flags = 0;
  595. /* Report the BAR size, not the ROM size */
  596. info.size = pci_resource_len(pdev, info.index);
  597. if (!info.size) {
  598. /* Shadow ROMs appear as PCI option ROMs */
  599. if (pdev->resource[PCI_ROM_RESOURCE].flags &
  600. IORESOURCE_ROM_SHADOW)
  601. info.size = 0x20000;
  602. else
  603. break;
  604. }
  605. /* Is it really there? */
  606. io = pci_map_rom(pdev, &size);
  607. if (!io || !size) {
  608. info.size = 0;
  609. break;
  610. }
  611. pci_unmap_rom(pdev, io);
  612. info.flags = VFIO_REGION_INFO_FLAG_READ;
  613. break;
  614. }
  615. case VFIO_PCI_VGA_REGION_INDEX:
  616. if (!vdev->has_vga)
  617. return -EINVAL;
  618. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  619. info.size = 0xc0000;
  620. info.flags = VFIO_REGION_INFO_FLAG_READ |
  621. VFIO_REGION_INFO_FLAG_WRITE;
  622. break;
  623. default:
  624. if (info.index >=
  625. VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  626. return -EINVAL;
  627. info.index = array_index_nospec(info.index,
  628. VFIO_PCI_NUM_REGIONS +
  629. vdev->num_regions);
  630. i = info.index - VFIO_PCI_NUM_REGIONS;
  631. info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
  632. info.size = vdev->region[i].size;
  633. info.flags = vdev->region[i].flags;
  634. ret = region_type_cap(vdev, &caps,
  635. vdev->region[i].type,
  636. vdev->region[i].subtype);
  637. if (ret)
  638. return ret;
  639. }
  640. if (caps.size) {
  641. info.flags |= VFIO_REGION_INFO_FLAG_CAPS;
  642. if (info.argsz < sizeof(info) + caps.size) {
  643. info.argsz = sizeof(info) + caps.size;
  644. info.cap_offset = 0;
  645. } else {
  646. vfio_info_cap_shift(&caps, sizeof(info));
  647. if (copy_to_user((void __user *)arg +
  648. sizeof(info), caps.buf,
  649. caps.size)) {
  650. kfree(caps.buf);
  651. return -EFAULT;
  652. }
  653. info.cap_offset = sizeof(info);
  654. }
  655. kfree(caps.buf);
  656. }
  657. return copy_to_user((void __user *)arg, &info, minsz) ?
  658. -EFAULT : 0;
  659. } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
  660. struct vfio_irq_info info;
  661. minsz = offsetofend(struct vfio_irq_info, count);
  662. if (copy_from_user(&info, (void __user *)arg, minsz))
  663. return -EFAULT;
  664. if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
  665. return -EINVAL;
  666. switch (info.index) {
  667. case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
  668. case VFIO_PCI_REQ_IRQ_INDEX:
  669. break;
  670. case VFIO_PCI_ERR_IRQ_INDEX:
  671. if (pci_is_pcie(vdev->pdev))
  672. break;
  673. /* pass thru to return error */
  674. default:
  675. return -EINVAL;
  676. }
  677. info.flags = VFIO_IRQ_INFO_EVENTFD;
  678. info.count = vfio_pci_get_irq_count(vdev, info.index);
  679. if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
  680. info.flags |= (VFIO_IRQ_INFO_MASKABLE |
  681. VFIO_IRQ_INFO_AUTOMASKED);
  682. else
  683. info.flags |= VFIO_IRQ_INFO_NORESIZE;
  684. return copy_to_user((void __user *)arg, &info, minsz) ?
  685. -EFAULT : 0;
  686. } else if (cmd == VFIO_DEVICE_SET_IRQS) {
  687. struct vfio_irq_set hdr;
  688. size_t size;
  689. u8 *data = NULL;
  690. int max, ret = 0;
  691. minsz = offsetofend(struct vfio_irq_set, count);
  692. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  693. return -EFAULT;
  694. if (hdr.argsz < minsz || hdr.index >= VFIO_PCI_NUM_IRQS ||
  695. hdr.count >= (U32_MAX - hdr.start) ||
  696. hdr.flags & ~(VFIO_IRQ_SET_DATA_TYPE_MASK |
  697. VFIO_IRQ_SET_ACTION_TYPE_MASK))
  698. return -EINVAL;
  699. max = vfio_pci_get_irq_count(vdev, hdr.index);
  700. if (hdr.start >= max || hdr.start + hdr.count > max)
  701. return -EINVAL;
  702. switch (hdr.flags & VFIO_IRQ_SET_DATA_TYPE_MASK) {
  703. case VFIO_IRQ_SET_DATA_NONE:
  704. size = 0;
  705. break;
  706. case VFIO_IRQ_SET_DATA_BOOL:
  707. size = sizeof(uint8_t);
  708. break;
  709. case VFIO_IRQ_SET_DATA_EVENTFD:
  710. size = sizeof(int32_t);
  711. break;
  712. default:
  713. return -EINVAL;
  714. }
  715. if (size) {
  716. if (hdr.argsz - minsz < hdr.count * size)
  717. return -EINVAL;
  718. data = memdup_user((void __user *)(arg + minsz),
  719. hdr.count * size);
  720. if (IS_ERR(data))
  721. return PTR_ERR(data);
  722. }
  723. mutex_lock(&vdev->igate);
  724. ret = vfio_pci_set_irqs_ioctl(vdev, hdr.flags, hdr.index,
  725. hdr.start, hdr.count, data);
  726. mutex_unlock(&vdev->igate);
  727. kfree(data);
  728. return ret;
  729. } else if (cmd == VFIO_DEVICE_RESET) {
  730. return vdev->reset_works ?
  731. pci_try_reset_function(vdev->pdev) : -EINVAL;
  732. } else if (cmd == VFIO_DEVICE_GET_PCI_HOT_RESET_INFO) {
  733. struct vfio_pci_hot_reset_info hdr;
  734. struct vfio_pci_fill_info fill = { 0 };
  735. struct vfio_pci_dependent_device *devices = NULL;
  736. bool slot = false;
  737. int ret = 0;
  738. minsz = offsetofend(struct vfio_pci_hot_reset_info, count);
  739. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  740. return -EFAULT;
  741. if (hdr.argsz < minsz)
  742. return -EINVAL;
  743. hdr.flags = 0;
  744. /* Can we do a slot or bus reset or neither? */
  745. if (!pci_probe_reset_slot(vdev->pdev->slot))
  746. slot = true;
  747. else if (pci_probe_reset_bus(vdev->pdev->bus))
  748. return -ENODEV;
  749. /* How many devices are affected? */
  750. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  751. vfio_pci_count_devs,
  752. &fill.max, slot);
  753. if (ret)
  754. return ret;
  755. WARN_ON(!fill.max); /* Should always be at least one */
  756. /*
  757. * If there's enough space, fill it now, otherwise return
  758. * -ENOSPC and the number of devices affected.
  759. */
  760. if (hdr.argsz < sizeof(hdr) + (fill.max * sizeof(*devices))) {
  761. ret = -ENOSPC;
  762. hdr.count = fill.max;
  763. goto reset_info_exit;
  764. }
  765. devices = kcalloc(fill.max, sizeof(*devices), GFP_KERNEL);
  766. if (!devices)
  767. return -ENOMEM;
  768. fill.devices = devices;
  769. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  770. vfio_pci_fill_devs,
  771. &fill, slot);
  772. /*
  773. * If a device was removed between counting and filling,
  774. * we may come up short of fill.max. If a device was
  775. * added, we'll have a return of -EAGAIN above.
  776. */
  777. if (!ret)
  778. hdr.count = fill.cur;
  779. reset_info_exit:
  780. if (copy_to_user((void __user *)arg, &hdr, minsz))
  781. ret = -EFAULT;
  782. if (!ret) {
  783. if (copy_to_user((void __user *)(arg + minsz), devices,
  784. hdr.count * sizeof(*devices)))
  785. ret = -EFAULT;
  786. }
  787. kfree(devices);
  788. return ret;
  789. } else if (cmd == VFIO_DEVICE_PCI_HOT_RESET) {
  790. struct vfio_pci_hot_reset hdr;
  791. int32_t *group_fds;
  792. struct vfio_pci_group_entry *groups;
  793. struct vfio_pci_group_info info;
  794. bool slot = false;
  795. int i, count = 0, ret = 0;
  796. minsz = offsetofend(struct vfio_pci_hot_reset, count);
  797. if (copy_from_user(&hdr, (void __user *)arg, minsz))
  798. return -EFAULT;
  799. if (hdr.argsz < minsz || hdr.flags)
  800. return -EINVAL;
  801. /* Can we do a slot or bus reset or neither? */
  802. if (!pci_probe_reset_slot(vdev->pdev->slot))
  803. slot = true;
  804. else if (pci_probe_reset_bus(vdev->pdev->bus))
  805. return -ENODEV;
  806. /*
  807. * We can't let userspace give us an arbitrarily large
  808. * buffer to copy, so verify how many we think there
  809. * could be. Note groups can have multiple devices so
  810. * one group per device is the max.
  811. */
  812. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  813. vfio_pci_count_devs,
  814. &count, slot);
  815. if (ret)
  816. return ret;
  817. /* Somewhere between 1 and count is OK */
  818. if (!hdr.count || hdr.count > count)
  819. return -EINVAL;
  820. group_fds = kcalloc(hdr.count, sizeof(*group_fds), GFP_KERNEL);
  821. groups = kcalloc(hdr.count, sizeof(*groups), GFP_KERNEL);
  822. if (!group_fds || !groups) {
  823. kfree(group_fds);
  824. kfree(groups);
  825. return -ENOMEM;
  826. }
  827. if (copy_from_user(group_fds, (void __user *)(arg + minsz),
  828. hdr.count * sizeof(*group_fds))) {
  829. kfree(group_fds);
  830. kfree(groups);
  831. return -EFAULT;
  832. }
  833. /*
  834. * For each group_fd, get the group through the vfio external
  835. * user interface and store the group and iommu ID. This
  836. * ensures the group is held across the reset.
  837. */
  838. for (i = 0; i < hdr.count; i++) {
  839. struct vfio_group *group;
  840. struct fd f = fdget(group_fds[i]);
  841. if (!f.file) {
  842. ret = -EBADF;
  843. break;
  844. }
  845. group = vfio_group_get_external_user(f.file);
  846. fdput(f);
  847. if (IS_ERR(group)) {
  848. ret = PTR_ERR(group);
  849. break;
  850. }
  851. groups[i].group = group;
  852. groups[i].id = vfio_external_user_iommu_id(group);
  853. }
  854. kfree(group_fds);
  855. /* release reference to groups on error */
  856. if (ret)
  857. goto hot_reset_release;
  858. info.count = hdr.count;
  859. info.groups = groups;
  860. /*
  861. * Test whether all the affected devices are contained
  862. * by the set of groups provided by the user.
  863. */
  864. ret = vfio_pci_for_each_slot_or_bus(vdev->pdev,
  865. vfio_pci_validate_devs,
  866. &info, slot);
  867. if (!ret)
  868. /* User has access, do the reset */
  869. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  870. pci_try_reset_bus(vdev->pdev->bus);
  871. hot_reset_release:
  872. for (i--; i >= 0; i--)
  873. vfio_group_put_external_user(groups[i].group);
  874. kfree(groups);
  875. return ret;
  876. }
  877. return -ENOTTY;
  878. }
  879. static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
  880. size_t count, loff_t *ppos, bool iswrite)
  881. {
  882. unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
  883. struct vfio_pci_device *vdev = device_data;
  884. if (index >= VFIO_PCI_NUM_REGIONS + vdev->num_regions)
  885. return -EINVAL;
  886. switch (index) {
  887. case VFIO_PCI_CONFIG_REGION_INDEX:
  888. return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
  889. case VFIO_PCI_ROM_REGION_INDEX:
  890. if (iswrite)
  891. return -EINVAL;
  892. return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
  893. case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
  894. return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
  895. case VFIO_PCI_VGA_REGION_INDEX:
  896. return vfio_pci_vga_rw(vdev, buf, count, ppos, iswrite);
  897. default:
  898. index -= VFIO_PCI_NUM_REGIONS;
  899. return vdev->region[index].ops->rw(vdev, buf,
  900. count, ppos, iswrite);
  901. }
  902. return -EINVAL;
  903. }
  904. static ssize_t vfio_pci_read(void *device_data, char __user *buf,
  905. size_t count, loff_t *ppos)
  906. {
  907. if (!count)
  908. return 0;
  909. return vfio_pci_rw(device_data, buf, count, ppos, false);
  910. }
  911. static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
  912. size_t count, loff_t *ppos)
  913. {
  914. if (!count)
  915. return 0;
  916. return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
  917. }
  918. static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
  919. {
  920. struct vfio_pci_device *vdev = device_data;
  921. struct pci_dev *pdev = vdev->pdev;
  922. unsigned int index;
  923. u64 phys_len, req_len, pgoff, req_start;
  924. int ret;
  925. index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
  926. if (vma->vm_end < vma->vm_start)
  927. return -EINVAL;
  928. if ((vma->vm_flags & VM_SHARED) == 0)
  929. return -EINVAL;
  930. if (index >= VFIO_PCI_ROM_REGION_INDEX)
  931. return -EINVAL;
  932. if (!vdev->bar_mmap_supported[index])
  933. return -EINVAL;
  934. phys_len = PAGE_ALIGN(pci_resource_len(pdev, index));
  935. req_len = vma->vm_end - vma->vm_start;
  936. pgoff = vma->vm_pgoff &
  937. ((1U << (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT)) - 1);
  938. req_start = pgoff << PAGE_SHIFT;
  939. if (req_start + req_len > phys_len)
  940. return -EINVAL;
  941. if (index == vdev->msix_bar) {
  942. /*
  943. * Disallow mmaps overlapping the MSI-X table; users don't
  944. * get to touch this directly. We could find somewhere
  945. * else to map the overlap, but page granularity is only
  946. * a recommendation, not a requirement, so the user needs
  947. * to know which bits are real. Requiring them to mmap
  948. * around the table makes that clear.
  949. */
  950. /* If neither entirely above nor below, then it overlaps */
  951. if (!(req_start >= vdev->msix_offset + vdev->msix_size ||
  952. req_start + req_len <= vdev->msix_offset))
  953. return -EINVAL;
  954. }
  955. /*
  956. * Even though we don't make use of the barmap for the mmap,
  957. * we need to request the region and the barmap tracks that.
  958. */
  959. if (!vdev->barmap[index]) {
  960. ret = pci_request_selected_regions(pdev,
  961. 1 << index, "vfio-pci");
  962. if (ret)
  963. return ret;
  964. vdev->barmap[index] = pci_iomap(pdev, index, 0);
  965. if (!vdev->barmap[index]) {
  966. pci_release_selected_regions(pdev, 1 << index);
  967. return -ENOMEM;
  968. }
  969. }
  970. vma->vm_private_data = vdev;
  971. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  972. vma->vm_pgoff = (pci_resource_start(pdev, index) >> PAGE_SHIFT) + pgoff;
  973. return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  974. req_len, vma->vm_page_prot);
  975. }
  976. static void vfio_pci_request(void *device_data, unsigned int count)
  977. {
  978. struct vfio_pci_device *vdev = device_data;
  979. mutex_lock(&vdev->igate);
  980. if (vdev->req_trigger) {
  981. if (!(count % 10))
  982. dev_notice_ratelimited(&vdev->pdev->dev,
  983. "Relaying device request to user (#%u)\n",
  984. count);
  985. eventfd_signal(vdev->req_trigger, 1);
  986. } else if (count == 0) {
  987. dev_warn(&vdev->pdev->dev,
  988. "No device request channel registered, blocked until released by user\n");
  989. }
  990. mutex_unlock(&vdev->igate);
  991. }
  992. static const struct vfio_device_ops vfio_pci_ops = {
  993. .name = "vfio-pci",
  994. .open = vfio_pci_open,
  995. .release = vfio_pci_release,
  996. .ioctl = vfio_pci_ioctl,
  997. .read = vfio_pci_read,
  998. .write = vfio_pci_write,
  999. .mmap = vfio_pci_mmap,
  1000. .request = vfio_pci_request,
  1001. };
  1002. static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  1003. {
  1004. struct vfio_pci_device *vdev;
  1005. struct iommu_group *group;
  1006. int ret;
  1007. if (pdev->hdr_type != PCI_HEADER_TYPE_NORMAL)
  1008. return -EINVAL;
  1009. group = vfio_iommu_group_get(&pdev->dev);
  1010. if (!group)
  1011. return -EINVAL;
  1012. vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
  1013. if (!vdev) {
  1014. vfio_iommu_group_put(group, &pdev->dev);
  1015. return -ENOMEM;
  1016. }
  1017. vdev->pdev = pdev;
  1018. vdev->irq_type = VFIO_PCI_NUM_IRQS;
  1019. mutex_init(&vdev->igate);
  1020. spin_lock_init(&vdev->irqlock);
  1021. ret = vfio_add_group_dev(&pdev->dev, &vfio_pci_ops, vdev);
  1022. if (ret) {
  1023. vfio_iommu_group_put(group, &pdev->dev);
  1024. kfree(vdev);
  1025. return ret;
  1026. }
  1027. if (vfio_pci_is_vga(pdev)) {
  1028. vga_client_register(pdev, vdev, NULL, vfio_pci_set_vga_decode);
  1029. vga_set_legacy_decoding(pdev,
  1030. vfio_pci_set_vga_decode(vdev, false));
  1031. }
  1032. if (!disable_idle_d3) {
  1033. /*
  1034. * pci-core sets the device power state to an unknown value at
  1035. * bootup and after being removed from a driver. The only
  1036. * transition it allows from this unknown state is to D0, which
  1037. * typically happens when a driver calls pci_enable_device().
  1038. * We're not ready to enable the device yet, but we do want to
  1039. * be able to get to D3. Therefore first do a D0 transition
  1040. * before going to D3.
  1041. */
  1042. pci_set_power_state(pdev, PCI_D0);
  1043. pci_set_power_state(pdev, PCI_D3hot);
  1044. }
  1045. return ret;
  1046. }
  1047. static void vfio_pci_remove(struct pci_dev *pdev)
  1048. {
  1049. struct vfio_pci_device *vdev;
  1050. vdev = vfio_del_group_dev(&pdev->dev);
  1051. if (!vdev)
  1052. return;
  1053. vfio_iommu_group_put(pdev->dev.iommu_group, &pdev->dev);
  1054. kfree(vdev->region);
  1055. kfree(vdev);
  1056. if (vfio_pci_is_vga(pdev)) {
  1057. vga_client_register(pdev, NULL, NULL, NULL);
  1058. vga_set_legacy_decoding(pdev,
  1059. VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM |
  1060. VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM);
  1061. }
  1062. if (!disable_idle_d3)
  1063. pci_set_power_state(pdev, PCI_D0);
  1064. }
  1065. static pci_ers_result_t vfio_pci_aer_err_detected(struct pci_dev *pdev,
  1066. pci_channel_state_t state)
  1067. {
  1068. struct vfio_pci_device *vdev;
  1069. struct vfio_device *device;
  1070. device = vfio_device_get_from_dev(&pdev->dev);
  1071. if (device == NULL)
  1072. return PCI_ERS_RESULT_DISCONNECT;
  1073. vdev = vfio_device_data(device);
  1074. if (vdev == NULL) {
  1075. vfio_device_put(device);
  1076. return PCI_ERS_RESULT_DISCONNECT;
  1077. }
  1078. mutex_lock(&vdev->igate);
  1079. if (vdev->err_trigger)
  1080. eventfd_signal(vdev->err_trigger, 1);
  1081. mutex_unlock(&vdev->igate);
  1082. vfio_device_put(device);
  1083. return PCI_ERS_RESULT_CAN_RECOVER;
  1084. }
  1085. static const struct pci_error_handlers vfio_err_handlers = {
  1086. .error_detected = vfio_pci_aer_err_detected,
  1087. };
  1088. static struct pci_driver vfio_pci_driver = {
  1089. .name = "vfio-pci",
  1090. .id_table = NULL, /* only dynamic ids */
  1091. .probe = vfio_pci_probe,
  1092. .remove = vfio_pci_remove,
  1093. .err_handler = &vfio_err_handlers,
  1094. };
  1095. struct vfio_devices {
  1096. struct vfio_device **devices;
  1097. int cur_index;
  1098. int max_index;
  1099. };
  1100. static int vfio_pci_get_devs(struct pci_dev *pdev, void *data)
  1101. {
  1102. struct vfio_devices *devs = data;
  1103. struct vfio_device *device;
  1104. if (devs->cur_index == devs->max_index)
  1105. return -ENOSPC;
  1106. device = vfio_device_get_from_dev(&pdev->dev);
  1107. if (!device)
  1108. return -EINVAL;
  1109. if (pci_dev_driver(pdev) != &vfio_pci_driver) {
  1110. vfio_device_put(device);
  1111. return -EBUSY;
  1112. }
  1113. devs->devices[devs->cur_index++] = device;
  1114. return 0;
  1115. }
  1116. /*
  1117. * Attempt to do a bus/slot reset if there are devices affected by a reset for
  1118. * this device that are needs_reset and all of the affected devices are unused
  1119. * (!refcnt). Callers are required to hold driver_lock when calling this to
  1120. * prevent device opens and concurrent bus reset attempts. We prevent device
  1121. * unbinds by acquiring and holding a reference to the vfio_device.
  1122. *
  1123. * NB: vfio-core considers a group to be viable even if some devices are
  1124. * bound to drivers like pci-stub or pcieport. Here we require all devices
  1125. * to be bound to vfio_pci since that's the only way we can be sure they
  1126. * stay put.
  1127. */
  1128. static void vfio_pci_try_bus_reset(struct vfio_pci_device *vdev)
  1129. {
  1130. struct vfio_devices devs = { .cur_index = 0 };
  1131. int i = 0, ret = -EINVAL;
  1132. bool needs_reset = false, slot = false;
  1133. struct vfio_pci_device *tmp;
  1134. if (!pci_probe_reset_slot(vdev->pdev->slot))
  1135. slot = true;
  1136. else if (pci_probe_reset_bus(vdev->pdev->bus))
  1137. return;
  1138. if (vfio_pci_for_each_slot_or_bus(vdev->pdev, vfio_pci_count_devs,
  1139. &i, slot) || !i)
  1140. return;
  1141. devs.max_index = i;
  1142. devs.devices = kcalloc(i, sizeof(struct vfio_device *), GFP_KERNEL);
  1143. if (!devs.devices)
  1144. return;
  1145. if (vfio_pci_for_each_slot_or_bus(vdev->pdev,
  1146. vfio_pci_get_devs, &devs, slot))
  1147. goto put_devs;
  1148. for (i = 0; i < devs.cur_index; i++) {
  1149. tmp = vfio_device_data(devs.devices[i]);
  1150. if (tmp->needs_reset)
  1151. needs_reset = true;
  1152. if (tmp->refcnt)
  1153. goto put_devs;
  1154. }
  1155. if (needs_reset)
  1156. ret = slot ? pci_try_reset_slot(vdev->pdev->slot) :
  1157. pci_try_reset_bus(vdev->pdev->bus);
  1158. put_devs:
  1159. for (i = 0; i < devs.cur_index; i++) {
  1160. tmp = vfio_device_data(devs.devices[i]);
  1161. if (!ret)
  1162. tmp->needs_reset = false;
  1163. if (!tmp->refcnt && !disable_idle_d3)
  1164. pci_set_power_state(tmp->pdev, PCI_D3hot);
  1165. vfio_device_put(devs.devices[i]);
  1166. }
  1167. kfree(devs.devices);
  1168. }
  1169. static void __exit vfio_pci_cleanup(void)
  1170. {
  1171. pci_unregister_driver(&vfio_pci_driver);
  1172. vfio_pci_uninit_perm_bits();
  1173. }
  1174. static void __init vfio_pci_fill_ids(void)
  1175. {
  1176. char *p, *id;
  1177. int rc;
  1178. /* no ids passed actually */
  1179. if (ids[0] == '\0')
  1180. return;
  1181. /* add ids specified in the module parameter */
  1182. p = ids;
  1183. while ((id = strsep(&p, ","))) {
  1184. unsigned int vendor, device, subvendor = PCI_ANY_ID,
  1185. subdevice = PCI_ANY_ID, class = 0, class_mask = 0;
  1186. int fields;
  1187. if (!strlen(id))
  1188. continue;
  1189. fields = sscanf(id, "%x:%x:%x:%x:%x:%x",
  1190. &vendor, &device, &subvendor, &subdevice,
  1191. &class, &class_mask);
  1192. if (fields < 2) {
  1193. pr_warn("invalid id string \"%s\"\n", id);
  1194. continue;
  1195. }
  1196. rc = pci_add_dynid(&vfio_pci_driver, vendor, device,
  1197. subvendor, subdevice, class, class_mask, 0);
  1198. if (rc)
  1199. pr_warn("failed to add dynamic id [%04x:%04x[%04x:%04x]] class %#08x/%08x (%d)\n",
  1200. vendor, device, subvendor, subdevice,
  1201. class, class_mask, rc);
  1202. else
  1203. pr_info("add [%04x:%04x[%04x:%04x]] class %#08x/%08x\n",
  1204. vendor, device, subvendor, subdevice,
  1205. class, class_mask);
  1206. }
  1207. }
  1208. static int __init vfio_pci_init(void)
  1209. {
  1210. int ret;
  1211. /* Allocate shared config space permision data used by all devices */
  1212. ret = vfio_pci_init_perm_bits();
  1213. if (ret)
  1214. return ret;
  1215. /* Register and scan for devices */
  1216. ret = pci_register_driver(&vfio_pci_driver);
  1217. if (ret)
  1218. goto out_driver;
  1219. vfio_pci_fill_ids();
  1220. return 0;
  1221. out_driver:
  1222. vfio_pci_uninit_perm_bits();
  1223. return ret;
  1224. }
  1225. module_init(vfio_pci_init);
  1226. module_exit(vfio_pci_cleanup);
  1227. MODULE_VERSION(DRIVER_VERSION);
  1228. MODULE_LICENSE("GPL v2");
  1229. MODULE_AUTHOR(DRIVER_AUTHOR);
  1230. MODULE_DESCRIPTION(DRIVER_DESC);