mdss-10nm-pll-clk.h 1.4 KB

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  1. /*
  2. * Copyright (c) 2017, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #ifndef __MDSS_10NM_PLL_CLK_H
  14. #define __MDSS_10NM_PLL_CLK_H
  15. /* DSI PLL clocks */
  16. #define VCO_CLK_0 0
  17. #define PLL_OUT_DIV_0_CLK 1
  18. #define BITCLK_SRC_0_CLK 2
  19. #define BYTECLK_SRC_0_CLK 3
  20. #define POST_BIT_DIV_0_CLK 4
  21. #define POST_VCO_DIV_0_CLK 5
  22. #define BYTECLK_MUX_0_CLK 6
  23. #define PCLK_SRC_MUX_0_CLK 7
  24. #define PCLK_SRC_0_CLK 8
  25. #define PCLK_MUX_0_CLK 9
  26. #define VCO_CLK_1 10
  27. #define PLL_OUT_DIV_1_CLK 11
  28. #define BITCLK_SRC_1_CLK 12
  29. #define BYTECLK_SRC_1_CLK 13
  30. #define POST_BIT_DIV_1_CLK 14
  31. #define POST_VCO_DIV_1_CLK 15
  32. #define BYTECLK_MUX_1_CLK 16
  33. #define PCLK_SRC_MUX_1_CLK 17
  34. #define PCLK_SRC_1_CLK 18
  35. #define PCLK_MUX_1_CLK 19
  36. /* DP PLL clocks */
  37. #define DP_VCO_CLK 0
  38. #define DP_LINK_CLK_DIVSEL_TEN 1
  39. #define DP_VCO_DIVIDED_TWO_CLK_SRC 2
  40. #define DP_VCO_DIVIDED_FOUR_CLK_SRC 3
  41. #define DP_VCO_DIVIDED_SIX_CLK_SRC 4
  42. #define DP_VCO_DIVIDED_CLK_SRC_MUX 5
  43. #endif