stm32f746-pinfunc.h 48 KB

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  1. #ifndef _DT_BINDINGS_STM32F746_PINFUNC_H
  2. #define _DT_BINDINGS_STM32F746_PINFUNC_H
  3. #define STM32F746_PA0_FUNC_GPIO 0x0
  4. #define STM32F746_PA0_FUNC_TIM2_CH1_TIM2_ETR 0x2
  5. #define STM32F746_PA0_FUNC_TIM5_CH1 0x3
  6. #define STM32F746_PA0_FUNC_TIM8_ETR 0x4
  7. #define STM32F746_PA0_FUNC_USART2_CTS 0x8
  8. #define STM32F746_PA0_FUNC_UART4_TX 0x9
  9. #define STM32F746_PA0_FUNC_SAI2_SD_B 0xb
  10. #define STM32F746_PA0_FUNC_ETH_MII_CRS 0xc
  11. #define STM32F746_PA0_FUNC_EVENTOUT 0x10
  12. #define STM32F746_PA0_FUNC_ANALOG 0x11
  13. #define STM32F746_PA1_FUNC_GPIO 0x100
  14. #define STM32F746_PA1_FUNC_TIM2_CH2 0x102
  15. #define STM32F746_PA1_FUNC_TIM5_CH2 0x103
  16. #define STM32F746_PA1_FUNC_USART2_RTS 0x108
  17. #define STM32F746_PA1_FUNC_UART4_RX 0x109
  18. #define STM32F746_PA1_FUNC_QUADSPI_BK1_IO3 0x10a
  19. #define STM32F746_PA1_FUNC_SAI2_MCLK_B 0x10b
  20. #define STM32F746_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK 0x10c
  21. #define STM32F746_PA1_FUNC_LCD_R2 0x10f
  22. #define STM32F746_PA1_FUNC_EVENTOUT 0x110
  23. #define STM32F746_PA1_FUNC_ANALOG 0x111
  24. #define STM32F746_PA2_FUNC_GPIO 0x200
  25. #define STM32F746_PA2_FUNC_TIM2_CH3 0x202
  26. #define STM32F746_PA2_FUNC_TIM5_CH3 0x203
  27. #define STM32F746_PA2_FUNC_TIM9_CH1 0x204
  28. #define STM32F746_PA2_FUNC_USART2_TX 0x208
  29. #define STM32F746_PA2_FUNC_SAI2_SCK_B 0x209
  30. #define STM32F746_PA2_FUNC_ETH_MDIO 0x20c
  31. #define STM32F746_PA2_FUNC_LCD_R1 0x20f
  32. #define STM32F746_PA2_FUNC_EVENTOUT 0x210
  33. #define STM32F746_PA2_FUNC_ANALOG 0x211
  34. #define STM32F746_PA3_FUNC_GPIO 0x300
  35. #define STM32F746_PA3_FUNC_TIM2_CH4 0x302
  36. #define STM32F746_PA3_FUNC_TIM5_CH4 0x303
  37. #define STM32F746_PA3_FUNC_TIM9_CH2 0x304
  38. #define STM32F746_PA3_FUNC_USART2_RX 0x308
  39. #define STM32F746_PA3_FUNC_OTG_HS_ULPI_D0 0x30b
  40. #define STM32F746_PA3_FUNC_ETH_MII_COL 0x30c
  41. #define STM32F746_PA3_FUNC_LCD_B5 0x30f
  42. #define STM32F746_PA3_FUNC_EVENTOUT 0x310
  43. #define STM32F746_PA3_FUNC_ANALOG 0x311
  44. #define STM32F746_PA4_FUNC_GPIO 0x400
  45. #define STM32F746_PA4_FUNC_SPI1_NSS_I2S1_WS 0x406
  46. #define STM32F746_PA4_FUNC_SPI3_NSS_I2S3_WS 0x407
  47. #define STM32F746_PA4_FUNC_USART2_CK 0x408
  48. #define STM32F746_PA4_FUNC_OTG_HS_SOF 0x40d
  49. #define STM32F746_PA4_FUNC_DCMI_HSYNC 0x40e
  50. #define STM32F746_PA4_FUNC_LCD_VSYNC 0x40f
  51. #define STM32F746_PA4_FUNC_EVENTOUT 0x410
  52. #define STM32F746_PA4_FUNC_ANALOG 0x411
  53. #define STM32F746_PA5_FUNC_GPIO 0x500
  54. #define STM32F746_PA5_FUNC_TIM2_CH1_TIM2_ETR 0x502
  55. #define STM32F746_PA5_FUNC_TIM8_CH1N 0x504
  56. #define STM32F746_PA5_FUNC_SPI1_SCK_I2S1_CK 0x506
  57. #define STM32F746_PA5_FUNC_OTG_HS_ULPI_CK 0x50b
  58. #define STM32F746_PA5_FUNC_LCD_R4 0x50f
  59. #define STM32F746_PA5_FUNC_EVENTOUT 0x510
  60. #define STM32F746_PA5_FUNC_ANALOG 0x511
  61. #define STM32F746_PA6_FUNC_GPIO 0x600
  62. #define STM32F746_PA6_FUNC_TIM1_BKIN 0x602
  63. #define STM32F746_PA6_FUNC_TIM3_CH1 0x603
  64. #define STM32F746_PA6_FUNC_TIM8_BKIN 0x604
  65. #define STM32F746_PA6_FUNC_SPI1_MISO 0x606
  66. #define STM32F746_PA6_FUNC_TIM13_CH1 0x60a
  67. #define STM32F746_PA6_FUNC_DCMI_PIXCLK 0x60e
  68. #define STM32F746_PA6_FUNC_LCD_G2 0x60f
  69. #define STM32F746_PA6_FUNC_EVENTOUT 0x610
  70. #define STM32F746_PA6_FUNC_ANALOG 0x611
  71. #define STM32F746_PA7_FUNC_GPIO 0x700
  72. #define STM32F746_PA7_FUNC_TIM1_CH1N 0x702
  73. #define STM32F746_PA7_FUNC_TIM3_CH2 0x703
  74. #define STM32F746_PA7_FUNC_TIM8_CH1N 0x704
  75. #define STM32F746_PA7_FUNC_SPI1_MOSI_I2S1_SD 0x706
  76. #define STM32F746_PA7_FUNC_TIM14_CH1 0x70a
  77. #define STM32F746_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV 0x70c
  78. #define STM32F746_PA7_FUNC_FMC_SDNWE 0x70d
  79. #define STM32F746_PA7_FUNC_EVENTOUT 0x710
  80. #define STM32F746_PA7_FUNC_ANALOG 0x711
  81. #define STM32F746_PA8_FUNC_GPIO 0x800
  82. #define STM32F746_PA8_FUNC_MCO1 0x801
  83. #define STM32F746_PA8_FUNC_TIM1_CH1 0x802
  84. #define STM32F746_PA8_FUNC_TIM8_BKIN2 0x804
  85. #define STM32F746_PA8_FUNC_I2C3_SCL 0x805
  86. #define STM32F746_PA8_FUNC_USART1_CK 0x808
  87. #define STM32F746_PA8_FUNC_OTG_FS_SOF 0x80b
  88. #define STM32F746_PA8_FUNC_LCD_R6 0x80f
  89. #define STM32F746_PA8_FUNC_EVENTOUT 0x810
  90. #define STM32F746_PA8_FUNC_ANALOG 0x811
  91. #define STM32F746_PA9_FUNC_GPIO 0x900
  92. #define STM32F746_PA9_FUNC_TIM1_CH2 0x902
  93. #define STM32F746_PA9_FUNC_I2C3_SMBA 0x905
  94. #define STM32F746_PA9_FUNC_SPI2_SCK_I2S2_CK 0x906
  95. #define STM32F746_PA9_FUNC_USART1_TX 0x908
  96. #define STM32F746_PA9_FUNC_DCMI_D0 0x90e
  97. #define STM32F746_PA9_FUNC_EVENTOUT 0x910
  98. #define STM32F746_PA9_FUNC_ANALOG 0x911
  99. #define STM32F746_PA10_FUNC_GPIO 0xa00
  100. #define STM32F746_PA10_FUNC_TIM1_CH3 0xa02
  101. #define STM32F746_PA10_FUNC_USART1_RX 0xa08
  102. #define STM32F746_PA10_FUNC_OTG_FS_ID 0xa0b
  103. #define STM32F746_PA10_FUNC_DCMI_D1 0xa0e
  104. #define STM32F746_PA10_FUNC_EVENTOUT 0xa10
  105. #define STM32F746_PA10_FUNC_ANALOG 0xa11
  106. #define STM32F746_PA11_FUNC_GPIO 0xb00
  107. #define STM32F746_PA11_FUNC_TIM1_CH4 0xb02
  108. #define STM32F746_PA11_FUNC_USART1_CTS 0xb08
  109. #define STM32F746_PA11_FUNC_CAN1_RX 0xb0a
  110. #define STM32F746_PA11_FUNC_OTG_FS_DM 0xb0b
  111. #define STM32F746_PA11_FUNC_LCD_R4 0xb0f
  112. #define STM32F746_PA11_FUNC_EVENTOUT 0xb10
  113. #define STM32F746_PA11_FUNC_ANALOG 0xb11
  114. #define STM32F746_PA12_FUNC_GPIO 0xc00
  115. #define STM32F746_PA12_FUNC_TIM1_ETR 0xc02
  116. #define STM32F746_PA12_FUNC_USART1_RTS 0xc08
  117. #define STM32F746_PA12_FUNC_SAI2_FS_B 0xc09
  118. #define STM32F746_PA12_FUNC_CAN1_TX 0xc0a
  119. #define STM32F746_PA12_FUNC_OTG_FS_DP 0xc0b
  120. #define STM32F746_PA12_FUNC_LCD_R5 0xc0f
  121. #define STM32F746_PA12_FUNC_EVENTOUT 0xc10
  122. #define STM32F746_PA12_FUNC_ANALOG 0xc11
  123. #define STM32F746_PA13_FUNC_GPIO 0xd00
  124. #define STM32F746_PA13_FUNC_JTMS_SWDIO 0xd01
  125. #define STM32F746_PA13_FUNC_EVENTOUT 0xd10
  126. #define STM32F746_PA13_FUNC_ANALOG 0xd11
  127. #define STM32F746_PA14_FUNC_GPIO 0xe00
  128. #define STM32F746_PA14_FUNC_JTCK_SWCLK 0xe01
  129. #define STM32F746_PA14_FUNC_EVENTOUT 0xe10
  130. #define STM32F746_PA14_FUNC_ANALOG 0xe11
  131. #define STM32F746_PA15_FUNC_GPIO 0xf00
  132. #define STM32F746_PA15_FUNC_JTDI 0xf01
  133. #define STM32F746_PA15_FUNC_TIM2_CH1_TIM2_ETR 0xf02
  134. #define STM32F746_PA15_FUNC_HDMI_CEC 0xf05
  135. #define STM32F746_PA15_FUNC_SPI1_NSS_I2S1_WS 0xf06
  136. #define STM32F746_PA15_FUNC_SPI3_NSS_I2S3_WS 0xf07
  137. #define STM32F746_PA15_FUNC_UART4_RTS 0xf09
  138. #define STM32F746_PA15_FUNC_EVENTOUT 0xf10
  139. #define STM32F746_PA15_FUNC_ANALOG 0xf11
  140. #define STM32F746_PB0_FUNC_GPIO 0x1000
  141. #define STM32F746_PB0_FUNC_TIM1_CH2N 0x1002
  142. #define STM32F746_PB0_FUNC_TIM3_CH3 0x1003
  143. #define STM32F746_PB0_FUNC_TIM8_CH2N 0x1004
  144. #define STM32F746_PB0_FUNC_UART4_CTS 0x1009
  145. #define STM32F746_PB0_FUNC_LCD_R3 0x100a
  146. #define STM32F746_PB0_FUNC_OTG_HS_ULPI_D1 0x100b
  147. #define STM32F746_PB0_FUNC_ETH_MII_RXD2 0x100c
  148. #define STM32F746_PB0_FUNC_EVENTOUT 0x1010
  149. #define STM32F746_PB0_FUNC_ANALOG 0x1011
  150. #define STM32F746_PB1_FUNC_GPIO 0x1100
  151. #define STM32F746_PB1_FUNC_TIM1_CH3N 0x1102
  152. #define STM32F746_PB1_FUNC_TIM3_CH4 0x1103
  153. #define STM32F746_PB1_FUNC_TIM8_CH3N 0x1104
  154. #define STM32F746_PB1_FUNC_LCD_R6 0x110a
  155. #define STM32F746_PB1_FUNC_OTG_HS_ULPI_D2 0x110b
  156. #define STM32F746_PB1_FUNC_ETH_MII_RXD3 0x110c
  157. #define STM32F746_PB1_FUNC_EVENTOUT 0x1110
  158. #define STM32F746_PB1_FUNC_ANALOG 0x1111
  159. #define STM32F746_PB2_FUNC_GPIO 0x1200
  160. #define STM32F746_PB2_FUNC_SAI1_SD_A 0x1207
  161. #define STM32F746_PB2_FUNC_SPI3_MOSI_I2S3_SD 0x1208
  162. #define STM32F746_PB2_FUNC_QUADSPI_CLK 0x120a
  163. #define STM32F746_PB2_FUNC_EVENTOUT 0x1210
  164. #define STM32F746_PB2_FUNC_ANALOG 0x1211
  165. #define STM32F746_PB3_FUNC_GPIO 0x1300
  166. #define STM32F746_PB3_FUNC_JTDO_TRACESWO 0x1301
  167. #define STM32F746_PB3_FUNC_TIM2_CH2 0x1302
  168. #define STM32F746_PB3_FUNC_SPI1_SCK_I2S1_CK 0x1306
  169. #define STM32F746_PB3_FUNC_SPI3_SCK_I2S3_CK 0x1307
  170. #define STM32F746_PB3_FUNC_EVENTOUT 0x1310
  171. #define STM32F746_PB3_FUNC_ANALOG 0x1311
  172. #define STM32F746_PB4_FUNC_GPIO 0x1400
  173. #define STM32F746_PB4_FUNC_NJTRST 0x1401
  174. #define STM32F746_PB4_FUNC_TIM3_CH1 0x1403
  175. #define STM32F746_PB4_FUNC_SPI1_MISO 0x1406
  176. #define STM32F746_PB4_FUNC_SPI3_MISO 0x1407
  177. #define STM32F746_PB4_FUNC_SPI2_NSS_I2S2_WS 0x1408
  178. #define STM32F746_PB4_FUNC_EVENTOUT 0x1410
  179. #define STM32F746_PB4_FUNC_ANALOG 0x1411
  180. #define STM32F746_PB5_FUNC_GPIO 0x1500
  181. #define STM32F746_PB5_FUNC_TIM3_CH2 0x1503
  182. #define STM32F746_PB5_FUNC_I2C1_SMBA 0x1505
  183. #define STM32F746_PB5_FUNC_SPI1_MOSI_I2S1_SD 0x1506
  184. #define STM32F746_PB5_FUNC_SPI3_MOSI_I2S3_SD 0x1507
  185. #define STM32F746_PB5_FUNC_CAN2_RX 0x150a
  186. #define STM32F746_PB5_FUNC_OTG_HS_ULPI_D7 0x150b
  187. #define STM32F746_PB5_FUNC_ETH_PPS_OUT 0x150c
  188. #define STM32F746_PB5_FUNC_FMC_SDCKE1 0x150d
  189. #define STM32F746_PB5_FUNC_DCMI_D10 0x150e
  190. #define STM32F746_PB5_FUNC_EVENTOUT 0x1510
  191. #define STM32F746_PB5_FUNC_ANALOG 0x1511
  192. #define STM32F746_PB6_FUNC_GPIO 0x1600
  193. #define STM32F746_PB6_FUNC_TIM4_CH1 0x1603
  194. #define STM32F746_PB6_FUNC_HDMI_CEC 0x1604
  195. #define STM32F746_PB6_FUNC_I2C1_SCL 0x1605
  196. #define STM32F746_PB6_FUNC_USART1_TX 0x1608
  197. #define STM32F746_PB6_FUNC_CAN2_TX 0x160a
  198. #define STM32F746_PB6_FUNC_QUADSPI_BK1_NCS 0x160b
  199. #define STM32F746_PB6_FUNC_FMC_SDNE1 0x160d
  200. #define STM32F746_PB6_FUNC_DCMI_D5 0x160e
  201. #define STM32F746_PB6_FUNC_EVENTOUT 0x1610
  202. #define STM32F746_PB6_FUNC_ANALOG 0x1611
  203. #define STM32F746_PB7_FUNC_GPIO 0x1700
  204. #define STM32F746_PB7_FUNC_TIM4_CH2 0x1703
  205. #define STM32F746_PB7_FUNC_I2C1_SDA 0x1705
  206. #define STM32F746_PB7_FUNC_USART1_RX 0x1708
  207. #define STM32F746_PB7_FUNC_FMC_NL 0x170d
  208. #define STM32F746_PB7_FUNC_DCMI_VSYNC 0x170e
  209. #define STM32F746_PB7_FUNC_EVENTOUT 0x1710
  210. #define STM32F746_PB7_FUNC_ANALOG 0x1711
  211. #define STM32F746_PB8_FUNC_GPIO 0x1800
  212. #define STM32F746_PB8_FUNC_TIM4_CH3 0x1803
  213. #define STM32F746_PB8_FUNC_TIM10_CH1 0x1804
  214. #define STM32F746_PB8_FUNC_I2C1_SCL 0x1805
  215. #define STM32F746_PB8_FUNC_CAN1_RX 0x180a
  216. #define STM32F746_PB8_FUNC_ETH_MII_TXD3 0x180c
  217. #define STM32F746_PB8_FUNC_SDMMC1_D4 0x180d
  218. #define STM32F746_PB8_FUNC_DCMI_D6 0x180e
  219. #define STM32F746_PB8_FUNC_LCD_B6 0x180f
  220. #define STM32F746_PB8_FUNC_EVENTOUT 0x1810
  221. #define STM32F746_PB8_FUNC_ANALOG 0x1811
  222. #define STM32F746_PB9_FUNC_GPIO 0x1900
  223. #define STM32F746_PB9_FUNC_TIM4_CH4 0x1903
  224. #define STM32F746_PB9_FUNC_TIM11_CH1 0x1904
  225. #define STM32F746_PB9_FUNC_I2C1_SDA 0x1905
  226. #define STM32F746_PB9_FUNC_SPI2_NSS_I2S2_WS 0x1906
  227. #define STM32F746_PB9_FUNC_CAN1_TX 0x190a
  228. #define STM32F746_PB9_FUNC_SDMMC1_D5 0x190d
  229. #define STM32F746_PB9_FUNC_DCMI_D7 0x190e
  230. #define STM32F746_PB9_FUNC_LCD_B7 0x190f
  231. #define STM32F746_PB9_FUNC_EVENTOUT 0x1910
  232. #define STM32F746_PB9_FUNC_ANALOG 0x1911
  233. #define STM32F746_PB10_FUNC_GPIO 0x1a00
  234. #define STM32F746_PB10_FUNC_TIM2_CH3 0x1a02
  235. #define STM32F746_PB10_FUNC_I2C2_SCL 0x1a05
  236. #define STM32F746_PB10_FUNC_SPI2_SCK_I2S2_CK 0x1a06
  237. #define STM32F746_PB10_FUNC_USART3_TX 0x1a08
  238. #define STM32F746_PB10_FUNC_OTG_HS_ULPI_D3 0x1a0b
  239. #define STM32F746_PB10_FUNC_ETH_MII_RX_ER 0x1a0c
  240. #define STM32F746_PB10_FUNC_LCD_G4 0x1a0f
  241. #define STM32F746_PB10_FUNC_EVENTOUT 0x1a10
  242. #define STM32F746_PB10_FUNC_ANALOG 0x1a11
  243. #define STM32F746_PB11_FUNC_GPIO 0x1b00
  244. #define STM32F746_PB11_FUNC_TIM2_CH4 0x1b02
  245. #define STM32F746_PB11_FUNC_I2C2_SDA 0x1b05
  246. #define STM32F746_PB11_FUNC_USART3_RX 0x1b08
  247. #define STM32F746_PB11_FUNC_OTG_HS_ULPI_D4 0x1b0b
  248. #define STM32F746_PB11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x1b0c
  249. #define STM32F746_PB11_FUNC_LCD_G5 0x1b0f
  250. #define STM32F746_PB11_FUNC_EVENTOUT 0x1b10
  251. #define STM32F746_PB11_FUNC_ANALOG 0x1b11
  252. #define STM32F746_PB12_FUNC_GPIO 0x1c00
  253. #define STM32F746_PB12_FUNC_TIM1_BKIN 0x1c02
  254. #define STM32F746_PB12_FUNC_I2C2_SMBA 0x1c05
  255. #define STM32F746_PB12_FUNC_SPI2_NSS_I2S2_WS 0x1c06
  256. #define STM32F746_PB12_FUNC_USART3_CK 0x1c08
  257. #define STM32F746_PB12_FUNC_CAN2_RX 0x1c0a
  258. #define STM32F746_PB12_FUNC_OTG_HS_ULPI_D5 0x1c0b
  259. #define STM32F746_PB12_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x1c0c
  260. #define STM32F746_PB12_FUNC_OTG_HS_ID 0x1c0d
  261. #define STM32F746_PB12_FUNC_EVENTOUT 0x1c10
  262. #define STM32F746_PB12_FUNC_ANALOG 0x1c11
  263. #define STM32F746_PB13_FUNC_GPIO 0x1d00
  264. #define STM32F746_PB13_FUNC_TIM1_CH1N 0x1d02
  265. #define STM32F746_PB13_FUNC_SPI2_SCK_I2S2_CK 0x1d06
  266. #define STM32F746_PB13_FUNC_USART3_CTS 0x1d08
  267. #define STM32F746_PB13_FUNC_CAN2_TX 0x1d0a
  268. #define STM32F746_PB13_FUNC_OTG_HS_ULPI_D6 0x1d0b
  269. #define STM32F746_PB13_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x1d0c
  270. #define STM32F746_PB13_FUNC_EVENTOUT 0x1d10
  271. #define STM32F746_PB13_FUNC_ANALOG 0x1d11
  272. #define STM32F746_PB14_FUNC_GPIO 0x1e00
  273. #define STM32F746_PB14_FUNC_TIM1_CH2N 0x1e02
  274. #define STM32F746_PB14_FUNC_TIM8_CH2N 0x1e04
  275. #define STM32F746_PB14_FUNC_SPI2_MISO 0x1e06
  276. #define STM32F746_PB14_FUNC_USART3_RTS 0x1e08
  277. #define STM32F746_PB14_FUNC_TIM12_CH1 0x1e0a
  278. #define STM32F746_PB14_FUNC_OTG_HS_DM 0x1e0d
  279. #define STM32F746_PB14_FUNC_EVENTOUT 0x1e10
  280. #define STM32F746_PB14_FUNC_ANALOG 0x1e11
  281. #define STM32F746_PB15_FUNC_GPIO 0x1f00
  282. #define STM32F746_PB15_FUNC_RTC_REFIN 0x1f01
  283. #define STM32F746_PB15_FUNC_TIM1_CH3N 0x1f02
  284. #define STM32F746_PB15_FUNC_TIM8_CH3N 0x1f04
  285. #define STM32F746_PB15_FUNC_SPI2_MOSI_I2S2_SD 0x1f06
  286. #define STM32F746_PB15_FUNC_TIM12_CH2 0x1f0a
  287. #define STM32F746_PB15_FUNC_OTG_HS_DP 0x1f0d
  288. #define STM32F746_PB15_FUNC_EVENTOUT 0x1f10
  289. #define STM32F746_PB15_FUNC_ANALOG 0x1f11
  290. #define STM32F746_PC0_FUNC_GPIO 0x2000
  291. #define STM32F746_PC0_FUNC_SAI2_FS_B 0x2009
  292. #define STM32F746_PC0_FUNC_OTG_HS_ULPI_STP 0x200b
  293. #define STM32F746_PC0_FUNC_FMC_SDNWE 0x200d
  294. #define STM32F746_PC0_FUNC_LCD_R5 0x200f
  295. #define STM32F746_PC0_FUNC_EVENTOUT 0x2010
  296. #define STM32F746_PC0_FUNC_ANALOG 0x2011
  297. #define STM32F746_PC1_FUNC_GPIO 0x2100
  298. #define STM32F746_PC1_FUNC_TRACED0 0x2101
  299. #define STM32F746_PC1_FUNC_SPI2_MOSI_I2S2_SD 0x2106
  300. #define STM32F746_PC1_FUNC_SAI1_SD_A 0x2107
  301. #define STM32F746_PC1_FUNC_ETH_MDC 0x210c
  302. #define STM32F746_PC1_FUNC_EVENTOUT 0x2110
  303. #define STM32F746_PC1_FUNC_ANALOG 0x2111
  304. #define STM32F746_PC2_FUNC_GPIO 0x2200
  305. #define STM32F746_PC2_FUNC_SPI2_MISO 0x2206
  306. #define STM32F746_PC2_FUNC_OTG_HS_ULPI_DIR 0x220b
  307. #define STM32F746_PC2_FUNC_ETH_MII_TXD2 0x220c
  308. #define STM32F746_PC2_FUNC_FMC_SDNE0 0x220d
  309. #define STM32F746_PC2_FUNC_EVENTOUT 0x2210
  310. #define STM32F746_PC2_FUNC_ANALOG 0x2211
  311. #define STM32F746_PC3_FUNC_GPIO 0x2300
  312. #define STM32F746_PC3_FUNC_SPI2_MOSI_I2S2_SD 0x2306
  313. #define STM32F746_PC3_FUNC_OTG_HS_ULPI_NXT 0x230b
  314. #define STM32F746_PC3_FUNC_ETH_MII_TX_CLK 0x230c
  315. #define STM32F746_PC3_FUNC_FMC_SDCKE0 0x230d
  316. #define STM32F746_PC3_FUNC_EVENTOUT 0x2310
  317. #define STM32F746_PC3_FUNC_ANALOG 0x2311
  318. #define STM32F746_PC4_FUNC_GPIO 0x2400
  319. #define STM32F746_PC4_FUNC_I2S1_MCK 0x2406
  320. #define STM32F746_PC4_FUNC_SPDIFRX_IN2 0x2409
  321. #define STM32F746_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0 0x240c
  322. #define STM32F746_PC4_FUNC_FMC_SDNE0 0x240d
  323. #define STM32F746_PC4_FUNC_EVENTOUT 0x2410
  324. #define STM32F746_PC4_FUNC_ANALOG 0x2411
  325. #define STM32F746_PC5_FUNC_GPIO 0x2500
  326. #define STM32F746_PC5_FUNC_SPDIFRX_IN3 0x2509
  327. #define STM32F746_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1 0x250c
  328. #define STM32F746_PC5_FUNC_FMC_SDCKE0 0x250d
  329. #define STM32F746_PC5_FUNC_EVENTOUT 0x2510
  330. #define STM32F746_PC5_FUNC_ANALOG 0x2511
  331. #define STM32F746_PC6_FUNC_GPIO 0x2600
  332. #define STM32F746_PC6_FUNC_TIM3_CH1 0x2603
  333. #define STM32F746_PC6_FUNC_TIM8_CH1 0x2604
  334. #define STM32F746_PC6_FUNC_I2S2_MCK 0x2606
  335. #define STM32F746_PC6_FUNC_USART6_TX 0x2609
  336. #define STM32F746_PC6_FUNC_SDMMC1_D6 0x260d
  337. #define STM32F746_PC6_FUNC_DCMI_D0 0x260e
  338. #define STM32F746_PC6_FUNC_LCD_HSYNC 0x260f
  339. #define STM32F746_PC6_FUNC_EVENTOUT 0x2610
  340. #define STM32F746_PC6_FUNC_ANALOG 0x2611
  341. #define STM32F746_PC7_FUNC_GPIO 0x2700
  342. #define STM32F746_PC7_FUNC_TIM3_CH2 0x2703
  343. #define STM32F746_PC7_FUNC_TIM8_CH2 0x2704
  344. #define STM32F746_PC7_FUNC_I2S3_MCK 0x2707
  345. #define STM32F746_PC7_FUNC_USART6_RX 0x2709
  346. #define STM32F746_PC7_FUNC_SDMMC1_D7 0x270d
  347. #define STM32F746_PC7_FUNC_DCMI_D1 0x270e
  348. #define STM32F746_PC7_FUNC_LCD_G6 0x270f
  349. #define STM32F746_PC7_FUNC_EVENTOUT 0x2710
  350. #define STM32F746_PC7_FUNC_ANALOG 0x2711
  351. #define STM32F746_PC8_FUNC_GPIO 0x2800
  352. #define STM32F746_PC8_FUNC_TRACED1 0x2801
  353. #define STM32F746_PC8_FUNC_TIM3_CH3 0x2803
  354. #define STM32F746_PC8_FUNC_TIM8_CH3 0x2804
  355. #define STM32F746_PC8_FUNC_UART5_RTS 0x2808
  356. #define STM32F746_PC8_FUNC_USART6_CK 0x2809
  357. #define STM32F746_PC8_FUNC_SDMMC1_D0 0x280d
  358. #define STM32F746_PC8_FUNC_DCMI_D2 0x280e
  359. #define STM32F746_PC8_FUNC_EVENTOUT 0x2810
  360. #define STM32F746_PC8_FUNC_ANALOG 0x2811
  361. #define STM32F746_PC9_FUNC_GPIO 0x2900
  362. #define STM32F746_PC9_FUNC_MCO2 0x2901
  363. #define STM32F746_PC9_FUNC_TIM3_CH4 0x2903
  364. #define STM32F746_PC9_FUNC_TIM8_CH4 0x2904
  365. #define STM32F746_PC9_FUNC_I2C3_SDA 0x2905
  366. #define STM32F746_PC9_FUNC_I2S_CKIN 0x2906
  367. #define STM32F746_PC9_FUNC_UART5_CTS 0x2908
  368. #define STM32F746_PC9_FUNC_QUADSPI_BK1_IO0 0x290a
  369. #define STM32F746_PC9_FUNC_SDMMC1_D1 0x290d
  370. #define STM32F746_PC9_FUNC_DCMI_D3 0x290e
  371. #define STM32F746_PC9_FUNC_EVENTOUT 0x2910
  372. #define STM32F746_PC9_FUNC_ANALOG 0x2911
  373. #define STM32F746_PC10_FUNC_GPIO 0x2a00
  374. #define STM32F746_PC10_FUNC_SPI3_SCK_I2S3_CK 0x2a07
  375. #define STM32F746_PC10_FUNC_USART3_TX 0x2a08
  376. #define STM32F746_PC10_FUNC_UART4_TX 0x2a09
  377. #define STM32F746_PC10_FUNC_QUADSPI_BK1_IO1 0x2a0a
  378. #define STM32F746_PC10_FUNC_SDMMC1_D2 0x2a0d
  379. #define STM32F746_PC10_FUNC_DCMI_D8 0x2a0e
  380. #define STM32F746_PC10_FUNC_LCD_R2 0x2a0f
  381. #define STM32F746_PC10_FUNC_EVENTOUT 0x2a10
  382. #define STM32F746_PC10_FUNC_ANALOG 0x2a11
  383. #define STM32F746_PC11_FUNC_GPIO 0x2b00
  384. #define STM32F746_PC11_FUNC_SPI3_MISO 0x2b07
  385. #define STM32F746_PC11_FUNC_USART3_RX 0x2b08
  386. #define STM32F746_PC11_FUNC_UART4_RX 0x2b09
  387. #define STM32F746_PC11_FUNC_QUADSPI_BK2_NCS 0x2b0a
  388. #define STM32F746_PC11_FUNC_SDMMC1_D3 0x2b0d
  389. #define STM32F746_PC11_FUNC_DCMI_D4 0x2b0e
  390. #define STM32F746_PC11_FUNC_EVENTOUT 0x2b10
  391. #define STM32F746_PC11_FUNC_ANALOG 0x2b11
  392. #define STM32F746_PC12_FUNC_GPIO 0x2c00
  393. #define STM32F746_PC12_FUNC_TRACED3 0x2c01
  394. #define STM32F746_PC12_FUNC_SPI3_MOSI_I2S3_SD 0x2c07
  395. #define STM32F746_PC12_FUNC_USART3_CK 0x2c08
  396. #define STM32F746_PC12_FUNC_UART5_TX 0x2c09
  397. #define STM32F746_PC12_FUNC_SDMMC1_CK 0x2c0d
  398. #define STM32F746_PC12_FUNC_DCMI_D9 0x2c0e
  399. #define STM32F746_PC12_FUNC_EVENTOUT 0x2c10
  400. #define STM32F746_PC12_FUNC_ANALOG 0x2c11
  401. #define STM32F746_PC13_FUNC_GPIO 0x2d00
  402. #define STM32F746_PC13_FUNC_EVENTOUT 0x2d10
  403. #define STM32F746_PC13_FUNC_ANALOG 0x2d11
  404. #define STM32F746_PC14_FUNC_GPIO 0x2e00
  405. #define STM32F746_PC14_FUNC_EVENTOUT 0x2e10
  406. #define STM32F746_PC14_FUNC_ANALOG 0x2e11
  407. #define STM32F746_PC15_FUNC_GPIO 0x2f00
  408. #define STM32F746_PC15_FUNC_EVENTOUT 0x2f10
  409. #define STM32F746_PC15_FUNC_ANALOG 0x2f11
  410. #define STM32F746_PD0_FUNC_GPIO 0x3000
  411. #define STM32F746_PD0_FUNC_CAN1_RX 0x300a
  412. #define STM32F746_PD0_FUNC_FMC_D2 0x300d
  413. #define STM32F746_PD0_FUNC_EVENTOUT 0x3010
  414. #define STM32F746_PD0_FUNC_ANALOG 0x3011
  415. #define STM32F746_PD1_FUNC_GPIO 0x3100
  416. #define STM32F746_PD1_FUNC_CAN1_TX 0x310a
  417. #define STM32F746_PD1_FUNC_FMC_D3 0x310d
  418. #define STM32F746_PD1_FUNC_EVENTOUT 0x3110
  419. #define STM32F746_PD1_FUNC_ANALOG 0x3111
  420. #define STM32F746_PD2_FUNC_GPIO 0x3200
  421. #define STM32F746_PD2_FUNC_TRACED2 0x3201
  422. #define STM32F746_PD2_FUNC_TIM3_ETR 0x3203
  423. #define STM32F746_PD2_FUNC_UART5_RX 0x3209
  424. #define STM32F746_PD2_FUNC_SDMMC1_CMD 0x320d
  425. #define STM32F746_PD2_FUNC_DCMI_D11 0x320e
  426. #define STM32F746_PD2_FUNC_EVENTOUT 0x3210
  427. #define STM32F746_PD2_FUNC_ANALOG 0x3211
  428. #define STM32F746_PD3_FUNC_GPIO 0x3300
  429. #define STM32F746_PD3_FUNC_SPI2_SCK_I2S2_CK 0x3306
  430. #define STM32F746_PD3_FUNC_USART2_CTS 0x3308
  431. #define STM32F746_PD3_FUNC_FMC_CLK 0x330d
  432. #define STM32F746_PD3_FUNC_DCMI_D5 0x330e
  433. #define STM32F746_PD3_FUNC_LCD_G7 0x330f
  434. #define STM32F746_PD3_FUNC_EVENTOUT 0x3310
  435. #define STM32F746_PD3_FUNC_ANALOG 0x3311
  436. #define STM32F746_PD4_FUNC_GPIO 0x3400
  437. #define STM32F746_PD4_FUNC_USART2_RTS 0x3408
  438. #define STM32F746_PD4_FUNC_FMC_NOE 0x340d
  439. #define STM32F746_PD4_FUNC_EVENTOUT 0x3410
  440. #define STM32F746_PD4_FUNC_ANALOG 0x3411
  441. #define STM32F746_PD5_FUNC_GPIO 0x3500
  442. #define STM32F746_PD5_FUNC_USART2_TX 0x3508
  443. #define STM32F746_PD5_FUNC_FMC_NWE 0x350d
  444. #define STM32F746_PD5_FUNC_EVENTOUT 0x3510
  445. #define STM32F746_PD5_FUNC_ANALOG 0x3511
  446. #define STM32F746_PD6_FUNC_GPIO 0x3600
  447. #define STM32F746_PD6_FUNC_SPI3_MOSI_I2S3_SD 0x3606
  448. #define STM32F746_PD6_FUNC_SAI1_SD_A 0x3607
  449. #define STM32F746_PD6_FUNC_USART2_RX 0x3608
  450. #define STM32F746_PD6_FUNC_FMC_NWAIT 0x360d
  451. #define STM32F746_PD6_FUNC_DCMI_D10 0x360e
  452. #define STM32F746_PD6_FUNC_LCD_B2 0x360f
  453. #define STM32F746_PD6_FUNC_EVENTOUT 0x3610
  454. #define STM32F746_PD6_FUNC_ANALOG 0x3611
  455. #define STM32F746_PD7_FUNC_GPIO 0x3700
  456. #define STM32F746_PD7_FUNC_USART2_CK 0x3708
  457. #define STM32F746_PD7_FUNC_SPDIFRX_IN0 0x3709
  458. #define STM32F746_PD7_FUNC_FMC_NE1 0x370d
  459. #define STM32F746_PD7_FUNC_EVENTOUT 0x3710
  460. #define STM32F746_PD7_FUNC_ANALOG 0x3711
  461. #define STM32F746_PD8_FUNC_GPIO 0x3800
  462. #define STM32F746_PD8_FUNC_USART3_TX 0x3808
  463. #define STM32F746_PD8_FUNC_SPDIFRX_IN1 0x3809
  464. #define STM32F746_PD8_FUNC_FMC_D13 0x380d
  465. #define STM32F746_PD8_FUNC_EVENTOUT 0x3810
  466. #define STM32F746_PD8_FUNC_ANALOG 0x3811
  467. #define STM32F746_PD9_FUNC_GPIO 0x3900
  468. #define STM32F746_PD9_FUNC_USART3_RX 0x3908
  469. #define STM32F746_PD9_FUNC_FMC_D14 0x390d
  470. #define STM32F746_PD9_FUNC_EVENTOUT 0x3910
  471. #define STM32F746_PD9_FUNC_ANALOG 0x3911
  472. #define STM32F746_PD10_FUNC_GPIO 0x3a00
  473. #define STM32F746_PD10_FUNC_USART3_CK 0x3a08
  474. #define STM32F746_PD10_FUNC_FMC_D15 0x3a0d
  475. #define STM32F746_PD10_FUNC_LCD_B3 0x3a0f
  476. #define STM32F746_PD10_FUNC_EVENTOUT 0x3a10
  477. #define STM32F746_PD10_FUNC_ANALOG 0x3a11
  478. #define STM32F746_PD11_FUNC_GPIO 0x3b00
  479. #define STM32F746_PD11_FUNC_I2C4_SMBA 0x3b05
  480. #define STM32F746_PD11_FUNC_USART3_CTS 0x3b08
  481. #define STM32F746_PD11_FUNC_QUADSPI_BK1_IO0 0x3b0a
  482. #define STM32F746_PD11_FUNC_SAI2_SD_A 0x3b0b
  483. #define STM32F746_PD11_FUNC_FMC_A16_FMC_CLE 0x3b0d
  484. #define STM32F746_PD11_FUNC_EVENTOUT 0x3b10
  485. #define STM32F746_PD11_FUNC_ANALOG 0x3b11
  486. #define STM32F746_PD12_FUNC_GPIO 0x3c00
  487. #define STM32F746_PD12_FUNC_TIM4_CH1 0x3c03
  488. #define STM32F746_PD12_FUNC_LPTIM1_IN1 0x3c04
  489. #define STM32F746_PD12_FUNC_I2C4_SCL 0x3c05
  490. #define STM32F746_PD12_FUNC_USART3_RTS 0x3c08
  491. #define STM32F746_PD12_FUNC_QUADSPI_BK1_IO1 0x3c0a
  492. #define STM32F746_PD12_FUNC_SAI2_FS_A 0x3c0b
  493. #define STM32F746_PD12_FUNC_FMC_A17_FMC_ALE 0x3c0d
  494. #define STM32F746_PD12_FUNC_EVENTOUT 0x3c10
  495. #define STM32F746_PD12_FUNC_ANALOG 0x3c11
  496. #define STM32F746_PD13_FUNC_GPIO 0x3d00
  497. #define STM32F746_PD13_FUNC_TIM4_CH2 0x3d03
  498. #define STM32F746_PD13_FUNC_LPTIM1_OUT 0x3d04
  499. #define STM32F746_PD13_FUNC_I2C4_SDA 0x3d05
  500. #define STM32F746_PD13_FUNC_QUADSPI_BK1_IO3 0x3d0a
  501. #define STM32F746_PD13_FUNC_SAI2_SCK_A 0x3d0b
  502. #define STM32F746_PD13_FUNC_FMC_A18 0x3d0d
  503. #define STM32F746_PD13_FUNC_EVENTOUT 0x3d10
  504. #define STM32F746_PD13_FUNC_ANALOG 0x3d11
  505. #define STM32F746_PD14_FUNC_GPIO 0x3e00
  506. #define STM32F746_PD14_FUNC_TIM4_CH3 0x3e03
  507. #define STM32F746_PD14_FUNC_UART8_CTS 0x3e09
  508. #define STM32F746_PD14_FUNC_FMC_D0 0x3e0d
  509. #define STM32F746_PD14_FUNC_EVENTOUT 0x3e10
  510. #define STM32F746_PD14_FUNC_ANALOG 0x3e11
  511. #define STM32F746_PD15_FUNC_GPIO 0x3f00
  512. #define STM32F746_PD15_FUNC_TIM4_CH4 0x3f03
  513. #define STM32F746_PD15_FUNC_UART8_RTS 0x3f09
  514. #define STM32F746_PD15_FUNC_FMC_D1 0x3f0d
  515. #define STM32F746_PD15_FUNC_EVENTOUT 0x3f10
  516. #define STM32F746_PD15_FUNC_ANALOG 0x3f11
  517. #define STM32F746_PE0_FUNC_GPIO 0x4000
  518. #define STM32F746_PE0_FUNC_TIM4_ETR 0x4003
  519. #define STM32F746_PE0_FUNC_LPTIM1_ETR 0x4004
  520. #define STM32F746_PE0_FUNC_UART8_RX 0x4009
  521. #define STM32F746_PE0_FUNC_SAI2_MCLK_A 0x400b
  522. #define STM32F746_PE0_FUNC_FMC_NBL0 0x400d
  523. #define STM32F746_PE0_FUNC_DCMI_D2 0x400e
  524. #define STM32F746_PE0_FUNC_EVENTOUT 0x4010
  525. #define STM32F746_PE0_FUNC_ANALOG 0x4011
  526. #define STM32F746_PE1_FUNC_GPIO 0x4100
  527. #define STM32F746_PE1_FUNC_LPTIM1_IN2 0x4104
  528. #define STM32F746_PE1_FUNC_UART8_TX 0x4109
  529. #define STM32F746_PE1_FUNC_FMC_NBL1 0x410d
  530. #define STM32F746_PE1_FUNC_DCMI_D3 0x410e
  531. #define STM32F746_PE1_FUNC_EVENTOUT 0x4110
  532. #define STM32F746_PE1_FUNC_ANALOG 0x4111
  533. #define STM32F746_PE2_FUNC_GPIO 0x4200
  534. #define STM32F746_PE2_FUNC_TRACECLK 0x4201
  535. #define STM32F746_PE2_FUNC_SPI4_SCK 0x4206
  536. #define STM32F746_PE2_FUNC_SAI1_MCLK_A 0x4207
  537. #define STM32F746_PE2_FUNC_QUADSPI_BK1_IO2 0x420a
  538. #define STM32F746_PE2_FUNC_ETH_MII_TXD3 0x420c
  539. #define STM32F746_PE2_FUNC_FMC_A23 0x420d
  540. #define STM32F746_PE2_FUNC_EVENTOUT 0x4210
  541. #define STM32F746_PE2_FUNC_ANALOG 0x4211
  542. #define STM32F746_PE3_FUNC_GPIO 0x4300
  543. #define STM32F746_PE3_FUNC_TRACED0 0x4301
  544. #define STM32F746_PE3_FUNC_SAI1_SD_B 0x4307
  545. #define STM32F746_PE3_FUNC_FMC_A19 0x430d
  546. #define STM32F746_PE3_FUNC_EVENTOUT 0x4310
  547. #define STM32F746_PE3_FUNC_ANALOG 0x4311
  548. #define STM32F746_PE4_FUNC_GPIO 0x4400
  549. #define STM32F746_PE4_FUNC_TRACED1 0x4401
  550. #define STM32F746_PE4_FUNC_SPI4_NSS 0x4406
  551. #define STM32F746_PE4_FUNC_SAI1_FS_A 0x4407
  552. #define STM32F746_PE4_FUNC_FMC_A20 0x440d
  553. #define STM32F746_PE4_FUNC_DCMI_D4 0x440e
  554. #define STM32F746_PE4_FUNC_LCD_B0 0x440f
  555. #define STM32F746_PE4_FUNC_EVENTOUT 0x4410
  556. #define STM32F746_PE4_FUNC_ANALOG 0x4411
  557. #define STM32F746_PE5_FUNC_GPIO 0x4500
  558. #define STM32F746_PE5_FUNC_TRACED2 0x4501
  559. #define STM32F746_PE5_FUNC_TIM9_CH1 0x4504
  560. #define STM32F746_PE5_FUNC_SPI4_MISO 0x4506
  561. #define STM32F746_PE5_FUNC_SAI1_SCK_A 0x4507
  562. #define STM32F746_PE5_FUNC_FMC_A21 0x450d
  563. #define STM32F746_PE5_FUNC_DCMI_D6 0x450e
  564. #define STM32F746_PE5_FUNC_LCD_G0 0x450f
  565. #define STM32F746_PE5_FUNC_EVENTOUT 0x4510
  566. #define STM32F746_PE5_FUNC_ANALOG 0x4511
  567. #define STM32F746_PE6_FUNC_GPIO 0x4600
  568. #define STM32F746_PE6_FUNC_TRACED3 0x4601
  569. #define STM32F746_PE6_FUNC_TIM1_BKIN2 0x4602
  570. #define STM32F746_PE6_FUNC_TIM9_CH2 0x4604
  571. #define STM32F746_PE6_FUNC_SPI4_MOSI 0x4606
  572. #define STM32F746_PE6_FUNC_SAI1_SD_A 0x4607
  573. #define STM32F746_PE6_FUNC_SAI2_MCLK_B 0x460b
  574. #define STM32F746_PE6_FUNC_FMC_A22 0x460d
  575. #define STM32F746_PE6_FUNC_DCMI_D7 0x460e
  576. #define STM32F746_PE6_FUNC_LCD_G1 0x460f
  577. #define STM32F746_PE6_FUNC_EVENTOUT 0x4610
  578. #define STM32F746_PE6_FUNC_ANALOG 0x4611
  579. #define STM32F746_PE7_FUNC_GPIO 0x4700
  580. #define STM32F746_PE7_FUNC_TIM1_ETR 0x4702
  581. #define STM32F746_PE7_FUNC_UART7_RX 0x4709
  582. #define STM32F746_PE7_FUNC_QUADSPI_BK2_IO0 0x470b
  583. #define STM32F746_PE7_FUNC_FMC_D4 0x470d
  584. #define STM32F746_PE7_FUNC_EVENTOUT 0x4710
  585. #define STM32F746_PE7_FUNC_ANALOG 0x4711
  586. #define STM32F746_PE8_FUNC_GPIO 0x4800
  587. #define STM32F746_PE8_FUNC_TIM1_CH1N 0x4802
  588. #define STM32F746_PE8_FUNC_UART7_TX 0x4809
  589. #define STM32F746_PE8_FUNC_QUADSPI_BK2_IO1 0x480b
  590. #define STM32F746_PE8_FUNC_FMC_D5 0x480d
  591. #define STM32F746_PE8_FUNC_EVENTOUT 0x4810
  592. #define STM32F746_PE8_FUNC_ANALOG 0x4811
  593. #define STM32F746_PE9_FUNC_GPIO 0x4900
  594. #define STM32F746_PE9_FUNC_TIM1_CH1 0x4902
  595. #define STM32F746_PE9_FUNC_UART7_RTS 0x4909
  596. #define STM32F746_PE9_FUNC_QUADSPI_BK2_IO2 0x490b
  597. #define STM32F746_PE9_FUNC_FMC_D6 0x490d
  598. #define STM32F746_PE9_FUNC_EVENTOUT 0x4910
  599. #define STM32F746_PE9_FUNC_ANALOG 0x4911
  600. #define STM32F746_PE10_FUNC_GPIO 0x4a00
  601. #define STM32F746_PE10_FUNC_TIM1_CH2N 0x4a02
  602. #define STM32F746_PE10_FUNC_UART7_CTS 0x4a09
  603. #define STM32F746_PE10_FUNC_QUADSPI_BK2_IO3 0x4a0b
  604. #define STM32F746_PE10_FUNC_FMC_D7 0x4a0d
  605. #define STM32F746_PE10_FUNC_EVENTOUT 0x4a10
  606. #define STM32F746_PE10_FUNC_ANALOG 0x4a11
  607. #define STM32F746_PE11_FUNC_GPIO 0x4b00
  608. #define STM32F746_PE11_FUNC_TIM1_CH2 0x4b02
  609. #define STM32F746_PE11_FUNC_SPI4_NSS 0x4b06
  610. #define STM32F746_PE11_FUNC_SAI2_SD_B 0x4b0b
  611. #define STM32F746_PE11_FUNC_FMC_D8 0x4b0d
  612. #define STM32F746_PE11_FUNC_LCD_G3 0x4b0f
  613. #define STM32F746_PE11_FUNC_EVENTOUT 0x4b10
  614. #define STM32F746_PE11_FUNC_ANALOG 0x4b11
  615. #define STM32F746_PE12_FUNC_GPIO 0x4c00
  616. #define STM32F746_PE12_FUNC_TIM1_CH3N 0x4c02
  617. #define STM32F746_PE12_FUNC_SPI4_SCK 0x4c06
  618. #define STM32F746_PE12_FUNC_SAI2_SCK_B 0x4c0b
  619. #define STM32F746_PE12_FUNC_FMC_D9 0x4c0d
  620. #define STM32F746_PE12_FUNC_LCD_B4 0x4c0f
  621. #define STM32F746_PE12_FUNC_EVENTOUT 0x4c10
  622. #define STM32F746_PE12_FUNC_ANALOG 0x4c11
  623. #define STM32F746_PE13_FUNC_GPIO 0x4d00
  624. #define STM32F746_PE13_FUNC_TIM1_CH3 0x4d02
  625. #define STM32F746_PE13_FUNC_SPI4_MISO 0x4d06
  626. #define STM32F746_PE13_FUNC_SAI2_FS_B 0x4d0b
  627. #define STM32F746_PE13_FUNC_FMC_D10 0x4d0d
  628. #define STM32F746_PE13_FUNC_LCD_DE 0x4d0f
  629. #define STM32F746_PE13_FUNC_EVENTOUT 0x4d10
  630. #define STM32F746_PE13_FUNC_ANALOG 0x4d11
  631. #define STM32F746_PE14_FUNC_GPIO 0x4e00
  632. #define STM32F746_PE14_FUNC_TIM1_CH4 0x4e02
  633. #define STM32F746_PE14_FUNC_SPI4_MOSI 0x4e06
  634. #define STM32F746_PE14_FUNC_SAI2_MCLK_B 0x4e0b
  635. #define STM32F746_PE14_FUNC_FMC_D11 0x4e0d
  636. #define STM32F746_PE14_FUNC_LCD_CLK 0x4e0f
  637. #define STM32F746_PE14_FUNC_EVENTOUT 0x4e10
  638. #define STM32F746_PE14_FUNC_ANALOG 0x4e11
  639. #define STM32F746_PE15_FUNC_GPIO 0x4f00
  640. #define STM32F746_PE15_FUNC_TIM1_BKIN 0x4f02
  641. #define STM32F746_PE15_FUNC_FMC_D12 0x4f0d
  642. #define STM32F746_PE15_FUNC_LCD_R7 0x4f0f
  643. #define STM32F746_PE15_FUNC_EVENTOUT 0x4f10
  644. #define STM32F746_PE15_FUNC_ANALOG 0x4f11
  645. #define STM32F746_PF0_FUNC_GPIO 0x5000
  646. #define STM32F746_PF0_FUNC_I2C2_SDA 0x5005
  647. #define STM32F746_PF0_FUNC_FMC_A0 0x500d
  648. #define STM32F746_PF0_FUNC_EVENTOUT 0x5010
  649. #define STM32F746_PF0_FUNC_ANALOG 0x5011
  650. #define STM32F746_PF1_FUNC_GPIO 0x5100
  651. #define STM32F746_PF1_FUNC_I2C2_SCL 0x5105
  652. #define STM32F746_PF1_FUNC_FMC_A1 0x510d
  653. #define STM32F746_PF1_FUNC_EVENTOUT 0x5110
  654. #define STM32F746_PF1_FUNC_ANALOG 0x5111
  655. #define STM32F746_PF2_FUNC_GPIO 0x5200
  656. #define STM32F746_PF2_FUNC_I2C2_SMBA 0x5205
  657. #define STM32F746_PF2_FUNC_FMC_A2 0x520d
  658. #define STM32F746_PF2_FUNC_EVENTOUT 0x5210
  659. #define STM32F746_PF2_FUNC_ANALOG 0x5211
  660. #define STM32F746_PF3_FUNC_GPIO 0x5300
  661. #define STM32F746_PF3_FUNC_FMC_A3 0x530d
  662. #define STM32F746_PF3_FUNC_EVENTOUT 0x5310
  663. #define STM32F746_PF3_FUNC_ANALOG 0x5311
  664. #define STM32F746_PF4_FUNC_GPIO 0x5400
  665. #define STM32F746_PF4_FUNC_FMC_A4 0x540d
  666. #define STM32F746_PF4_FUNC_EVENTOUT 0x5410
  667. #define STM32F746_PF4_FUNC_ANALOG 0x5411
  668. #define STM32F746_PF5_FUNC_GPIO 0x5500
  669. #define STM32F746_PF5_FUNC_FMC_A5 0x550d
  670. #define STM32F746_PF5_FUNC_EVENTOUT 0x5510
  671. #define STM32F746_PF5_FUNC_ANALOG 0x5511
  672. #define STM32F746_PF6_FUNC_GPIO 0x5600
  673. #define STM32F746_PF6_FUNC_TIM10_CH1 0x5604
  674. #define STM32F746_PF6_FUNC_SPI5_NSS 0x5606
  675. #define STM32F746_PF6_FUNC_SAI1_SD_B 0x5607
  676. #define STM32F746_PF6_FUNC_UART7_RX 0x5609
  677. #define STM32F746_PF6_FUNC_QUADSPI_BK1_IO3 0x560a
  678. #define STM32F746_PF6_FUNC_EVENTOUT 0x5610
  679. #define STM32F746_PF6_FUNC_ANALOG 0x5611
  680. #define STM32F746_PF7_FUNC_GPIO 0x5700
  681. #define STM32F746_PF7_FUNC_TIM11_CH1 0x5704
  682. #define STM32F746_PF7_FUNC_SPI5_SCK 0x5706
  683. #define STM32F746_PF7_FUNC_SAI1_MCLK_B 0x5707
  684. #define STM32F746_PF7_FUNC_UART7_TX 0x5709
  685. #define STM32F746_PF7_FUNC_QUADSPI_BK1_IO2 0x570a
  686. #define STM32F746_PF7_FUNC_EVENTOUT 0x5710
  687. #define STM32F746_PF7_FUNC_ANALOG 0x5711
  688. #define STM32F746_PF8_FUNC_GPIO 0x5800
  689. #define STM32F746_PF8_FUNC_SPI5_MISO 0x5806
  690. #define STM32F746_PF8_FUNC_SAI1_SCK_B 0x5807
  691. #define STM32F746_PF8_FUNC_UART7_RTS 0x5809
  692. #define STM32F746_PF8_FUNC_TIM13_CH1 0x580a
  693. #define STM32F746_PF8_FUNC_QUADSPI_BK1_IO0 0x580b
  694. #define STM32F746_PF8_FUNC_EVENTOUT 0x5810
  695. #define STM32F746_PF8_FUNC_ANALOG 0x5811
  696. #define STM32F746_PF9_FUNC_GPIO 0x5900
  697. #define STM32F746_PF9_FUNC_SPI5_MOSI 0x5906
  698. #define STM32F746_PF9_FUNC_SAI1_FS_B 0x5907
  699. #define STM32F746_PF9_FUNC_UART7_CTS 0x5909
  700. #define STM32F746_PF9_FUNC_TIM14_CH1 0x590a
  701. #define STM32F746_PF9_FUNC_QUADSPI_BK1_IO1 0x590b
  702. #define STM32F746_PF9_FUNC_EVENTOUT 0x5910
  703. #define STM32F746_PF9_FUNC_ANALOG 0x5911
  704. #define STM32F746_PF10_FUNC_GPIO 0x5a00
  705. #define STM32F746_PF10_FUNC_DCMI_D11 0x5a0e
  706. #define STM32F746_PF10_FUNC_LCD_DE 0x5a0f
  707. #define STM32F746_PF10_FUNC_EVENTOUT 0x5a10
  708. #define STM32F746_PF10_FUNC_ANALOG 0x5a11
  709. #define STM32F746_PF11_FUNC_GPIO 0x5b00
  710. #define STM32F746_PF11_FUNC_SPI5_MOSI 0x5b06
  711. #define STM32F746_PF11_FUNC_SAI2_SD_B 0x5b0b
  712. #define STM32F746_PF11_FUNC_FMC_SDNRAS 0x5b0d
  713. #define STM32F746_PF11_FUNC_DCMI_D12 0x5b0e
  714. #define STM32F746_PF11_FUNC_EVENTOUT 0x5b10
  715. #define STM32F746_PF11_FUNC_ANALOG 0x5b11
  716. #define STM32F746_PF12_FUNC_GPIO 0x5c00
  717. #define STM32F746_PF12_FUNC_FMC_A6 0x5c0d
  718. #define STM32F746_PF12_FUNC_EVENTOUT 0x5c10
  719. #define STM32F746_PF12_FUNC_ANALOG 0x5c11
  720. #define STM32F746_PF13_FUNC_GPIO 0x5d00
  721. #define STM32F746_PF13_FUNC_I2C4_SMBA 0x5d05
  722. #define STM32F746_PF13_FUNC_FMC_A7 0x5d0d
  723. #define STM32F746_PF13_FUNC_EVENTOUT 0x5d10
  724. #define STM32F746_PF13_FUNC_ANALOG 0x5d11
  725. #define STM32F746_PF14_FUNC_GPIO 0x5e00
  726. #define STM32F746_PF14_FUNC_I2C4_SCL 0x5e05
  727. #define STM32F746_PF14_FUNC_FMC_A8 0x5e0d
  728. #define STM32F746_PF14_FUNC_EVENTOUT 0x5e10
  729. #define STM32F746_PF14_FUNC_ANALOG 0x5e11
  730. #define STM32F746_PF15_FUNC_GPIO 0x5f00
  731. #define STM32F746_PF15_FUNC_I2C4_SDA 0x5f05
  732. #define STM32F746_PF15_FUNC_FMC_A9 0x5f0d
  733. #define STM32F746_PF15_FUNC_EVENTOUT 0x5f10
  734. #define STM32F746_PF15_FUNC_ANALOG 0x5f11
  735. #define STM32F746_PG0_FUNC_GPIO 0x6000
  736. #define STM32F746_PG0_FUNC_FMC_A10 0x600d
  737. #define STM32F746_PG0_FUNC_EVENTOUT 0x6010
  738. #define STM32F746_PG0_FUNC_ANALOG 0x6011
  739. #define STM32F746_PG1_FUNC_GPIO 0x6100
  740. #define STM32F746_PG1_FUNC_FMC_A11 0x610d
  741. #define STM32F746_PG1_FUNC_EVENTOUT 0x6110
  742. #define STM32F746_PG1_FUNC_ANALOG 0x6111
  743. #define STM32F746_PG2_FUNC_GPIO 0x6200
  744. #define STM32F746_PG2_FUNC_FMC_A12 0x620d
  745. #define STM32F746_PG2_FUNC_EVENTOUT 0x6210
  746. #define STM32F746_PG2_FUNC_ANALOG 0x6211
  747. #define STM32F746_PG3_FUNC_GPIO 0x6300
  748. #define STM32F746_PG3_FUNC_FMC_A13 0x630d
  749. #define STM32F746_PG3_FUNC_EVENTOUT 0x6310
  750. #define STM32F746_PG3_FUNC_ANALOG 0x6311
  751. #define STM32F746_PG4_FUNC_GPIO 0x6400
  752. #define STM32F746_PG4_FUNC_FMC_A14_FMC_BA0 0x640d
  753. #define STM32F746_PG4_FUNC_EVENTOUT 0x6410
  754. #define STM32F746_PG4_FUNC_ANALOG 0x6411
  755. #define STM32F746_PG5_FUNC_GPIO 0x6500
  756. #define STM32F746_PG5_FUNC_FMC_A15_FMC_BA1 0x650d
  757. #define STM32F746_PG5_FUNC_EVENTOUT 0x6510
  758. #define STM32F746_PG5_FUNC_ANALOG 0x6511
  759. #define STM32F746_PG6_FUNC_GPIO 0x6600
  760. #define STM32F746_PG6_FUNC_DCMI_D12 0x660e
  761. #define STM32F746_PG6_FUNC_LCD_R7 0x660f
  762. #define STM32F746_PG6_FUNC_EVENTOUT 0x6610
  763. #define STM32F746_PG6_FUNC_ANALOG 0x6611
  764. #define STM32F746_PG7_FUNC_GPIO 0x6700
  765. #define STM32F746_PG7_FUNC_USART6_CK 0x6709
  766. #define STM32F746_PG7_FUNC_FMC_INT 0x670d
  767. #define STM32F746_PG7_FUNC_DCMI_D13 0x670e
  768. #define STM32F746_PG7_FUNC_LCD_CLK 0x670f
  769. #define STM32F746_PG7_FUNC_EVENTOUT 0x6710
  770. #define STM32F746_PG7_FUNC_ANALOG 0x6711
  771. #define STM32F746_PG8_FUNC_GPIO 0x6800
  772. #define STM32F746_PG8_FUNC_SPI6_NSS 0x6806
  773. #define STM32F746_PG8_FUNC_SPDIFRX_IN2 0x6808
  774. #define STM32F746_PG8_FUNC_USART6_RTS 0x6809
  775. #define STM32F746_PG8_FUNC_ETH_PPS_OUT 0x680c
  776. #define STM32F746_PG8_FUNC_FMC_SDCLK 0x680d
  777. #define STM32F746_PG8_FUNC_EVENTOUT 0x6810
  778. #define STM32F746_PG8_FUNC_ANALOG 0x6811
  779. #define STM32F746_PG9_FUNC_GPIO 0x6900
  780. #define STM32F746_PG9_FUNC_SPDIFRX_IN3 0x6908
  781. #define STM32F746_PG9_FUNC_USART6_RX 0x6909
  782. #define STM32F746_PG9_FUNC_QUADSPI_BK2_IO2 0x690a
  783. #define STM32F746_PG9_FUNC_SAI2_FS_B 0x690b
  784. #define STM32F746_PG9_FUNC_FMC_NE2_FMC_NCE 0x690d
  785. #define STM32F746_PG9_FUNC_DCMI_VSYNC 0x690e
  786. #define STM32F746_PG9_FUNC_EVENTOUT 0x6910
  787. #define STM32F746_PG9_FUNC_ANALOG 0x6911
  788. #define STM32F746_PG10_FUNC_GPIO 0x6a00
  789. #define STM32F746_PG10_FUNC_LCD_G3 0x6a0a
  790. #define STM32F746_PG10_FUNC_SAI2_SD_B 0x6a0b
  791. #define STM32F746_PG10_FUNC_FMC_NE3 0x6a0d
  792. #define STM32F746_PG10_FUNC_DCMI_D2 0x6a0e
  793. #define STM32F746_PG10_FUNC_LCD_B2 0x6a0f
  794. #define STM32F746_PG10_FUNC_EVENTOUT 0x6a10
  795. #define STM32F746_PG10_FUNC_ANALOG 0x6a11
  796. #define STM32F746_PG11_FUNC_GPIO 0x6b00
  797. #define STM32F746_PG11_FUNC_SPDIFRX_IN0 0x6b08
  798. #define STM32F746_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x6b0c
  799. #define STM32F746_PG11_FUNC_DCMI_D3 0x6b0e
  800. #define STM32F746_PG11_FUNC_LCD_B3 0x6b0f
  801. #define STM32F746_PG11_FUNC_EVENTOUT 0x6b10
  802. #define STM32F746_PG11_FUNC_ANALOG 0x6b11
  803. #define STM32F746_PG12_FUNC_GPIO 0x6c00
  804. #define STM32F746_PG12_FUNC_LPTIM1_IN1 0x6c04
  805. #define STM32F746_PG12_FUNC_SPI6_MISO 0x6c06
  806. #define STM32F746_PG12_FUNC_SPDIFRX_IN1 0x6c08
  807. #define STM32F746_PG12_FUNC_USART6_RTS 0x6c09
  808. #define STM32F746_PG12_FUNC_LCD_B4 0x6c0a
  809. #define STM32F746_PG12_FUNC_FMC_NE4 0x6c0d
  810. #define STM32F746_PG12_FUNC_LCD_B1 0x6c0f
  811. #define STM32F746_PG12_FUNC_EVENTOUT 0x6c10
  812. #define STM32F746_PG12_FUNC_ANALOG 0x6c11
  813. #define STM32F746_PG13_FUNC_GPIO 0x6d00
  814. #define STM32F746_PG13_FUNC_TRACED0 0x6d01
  815. #define STM32F746_PG13_FUNC_LPTIM1_OUT 0x6d04
  816. #define STM32F746_PG13_FUNC_SPI6_SCK 0x6d06
  817. #define STM32F746_PG13_FUNC_USART6_CTS 0x6d09
  818. #define STM32F746_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x6d0c
  819. #define STM32F746_PG13_FUNC_FMC_A24 0x6d0d
  820. #define STM32F746_PG13_FUNC_LCD_R0 0x6d0f
  821. #define STM32F746_PG13_FUNC_EVENTOUT 0x6d10
  822. #define STM32F746_PG13_FUNC_ANALOG 0x6d11
  823. #define STM32F746_PG14_FUNC_GPIO 0x6e00
  824. #define STM32F746_PG14_FUNC_TRACED1 0x6e01
  825. #define STM32F746_PG14_FUNC_LPTIM1_ETR 0x6e04
  826. #define STM32F746_PG14_FUNC_SPI6_MOSI 0x6e06
  827. #define STM32F746_PG14_FUNC_USART6_TX 0x6e09
  828. #define STM32F746_PG14_FUNC_QUADSPI_BK2_IO3 0x6e0a
  829. #define STM32F746_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x6e0c
  830. #define STM32F746_PG14_FUNC_FMC_A25 0x6e0d
  831. #define STM32F746_PG14_FUNC_LCD_B0 0x6e0f
  832. #define STM32F746_PG14_FUNC_EVENTOUT 0x6e10
  833. #define STM32F746_PG14_FUNC_ANALOG 0x6e11
  834. #define STM32F746_PG15_FUNC_GPIO 0x6f00
  835. #define STM32F746_PG15_FUNC_USART6_CTS 0x6f09
  836. #define STM32F746_PG15_FUNC_FMC_SDNCAS 0x6f0d
  837. #define STM32F746_PG15_FUNC_DCMI_D13 0x6f0e
  838. #define STM32F746_PG15_FUNC_EVENTOUT 0x6f10
  839. #define STM32F746_PG15_FUNC_ANALOG 0x6f11
  840. #define STM32F746_PH0_FUNC_GPIO 0x7000
  841. #define STM32F746_PH0_FUNC_EVENTOUT 0x7010
  842. #define STM32F746_PH0_FUNC_ANALOG 0x7011
  843. #define STM32F746_PH1_FUNC_GPIO 0x7100
  844. #define STM32F746_PH1_FUNC_EVENTOUT 0x7110
  845. #define STM32F746_PH1_FUNC_ANALOG 0x7111
  846. #define STM32F746_PH2_FUNC_GPIO 0x7200
  847. #define STM32F746_PH2_FUNC_LPTIM1_IN2 0x7204
  848. #define STM32F746_PH2_FUNC_QUADSPI_BK2_IO0 0x720a
  849. #define STM32F746_PH2_FUNC_SAI2_SCK_B 0x720b
  850. #define STM32F746_PH2_FUNC_ETH_MII_CRS 0x720c
  851. #define STM32F746_PH2_FUNC_FMC_SDCKE0 0x720d
  852. #define STM32F746_PH2_FUNC_LCD_R0 0x720f
  853. #define STM32F746_PH2_FUNC_EVENTOUT 0x7210
  854. #define STM32F746_PH2_FUNC_ANALOG 0x7211
  855. #define STM32F746_PH3_FUNC_GPIO 0x7300
  856. #define STM32F746_PH3_FUNC_QUADSPI_BK2_IO1 0x730a
  857. #define STM32F746_PH3_FUNC_SAI2_MCLK_B 0x730b
  858. #define STM32F746_PH3_FUNC_ETH_MII_COL 0x730c
  859. #define STM32F746_PH3_FUNC_FMC_SDNE0 0x730d
  860. #define STM32F746_PH3_FUNC_LCD_R1 0x730f
  861. #define STM32F746_PH3_FUNC_EVENTOUT 0x7310
  862. #define STM32F746_PH3_FUNC_ANALOG 0x7311
  863. #define STM32F746_PH4_FUNC_GPIO 0x7400
  864. #define STM32F746_PH4_FUNC_I2C2_SCL 0x7405
  865. #define STM32F746_PH4_FUNC_OTG_HS_ULPI_NXT 0x740b
  866. #define STM32F746_PH4_FUNC_EVENTOUT 0x7410
  867. #define STM32F746_PH4_FUNC_ANALOG 0x7411
  868. #define STM32F746_PH5_FUNC_GPIO 0x7500
  869. #define STM32F746_PH5_FUNC_I2C2_SDA 0x7505
  870. #define STM32F746_PH5_FUNC_SPI5_NSS 0x7506
  871. #define STM32F746_PH5_FUNC_FMC_SDNWE 0x750d
  872. #define STM32F746_PH5_FUNC_EVENTOUT 0x7510
  873. #define STM32F746_PH5_FUNC_ANALOG 0x7511
  874. #define STM32F746_PH6_FUNC_GPIO 0x7600
  875. #define STM32F746_PH6_FUNC_I2C2_SMBA 0x7605
  876. #define STM32F746_PH6_FUNC_SPI5_SCK 0x7606
  877. #define STM32F746_PH6_FUNC_TIM12_CH1 0x760a
  878. #define STM32F746_PH6_FUNC_ETH_MII_RXD2 0x760c
  879. #define STM32F746_PH6_FUNC_FMC_SDNE1 0x760d
  880. #define STM32F746_PH6_FUNC_DCMI_D8 0x760e
  881. #define STM32F746_PH6_FUNC_EVENTOUT 0x7610
  882. #define STM32F746_PH6_FUNC_ANALOG 0x7611
  883. #define STM32F746_PH7_FUNC_GPIO 0x7700
  884. #define STM32F746_PH7_FUNC_I2C3_SCL 0x7705
  885. #define STM32F746_PH7_FUNC_SPI5_MISO 0x7706
  886. #define STM32F746_PH7_FUNC_ETH_MII_RXD3 0x770c
  887. #define STM32F746_PH7_FUNC_FMC_SDCKE1 0x770d
  888. #define STM32F746_PH7_FUNC_DCMI_D9 0x770e
  889. #define STM32F746_PH7_FUNC_EVENTOUT 0x7710
  890. #define STM32F746_PH7_FUNC_ANALOG 0x7711
  891. #define STM32F746_PH8_FUNC_GPIO 0x7800
  892. #define STM32F746_PH8_FUNC_I2C3_SDA 0x7805
  893. #define STM32F746_PH8_FUNC_FMC_D16 0x780d
  894. #define STM32F746_PH8_FUNC_DCMI_HSYNC 0x780e
  895. #define STM32F746_PH8_FUNC_LCD_R2 0x780f
  896. #define STM32F746_PH8_FUNC_EVENTOUT 0x7810
  897. #define STM32F746_PH8_FUNC_ANALOG 0x7811
  898. #define STM32F746_PH9_FUNC_GPIO 0x7900
  899. #define STM32F746_PH9_FUNC_I2C3_SMBA 0x7905
  900. #define STM32F746_PH9_FUNC_TIM12_CH2 0x790a
  901. #define STM32F746_PH9_FUNC_FMC_D17 0x790d
  902. #define STM32F746_PH9_FUNC_DCMI_D0 0x790e
  903. #define STM32F746_PH9_FUNC_LCD_R3 0x790f
  904. #define STM32F746_PH9_FUNC_EVENTOUT 0x7910
  905. #define STM32F746_PH9_FUNC_ANALOG 0x7911
  906. #define STM32F746_PH10_FUNC_GPIO 0x7a00
  907. #define STM32F746_PH10_FUNC_TIM5_CH1 0x7a03
  908. #define STM32F746_PH10_FUNC_I2C4_SMBA 0x7a05
  909. #define STM32F746_PH10_FUNC_FMC_D18 0x7a0d
  910. #define STM32F746_PH10_FUNC_DCMI_D1 0x7a0e
  911. #define STM32F746_PH10_FUNC_LCD_R4 0x7a0f
  912. #define STM32F746_PH10_FUNC_EVENTOUT 0x7a10
  913. #define STM32F746_PH10_FUNC_ANALOG 0x7a11
  914. #define STM32F746_PH11_FUNC_GPIO 0x7b00
  915. #define STM32F746_PH11_FUNC_TIM5_CH2 0x7b03
  916. #define STM32F746_PH11_FUNC_I2C4_SCL 0x7b05
  917. #define STM32F746_PH11_FUNC_FMC_D19 0x7b0d
  918. #define STM32F746_PH11_FUNC_DCMI_D2 0x7b0e
  919. #define STM32F746_PH11_FUNC_LCD_R5 0x7b0f
  920. #define STM32F746_PH11_FUNC_EVENTOUT 0x7b10
  921. #define STM32F746_PH11_FUNC_ANALOG 0x7b11
  922. #define STM32F746_PH12_FUNC_GPIO 0x7c00
  923. #define STM32F746_PH12_FUNC_TIM5_CH3 0x7c03
  924. #define STM32F746_PH12_FUNC_I2C4_SDA 0x7c05
  925. #define STM32F746_PH12_FUNC_FMC_D20 0x7c0d
  926. #define STM32F746_PH12_FUNC_DCMI_D3 0x7c0e
  927. #define STM32F746_PH12_FUNC_LCD_R6 0x7c0f
  928. #define STM32F746_PH12_FUNC_EVENTOUT 0x7c10
  929. #define STM32F746_PH12_FUNC_ANALOG 0x7c11
  930. #define STM32F746_PH13_FUNC_GPIO 0x7d00
  931. #define STM32F746_PH13_FUNC_TIM8_CH1N 0x7d04
  932. #define STM32F746_PH13_FUNC_CAN1_TX 0x7d0a
  933. #define STM32F746_PH13_FUNC_FMC_D21 0x7d0d
  934. #define STM32F746_PH13_FUNC_LCD_G2 0x7d0f
  935. #define STM32F746_PH13_FUNC_EVENTOUT 0x7d10
  936. #define STM32F746_PH13_FUNC_ANALOG 0x7d11
  937. #define STM32F746_PH14_FUNC_GPIO 0x7e00
  938. #define STM32F746_PH14_FUNC_TIM8_CH2N 0x7e04
  939. #define STM32F746_PH14_FUNC_FMC_D22 0x7e0d
  940. #define STM32F746_PH14_FUNC_DCMI_D4 0x7e0e
  941. #define STM32F746_PH14_FUNC_LCD_G3 0x7e0f
  942. #define STM32F746_PH14_FUNC_EVENTOUT 0x7e10
  943. #define STM32F746_PH14_FUNC_ANALOG 0x7e11
  944. #define STM32F746_PH15_FUNC_GPIO 0x7f00
  945. #define STM32F746_PH15_FUNC_TIM8_CH3N 0x7f04
  946. #define STM32F746_PH15_FUNC_FMC_D23 0x7f0d
  947. #define STM32F746_PH15_FUNC_DCMI_D11 0x7f0e
  948. #define STM32F746_PH15_FUNC_LCD_G4 0x7f0f
  949. #define STM32F746_PH15_FUNC_EVENTOUT 0x7f10
  950. #define STM32F746_PH15_FUNC_ANALOG 0x7f11
  951. #define STM32F746_PI0_FUNC_GPIO 0x8000
  952. #define STM32F746_PI0_FUNC_TIM5_CH4 0x8003
  953. #define STM32F746_PI0_FUNC_SPI2_NSS_I2S2_WS 0x8006
  954. #define STM32F746_PI0_FUNC_FMC_D24 0x800d
  955. #define STM32F746_PI0_FUNC_DCMI_D13 0x800e
  956. #define STM32F746_PI0_FUNC_LCD_G5 0x800f
  957. #define STM32F746_PI0_FUNC_EVENTOUT 0x8010
  958. #define STM32F746_PI0_FUNC_ANALOG 0x8011
  959. #define STM32F746_PI1_FUNC_GPIO 0x8100
  960. #define STM32F746_PI1_FUNC_TIM8_BKIN2 0x8104
  961. #define STM32F746_PI1_FUNC_SPI2_SCK_I2S2_CK 0x8106
  962. #define STM32F746_PI1_FUNC_FMC_D25 0x810d
  963. #define STM32F746_PI1_FUNC_DCMI_D8 0x810e
  964. #define STM32F746_PI1_FUNC_LCD_G6 0x810f
  965. #define STM32F746_PI1_FUNC_EVENTOUT 0x8110
  966. #define STM32F746_PI1_FUNC_ANALOG 0x8111
  967. #define STM32F746_PI2_FUNC_GPIO 0x8200
  968. #define STM32F746_PI2_FUNC_TIM8_CH4 0x8204
  969. #define STM32F746_PI2_FUNC_SPI2_MISO 0x8206
  970. #define STM32F746_PI2_FUNC_FMC_D26 0x820d
  971. #define STM32F746_PI2_FUNC_DCMI_D9 0x820e
  972. #define STM32F746_PI2_FUNC_LCD_G7 0x820f
  973. #define STM32F746_PI2_FUNC_EVENTOUT 0x8210
  974. #define STM32F746_PI2_FUNC_ANALOG 0x8211
  975. #define STM32F746_PI3_FUNC_GPIO 0x8300
  976. #define STM32F746_PI3_FUNC_TIM8_ETR 0x8304
  977. #define STM32F746_PI3_FUNC_SPI2_MOSI_I2S2_SD 0x8306
  978. #define STM32F746_PI3_FUNC_FMC_D27 0x830d
  979. #define STM32F746_PI3_FUNC_DCMI_D10 0x830e
  980. #define STM32F746_PI3_FUNC_EVENTOUT 0x8310
  981. #define STM32F746_PI3_FUNC_ANALOG 0x8311
  982. #define STM32F746_PI4_FUNC_GPIO 0x8400
  983. #define STM32F746_PI4_FUNC_TIM8_BKIN 0x8404
  984. #define STM32F746_PI4_FUNC_SAI2_MCLK_A 0x840b
  985. #define STM32F746_PI4_FUNC_FMC_NBL2 0x840d
  986. #define STM32F746_PI4_FUNC_DCMI_D5 0x840e
  987. #define STM32F746_PI4_FUNC_LCD_B4 0x840f
  988. #define STM32F746_PI4_FUNC_EVENTOUT 0x8410
  989. #define STM32F746_PI4_FUNC_ANALOG 0x8411
  990. #define STM32F746_PI5_FUNC_GPIO 0x8500
  991. #define STM32F746_PI5_FUNC_TIM8_CH1 0x8504
  992. #define STM32F746_PI5_FUNC_SAI2_SCK_A 0x850b
  993. #define STM32F746_PI5_FUNC_FMC_NBL3 0x850d
  994. #define STM32F746_PI5_FUNC_DCMI_VSYNC 0x850e
  995. #define STM32F746_PI5_FUNC_LCD_B5 0x850f
  996. #define STM32F746_PI5_FUNC_EVENTOUT 0x8510
  997. #define STM32F746_PI5_FUNC_ANALOG 0x8511
  998. #define STM32F746_PI6_FUNC_GPIO 0x8600
  999. #define STM32F746_PI6_FUNC_TIM8_CH2 0x8604
  1000. #define STM32F746_PI6_FUNC_SAI2_SD_A 0x860b
  1001. #define STM32F746_PI6_FUNC_FMC_D28 0x860d
  1002. #define STM32F746_PI6_FUNC_DCMI_D6 0x860e
  1003. #define STM32F746_PI6_FUNC_LCD_B6 0x860f
  1004. #define STM32F746_PI6_FUNC_EVENTOUT 0x8610
  1005. #define STM32F746_PI6_FUNC_ANALOG 0x8611
  1006. #define STM32F746_PI7_FUNC_GPIO 0x8700
  1007. #define STM32F746_PI7_FUNC_TIM8_CH3 0x8704
  1008. #define STM32F746_PI7_FUNC_SAI2_FS_A 0x870b
  1009. #define STM32F746_PI7_FUNC_FMC_D29 0x870d
  1010. #define STM32F746_PI7_FUNC_DCMI_D7 0x870e
  1011. #define STM32F746_PI7_FUNC_LCD_B7 0x870f
  1012. #define STM32F746_PI7_FUNC_EVENTOUT 0x8710
  1013. #define STM32F746_PI7_FUNC_ANALOG 0x8711
  1014. #define STM32F746_PI8_FUNC_GPIO 0x8800
  1015. #define STM32F746_PI8_FUNC_EVENTOUT 0x8810
  1016. #define STM32F746_PI8_FUNC_ANALOG 0x8811
  1017. #define STM32F746_PI9_FUNC_GPIO 0x8900
  1018. #define STM32F746_PI9_FUNC_CAN1_RX 0x890a
  1019. #define STM32F746_PI9_FUNC_FMC_D30 0x890d
  1020. #define STM32F746_PI9_FUNC_LCD_VSYNC 0x890f
  1021. #define STM32F746_PI9_FUNC_EVENTOUT 0x8910
  1022. #define STM32F746_PI9_FUNC_ANALOG 0x8911
  1023. #define STM32F746_PI10_FUNC_GPIO 0x8a00
  1024. #define STM32F746_PI10_FUNC_ETH_MII_RX_ER 0x8a0c
  1025. #define STM32F746_PI10_FUNC_FMC_D31 0x8a0d
  1026. #define STM32F746_PI10_FUNC_LCD_HSYNC 0x8a0f
  1027. #define STM32F746_PI10_FUNC_EVENTOUT 0x8a10
  1028. #define STM32F746_PI10_FUNC_ANALOG 0x8a11
  1029. #define STM32F746_PI11_FUNC_GPIO 0x8b00
  1030. #define STM32F746_PI11_FUNC_OTG_HS_ULPI_DIR 0x8b0b
  1031. #define STM32F746_PI11_FUNC_EVENTOUT 0x8b10
  1032. #define STM32F746_PI11_FUNC_ANALOG 0x8b11
  1033. #define STM32F746_PI12_FUNC_GPIO 0x8c00
  1034. #define STM32F746_PI12_FUNC_LCD_HSYNC 0x8c0f
  1035. #define STM32F746_PI12_FUNC_EVENTOUT 0x8c10
  1036. #define STM32F746_PI12_FUNC_ANALOG 0x8c11
  1037. #define STM32F746_PI13_FUNC_GPIO 0x8d00
  1038. #define STM32F746_PI13_FUNC_LCD_VSYNC 0x8d0f
  1039. #define STM32F746_PI13_FUNC_EVENTOUT 0x8d10
  1040. #define STM32F746_PI13_FUNC_ANALOG 0x8d11
  1041. #define STM32F746_PI14_FUNC_GPIO 0x8e00
  1042. #define STM32F746_PI14_FUNC_LCD_CLK 0x8e0f
  1043. #define STM32F746_PI14_FUNC_EVENTOUT 0x8e10
  1044. #define STM32F746_PI14_FUNC_ANALOG 0x8e11
  1045. #define STM32F746_PI15_FUNC_GPIO 0x8f00
  1046. #define STM32F746_PI15_FUNC_LCD_R0 0x8f0f
  1047. #define STM32F746_PI15_FUNC_EVENTOUT 0x8f10
  1048. #define STM32F746_PI15_FUNC_ANALOG 0x8f11
  1049. #define STM32F746_PJ0_FUNC_GPIO 0x9000
  1050. #define STM32F746_PJ0_FUNC_LCD_R1 0x900f
  1051. #define STM32F746_PJ0_FUNC_EVENTOUT 0x9010
  1052. #define STM32F746_PJ0_FUNC_ANALOG 0x9011
  1053. #define STM32F746_PJ1_FUNC_GPIO 0x9100
  1054. #define STM32F746_PJ1_FUNC_LCD_R2 0x910f
  1055. #define STM32F746_PJ1_FUNC_EVENTOUT 0x9110
  1056. #define STM32F746_PJ1_FUNC_ANALOG 0x9111
  1057. #define STM32F746_PJ2_FUNC_GPIO 0x9200
  1058. #define STM32F746_PJ2_FUNC_LCD_R3 0x920f
  1059. #define STM32F746_PJ2_FUNC_EVENTOUT 0x9210
  1060. #define STM32F746_PJ2_FUNC_ANALOG 0x9211
  1061. #define STM32F746_PJ3_FUNC_GPIO 0x9300
  1062. #define STM32F746_PJ3_FUNC_LCD_R4 0x930f
  1063. #define STM32F746_PJ3_FUNC_EVENTOUT 0x9310
  1064. #define STM32F746_PJ3_FUNC_ANALOG 0x9311
  1065. #define STM32F746_PJ4_FUNC_GPIO 0x9400
  1066. #define STM32F746_PJ4_FUNC_LCD_R5 0x940f
  1067. #define STM32F746_PJ4_FUNC_EVENTOUT 0x9410
  1068. #define STM32F746_PJ4_FUNC_ANALOG 0x9411
  1069. #define STM32F746_PJ5_FUNC_GPIO 0x9500
  1070. #define STM32F746_PJ5_FUNC_LCD_R6 0x950f
  1071. #define STM32F746_PJ5_FUNC_EVENTOUT 0x9510
  1072. #define STM32F746_PJ5_FUNC_ANALOG 0x9511
  1073. #define STM32F746_PJ6_FUNC_GPIO 0x9600
  1074. #define STM32F746_PJ6_FUNC_LCD_R7 0x960f
  1075. #define STM32F746_PJ6_FUNC_EVENTOUT 0x9610
  1076. #define STM32F746_PJ6_FUNC_ANALOG 0x9611
  1077. #define STM32F746_PJ7_FUNC_GPIO 0x9700
  1078. #define STM32F746_PJ7_FUNC_LCD_G0 0x970f
  1079. #define STM32F746_PJ7_FUNC_EVENTOUT 0x9710
  1080. #define STM32F746_PJ7_FUNC_ANALOG 0x9711
  1081. #define STM32F746_PJ8_FUNC_GPIO 0x9800
  1082. #define STM32F746_PJ8_FUNC_LCD_G1 0x980f
  1083. #define STM32F746_PJ8_FUNC_EVENTOUT 0x9810
  1084. #define STM32F746_PJ8_FUNC_ANALOG 0x9811
  1085. #define STM32F746_PJ9_FUNC_GPIO 0x9900
  1086. #define STM32F746_PJ9_FUNC_LCD_G2 0x990f
  1087. #define STM32F746_PJ9_FUNC_EVENTOUT 0x9910
  1088. #define STM32F746_PJ9_FUNC_ANALOG 0x9911
  1089. #define STM32F746_PJ10_FUNC_GPIO 0x9a00
  1090. #define STM32F746_PJ10_FUNC_LCD_G3 0x9a0f
  1091. #define STM32F746_PJ10_FUNC_EVENTOUT 0x9a10
  1092. #define STM32F746_PJ10_FUNC_ANALOG 0x9a11
  1093. #define STM32F746_PJ11_FUNC_GPIO 0x9b00
  1094. #define STM32F746_PJ11_FUNC_LCD_G4 0x9b0f
  1095. #define STM32F746_PJ11_FUNC_EVENTOUT 0x9b10
  1096. #define STM32F746_PJ11_FUNC_ANALOG 0x9b11
  1097. #define STM32F746_PJ12_FUNC_GPIO 0x9c00
  1098. #define STM32F746_PJ12_FUNC_LCD_B0 0x9c0f
  1099. #define STM32F746_PJ12_FUNC_EVENTOUT 0x9c10
  1100. #define STM32F746_PJ12_FUNC_ANALOG 0x9c11
  1101. #define STM32F746_PJ13_FUNC_GPIO 0x9d00
  1102. #define STM32F746_PJ13_FUNC_LCD_B1 0x9d0f
  1103. #define STM32F746_PJ13_FUNC_EVENTOUT 0x9d10
  1104. #define STM32F746_PJ13_FUNC_ANALOG 0x9d11
  1105. #define STM32F746_PJ14_FUNC_GPIO 0x9e00
  1106. #define STM32F746_PJ14_FUNC_LCD_B2 0x9e0f
  1107. #define STM32F746_PJ14_FUNC_EVENTOUT 0x9e10
  1108. #define STM32F746_PJ14_FUNC_ANALOG 0x9e11
  1109. #define STM32F746_PJ15_FUNC_GPIO 0x9f00
  1110. #define STM32F746_PJ15_FUNC_LCD_B3 0x9f0f
  1111. #define STM32F746_PJ15_FUNC_EVENTOUT 0x9f10
  1112. #define STM32F746_PJ15_FUNC_ANALOG 0x9f11
  1113. #define STM32F746_PK0_FUNC_GPIO 0xa000
  1114. #define STM32F746_PK0_FUNC_LCD_G5 0xa00f
  1115. #define STM32F746_PK0_FUNC_EVENTOUT 0xa010
  1116. #define STM32F746_PK0_FUNC_ANALOG 0xa011
  1117. #define STM32F746_PK1_FUNC_GPIO 0xa100
  1118. #define STM32F746_PK1_FUNC_LCD_G6 0xa10f
  1119. #define STM32F746_PK1_FUNC_EVENTOUT 0xa110
  1120. #define STM32F746_PK1_FUNC_ANALOG 0xa111
  1121. #define STM32F746_PK2_FUNC_GPIO 0xa200
  1122. #define STM32F746_PK2_FUNC_LCD_G7 0xa20f
  1123. #define STM32F746_PK2_FUNC_EVENTOUT 0xa210
  1124. #define STM32F746_PK2_FUNC_ANALOG 0xa211
  1125. #define STM32F746_PK3_FUNC_GPIO 0xa300
  1126. #define STM32F746_PK3_FUNC_LCD_B4 0xa30f
  1127. #define STM32F746_PK3_FUNC_EVENTOUT 0xa310
  1128. #define STM32F746_PK3_FUNC_ANALOG 0xa311
  1129. #define STM32F746_PK4_FUNC_GPIO 0xa400
  1130. #define STM32F746_PK4_FUNC_LCD_B5 0xa40f
  1131. #define STM32F746_PK4_FUNC_EVENTOUT 0xa410
  1132. #define STM32F746_PK4_FUNC_ANALOG 0xa411
  1133. #define STM32F746_PK5_FUNC_GPIO 0xa500
  1134. #define STM32F746_PK5_FUNC_LCD_B6 0xa50f
  1135. #define STM32F746_PK5_FUNC_EVENTOUT 0xa510
  1136. #define STM32F746_PK5_FUNC_ANALOG 0xa511
  1137. #define STM32F746_PK6_FUNC_GPIO 0xa600
  1138. #define STM32F746_PK6_FUNC_LCD_B7 0xa60f
  1139. #define STM32F746_PK6_FUNC_EVENTOUT 0xa610
  1140. #define STM32F746_PK6_FUNC_ANALOG 0xa611
  1141. #define STM32F746_PK7_FUNC_GPIO 0xa700
  1142. #define STM32F746_PK7_FUNC_LCD_DE 0xa70f
  1143. #define STM32F746_PK7_FUNC_EVENTOUT 0xa710
  1144. #define STM32F746_PK7_FUNC_ANALOG 0xa711
  1145. #endif /* _DT_BINDINGS_STM32F746_PINFUNC_H */