emu10k1x.c 48 KB

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  1. /*
  2. * Copyright (c) by Francisco Moraes <[email protected]>
  3. * Driver EMU10K1X chips
  4. *
  5. * Parts of this code were adapted from audigyls.c driver which is
  6. * Copyright (c) by James Courtier-Dutton <[email protected]>
  7. *
  8. * BUGS:
  9. * --
  10. *
  11. * TODO:
  12. *
  13. * Chips (SB0200 model):
  14. * - EMU10K1X-DBQ
  15. * - STAC 9708T
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License as published by
  19. * the Free Software Foundation; either version 2 of the License, or
  20. * (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  30. *
  31. */
  32. #include <linux/init.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/pci.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/slab.h>
  37. #include <linux/module.h>
  38. #include <sound/core.h>
  39. #include <sound/initval.h>
  40. #include <sound/pcm.h>
  41. #include <sound/ac97_codec.h>
  42. #include <sound/info.h>
  43. #include <sound/rawmidi.h>
  44. MODULE_AUTHOR("Francisco Moraes <[email protected]>");
  45. MODULE_DESCRIPTION("EMU10K1X");
  46. MODULE_LICENSE("GPL");
  47. MODULE_SUPPORTED_DEVICE("{{Dell Creative Labs,SB Live!}");
  48. // module parameters (see "Module Parameters")
  49. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  50. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  51. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  52. module_param_array(index, int, NULL, 0444);
  53. MODULE_PARM_DESC(index, "Index value for the EMU10K1X soundcard.");
  54. module_param_array(id, charp, NULL, 0444);
  55. MODULE_PARM_DESC(id, "ID string for the EMU10K1X soundcard.");
  56. module_param_array(enable, bool, NULL, 0444);
  57. MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard.");
  58. // some definitions were borrowed from emu10k1 driver as they seem to be the same
  59. /************************************************************************************************/
  60. /* PCI function 0 registers, address = <val> + PCIBASE0 */
  61. /************************************************************************************************/
  62. #define PTR 0x00 /* Indexed register set pointer register */
  63. /* NOTE: The CHANNELNUM and ADDRESS words can */
  64. /* be modified independently of each other. */
  65. #define DATA 0x04 /* Indexed register set data register */
  66. #define IPR 0x08 /* Global interrupt pending register */
  67. /* Clear pending interrupts by writing a 1 to */
  68. /* the relevant bits and zero to the other bits */
  69. #define IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */
  70. #define IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */
  71. #define IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */
  72. #define IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
  73. #define IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */
  74. #define IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
  75. #define INTE 0x0c /* Interrupt enable register */
  76. #define INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */
  77. #define INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */
  78. #define INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */
  79. #define INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
  80. #define INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */
  81. #define INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
  82. #define HCFG 0x14 /* Hardware config register */
  83. #define HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */
  84. /* NOTE: This should generally never be used. */
  85. #define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */
  86. /* Should be set to 1 when the EMU10K1 is */
  87. /* completely initialized. */
  88. #define GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */
  89. #define AC97DATA 0x1c /* AC97 register set data register (16 bit) */
  90. #define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */
  91. /********************************************************************************************************/
  92. /* Emu10k1x pointer-offset register set, accessed through the PTR and DATA registers */
  93. /********************************************************************************************************/
  94. #define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
  95. /* One list entry: 4 bytes for DMA address,
  96. * 4 bytes for period_size << 16.
  97. * One list entry is 8 bytes long.
  98. * One list entry for each period in the buffer.
  99. */
  100. #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
  101. #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */
  102. #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */
  103. #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */
  104. #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */
  105. #define PLAYBACK_UNKNOWN1 0x07
  106. #define PLAYBACK_UNKNOWN2 0x08
  107. /* Only one capture channel supported */
  108. #define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */
  109. #define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */
  110. #define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */
  111. #define CAPTURE_UNKNOWN 0x13
  112. /* From 0x20 - 0x3f, last samples played on each channel */
  113. #define TRIGGER_CHANNEL 0x40 /* Trigger channel playback */
  114. #define TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */
  115. #define TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */
  116. #define TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */
  117. #define TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */
  118. #define ROUTING 0x41 /* Setup sound routing ? */
  119. #define ROUTING_FRONT_LEFT 0x00000001
  120. #define ROUTING_FRONT_RIGHT 0x00000002
  121. #define ROUTING_REAR_LEFT 0x00000004
  122. #define ROUTING_REAR_RIGHT 0x00000008
  123. #define ROUTING_CENTER_LFE 0x00010000
  124. #define SPCS0 0x42 /* SPDIF output Channel Status 0 register */
  125. #define SPCS1 0x43 /* SPDIF output Channel Status 1 register */
  126. #define SPCS2 0x44 /* SPDIF output Channel Status 2 register */
  127. #define SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */
  128. #define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */
  129. #define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */
  130. #define SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */
  131. #define SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */
  132. #define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
  133. #define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
  134. #define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
  135. #define SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */
  136. #define SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */
  137. #define SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */
  138. #define SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */
  139. #define SPCS_SOURCENUMMASK 0x000f0000 /* Source number */
  140. #define SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */
  141. #define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */
  142. #define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */
  143. #define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */
  144. #define SPCS_EMPHASISMASK 0x00000038 /* Emphasis */
  145. #define SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */
  146. #define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */
  147. #define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */
  148. #define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */
  149. #define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */
  150. #define SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */
  151. /* This is the MPU port on the card */
  152. #define MUDATA 0x47
  153. #define MUCMD 0x48
  154. #define MUSTAT MUCMD
  155. /* From 0x50 - 0x5f, last samples captured */
  156. /*
  157. * The hardware has 3 channels for playback and 1 for capture.
  158. * - channel 0 is the front channel
  159. * - channel 1 is the rear channel
  160. * - channel 2 is the center/lfe channel
  161. * Volume is controlled by the AC97 for the front and rear channels by
  162. * the PCM Playback Volume, Sigmatel Surround Playback Volume and
  163. * Surround Playback Volume. The Sigmatel 4-Speaker Stereo switch affects
  164. * the front/rear channel mixing in the REAR OUT jack. When using the
  165. * 4-Speaker Stereo, both front and rear channels will be mixed in the
  166. * REAR OUT.
  167. * The center/lfe channel has no volume control and cannot be muted during
  168. * playback.
  169. */
  170. struct emu10k1x_voice {
  171. struct emu10k1x *emu;
  172. int number;
  173. int use;
  174. struct emu10k1x_pcm *epcm;
  175. };
  176. struct emu10k1x_pcm {
  177. struct emu10k1x *emu;
  178. struct snd_pcm_substream *substream;
  179. struct emu10k1x_voice *voice;
  180. unsigned short running;
  181. };
  182. struct emu10k1x_midi {
  183. struct emu10k1x *emu;
  184. struct snd_rawmidi *rmidi;
  185. struct snd_rawmidi_substream *substream_input;
  186. struct snd_rawmidi_substream *substream_output;
  187. unsigned int midi_mode;
  188. spinlock_t input_lock;
  189. spinlock_t output_lock;
  190. spinlock_t open_lock;
  191. int tx_enable, rx_enable;
  192. int port;
  193. int ipr_tx, ipr_rx;
  194. void (*interrupt)(struct emu10k1x *emu, unsigned int status);
  195. };
  196. // definition of the chip-specific record
  197. struct emu10k1x {
  198. struct snd_card *card;
  199. struct pci_dev *pci;
  200. unsigned long port;
  201. struct resource *res_port;
  202. int irq;
  203. unsigned char revision; /* chip revision */
  204. unsigned int serial; /* serial number */
  205. unsigned short model; /* subsystem id */
  206. spinlock_t emu_lock;
  207. spinlock_t voice_lock;
  208. struct snd_ac97 *ac97;
  209. struct snd_pcm *pcm;
  210. struct emu10k1x_voice voices[3];
  211. struct emu10k1x_voice capture_voice;
  212. u32 spdif_bits[3]; // SPDIF out setup
  213. struct snd_dma_buffer dma_buffer;
  214. struct emu10k1x_midi midi;
  215. };
  216. /* hardware definition */
  217. static struct snd_pcm_hardware snd_emu10k1x_playback_hw = {
  218. .info = (SNDRV_PCM_INFO_MMAP |
  219. SNDRV_PCM_INFO_INTERLEAVED |
  220. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  221. SNDRV_PCM_INFO_MMAP_VALID),
  222. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  223. .rates = SNDRV_PCM_RATE_48000,
  224. .rate_min = 48000,
  225. .rate_max = 48000,
  226. .channels_min = 2,
  227. .channels_max = 2,
  228. .buffer_bytes_max = (32*1024),
  229. .period_bytes_min = 64,
  230. .period_bytes_max = (16*1024),
  231. .periods_min = 2,
  232. .periods_max = 8,
  233. .fifo_size = 0,
  234. };
  235. static struct snd_pcm_hardware snd_emu10k1x_capture_hw = {
  236. .info = (SNDRV_PCM_INFO_MMAP |
  237. SNDRV_PCM_INFO_INTERLEAVED |
  238. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  239. SNDRV_PCM_INFO_MMAP_VALID),
  240. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  241. .rates = SNDRV_PCM_RATE_48000,
  242. .rate_min = 48000,
  243. .rate_max = 48000,
  244. .channels_min = 2,
  245. .channels_max = 2,
  246. .buffer_bytes_max = (32*1024),
  247. .period_bytes_min = 64,
  248. .period_bytes_max = (16*1024),
  249. .periods_min = 2,
  250. .periods_max = 2,
  251. .fifo_size = 0,
  252. };
  253. static unsigned int snd_emu10k1x_ptr_read(struct emu10k1x * emu,
  254. unsigned int reg,
  255. unsigned int chn)
  256. {
  257. unsigned long flags;
  258. unsigned int regptr, val;
  259. regptr = (reg << 16) | chn;
  260. spin_lock_irqsave(&emu->emu_lock, flags);
  261. outl(regptr, emu->port + PTR);
  262. val = inl(emu->port + DATA);
  263. spin_unlock_irqrestore(&emu->emu_lock, flags);
  264. return val;
  265. }
  266. static void snd_emu10k1x_ptr_write(struct emu10k1x *emu,
  267. unsigned int reg,
  268. unsigned int chn,
  269. unsigned int data)
  270. {
  271. unsigned int regptr;
  272. unsigned long flags;
  273. regptr = (reg << 16) | chn;
  274. spin_lock_irqsave(&emu->emu_lock, flags);
  275. outl(regptr, emu->port + PTR);
  276. outl(data, emu->port + DATA);
  277. spin_unlock_irqrestore(&emu->emu_lock, flags);
  278. }
  279. static void snd_emu10k1x_intr_enable(struct emu10k1x *emu, unsigned int intrenb)
  280. {
  281. unsigned long flags;
  282. unsigned int intr_enable;
  283. spin_lock_irqsave(&emu->emu_lock, flags);
  284. intr_enable = inl(emu->port + INTE) | intrenb;
  285. outl(intr_enable, emu->port + INTE);
  286. spin_unlock_irqrestore(&emu->emu_lock, flags);
  287. }
  288. static void snd_emu10k1x_intr_disable(struct emu10k1x *emu, unsigned int intrenb)
  289. {
  290. unsigned long flags;
  291. unsigned int intr_enable;
  292. spin_lock_irqsave(&emu->emu_lock, flags);
  293. intr_enable = inl(emu->port + INTE) & ~intrenb;
  294. outl(intr_enable, emu->port + INTE);
  295. spin_unlock_irqrestore(&emu->emu_lock, flags);
  296. }
  297. static void snd_emu10k1x_gpio_write(struct emu10k1x *emu, unsigned int value)
  298. {
  299. unsigned long flags;
  300. spin_lock_irqsave(&emu->emu_lock, flags);
  301. outl(value, emu->port + GPIO);
  302. spin_unlock_irqrestore(&emu->emu_lock, flags);
  303. }
  304. static void snd_emu10k1x_pcm_free_substream(struct snd_pcm_runtime *runtime)
  305. {
  306. kfree(runtime->private_data);
  307. }
  308. static void snd_emu10k1x_pcm_interrupt(struct emu10k1x *emu, struct emu10k1x_voice *voice)
  309. {
  310. struct emu10k1x_pcm *epcm;
  311. if ((epcm = voice->epcm) == NULL)
  312. return;
  313. if (epcm->substream == NULL)
  314. return;
  315. #if 0
  316. dev_info(emu->card->dev,
  317. "IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
  318. epcm->substream->ops->pointer(epcm->substream),
  319. snd_pcm_lib_period_bytes(epcm->substream),
  320. snd_pcm_lib_buffer_bytes(epcm->substream));
  321. #endif
  322. snd_pcm_period_elapsed(epcm->substream);
  323. }
  324. /* open callback */
  325. static int snd_emu10k1x_playback_open(struct snd_pcm_substream *substream)
  326. {
  327. struct emu10k1x *chip = snd_pcm_substream_chip(substream);
  328. struct emu10k1x_pcm *epcm;
  329. struct snd_pcm_runtime *runtime = substream->runtime;
  330. int err;
  331. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) {
  332. return err;
  333. }
  334. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  335. return err;
  336. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  337. if (epcm == NULL)
  338. return -ENOMEM;
  339. epcm->emu = chip;
  340. epcm->substream = substream;
  341. runtime->private_data = epcm;
  342. runtime->private_free = snd_emu10k1x_pcm_free_substream;
  343. runtime->hw = snd_emu10k1x_playback_hw;
  344. return 0;
  345. }
  346. /* close callback */
  347. static int snd_emu10k1x_playback_close(struct snd_pcm_substream *substream)
  348. {
  349. return 0;
  350. }
  351. /* hw_params callback */
  352. static int snd_emu10k1x_pcm_hw_params(struct snd_pcm_substream *substream,
  353. struct snd_pcm_hw_params *hw_params)
  354. {
  355. struct snd_pcm_runtime *runtime = substream->runtime;
  356. struct emu10k1x_pcm *epcm = runtime->private_data;
  357. if (! epcm->voice) {
  358. epcm->voice = &epcm->emu->voices[substream->pcm->device];
  359. epcm->voice->use = 1;
  360. epcm->voice->epcm = epcm;
  361. }
  362. return snd_pcm_lib_malloc_pages(substream,
  363. params_buffer_bytes(hw_params));
  364. }
  365. /* hw_free callback */
  366. static int snd_emu10k1x_pcm_hw_free(struct snd_pcm_substream *substream)
  367. {
  368. struct snd_pcm_runtime *runtime = substream->runtime;
  369. struct emu10k1x_pcm *epcm;
  370. if (runtime->private_data == NULL)
  371. return 0;
  372. epcm = runtime->private_data;
  373. if (epcm->voice) {
  374. epcm->voice->use = 0;
  375. epcm->voice->epcm = NULL;
  376. epcm->voice = NULL;
  377. }
  378. return snd_pcm_lib_free_pages(substream);
  379. }
  380. /* prepare callback */
  381. static int snd_emu10k1x_pcm_prepare(struct snd_pcm_substream *substream)
  382. {
  383. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  384. struct snd_pcm_runtime *runtime = substream->runtime;
  385. struct emu10k1x_pcm *epcm = runtime->private_data;
  386. int voice = epcm->voice->number;
  387. u32 *table_base = (u32 *)(emu->dma_buffer.area+1024*voice);
  388. u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
  389. int i;
  390. for(i = 0; i < runtime->periods; i++) {
  391. *table_base++=runtime->dma_addr+(i*period_size_bytes);
  392. *table_base++=period_size_bytes<<16;
  393. }
  394. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_ADDR, voice, emu->dma_buffer.addr+1024*voice);
  395. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_SIZE, voice, (runtime->periods - 1) << 19);
  396. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_PTR, voice, 0);
  397. snd_emu10k1x_ptr_write(emu, PLAYBACK_POINTER, voice, 0);
  398. snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN1, voice, 0);
  399. snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN2, voice, 0);
  400. snd_emu10k1x_ptr_write(emu, PLAYBACK_DMA_ADDR, voice, runtime->dma_addr);
  401. snd_emu10k1x_ptr_write(emu, PLAYBACK_PERIOD_SIZE, voice, frames_to_bytes(runtime, runtime->period_size)<<16);
  402. return 0;
  403. }
  404. /* trigger callback */
  405. static int snd_emu10k1x_pcm_trigger(struct snd_pcm_substream *substream,
  406. int cmd)
  407. {
  408. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  409. struct snd_pcm_runtime *runtime = substream->runtime;
  410. struct emu10k1x_pcm *epcm = runtime->private_data;
  411. int channel = epcm->voice->number;
  412. int result = 0;
  413. /*
  414. dev_dbg(emu->card->dev,
  415. "trigger - emu10k1x = 0x%x, cmd = %i, pointer = %d\n",
  416. (int)emu, cmd, (int)substream->ops->pointer(substream));
  417. */
  418. switch (cmd) {
  419. case SNDRV_PCM_TRIGGER_START:
  420. if(runtime->periods == 2)
  421. snd_emu10k1x_intr_enable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
  422. else
  423. snd_emu10k1x_intr_enable(emu, INTE_CH_0_LOOP << channel);
  424. epcm->running = 1;
  425. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|(TRIGGER_CHANNEL_0<<channel));
  426. break;
  427. case SNDRV_PCM_TRIGGER_STOP:
  428. epcm->running = 0;
  429. snd_emu10k1x_intr_disable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
  430. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CHANNEL_0<<channel));
  431. break;
  432. default:
  433. result = -EINVAL;
  434. break;
  435. }
  436. return result;
  437. }
  438. /* pointer callback */
  439. static snd_pcm_uframes_t
  440. snd_emu10k1x_pcm_pointer(struct snd_pcm_substream *substream)
  441. {
  442. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  443. struct snd_pcm_runtime *runtime = substream->runtime;
  444. struct emu10k1x_pcm *epcm = runtime->private_data;
  445. int channel = epcm->voice->number;
  446. snd_pcm_uframes_t ptr = 0, ptr1 = 0, ptr2= 0,ptr3 = 0,ptr4 = 0;
  447. if (!epcm->running)
  448. return 0;
  449. ptr3 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  450. ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
  451. ptr4 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  452. if(ptr4 == 0 && ptr1 == frames_to_bytes(runtime, runtime->buffer_size))
  453. return 0;
  454. if (ptr3 != ptr4)
  455. ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
  456. ptr2 = bytes_to_frames(runtime, ptr1);
  457. ptr2 += (ptr4 >> 3) * runtime->period_size;
  458. ptr = ptr2;
  459. if (ptr >= runtime->buffer_size)
  460. ptr -= runtime->buffer_size;
  461. return ptr;
  462. }
  463. /* operators */
  464. static const struct snd_pcm_ops snd_emu10k1x_playback_ops = {
  465. .open = snd_emu10k1x_playback_open,
  466. .close = snd_emu10k1x_playback_close,
  467. .ioctl = snd_pcm_lib_ioctl,
  468. .hw_params = snd_emu10k1x_pcm_hw_params,
  469. .hw_free = snd_emu10k1x_pcm_hw_free,
  470. .prepare = snd_emu10k1x_pcm_prepare,
  471. .trigger = snd_emu10k1x_pcm_trigger,
  472. .pointer = snd_emu10k1x_pcm_pointer,
  473. };
  474. /* open_capture callback */
  475. static int snd_emu10k1x_pcm_open_capture(struct snd_pcm_substream *substream)
  476. {
  477. struct emu10k1x *chip = snd_pcm_substream_chip(substream);
  478. struct emu10k1x_pcm *epcm;
  479. struct snd_pcm_runtime *runtime = substream->runtime;
  480. int err;
  481. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  482. return err;
  483. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  484. return err;
  485. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  486. if (epcm == NULL)
  487. return -ENOMEM;
  488. epcm->emu = chip;
  489. epcm->substream = substream;
  490. runtime->private_data = epcm;
  491. runtime->private_free = snd_emu10k1x_pcm_free_substream;
  492. runtime->hw = snd_emu10k1x_capture_hw;
  493. return 0;
  494. }
  495. /* close callback */
  496. static int snd_emu10k1x_pcm_close_capture(struct snd_pcm_substream *substream)
  497. {
  498. return 0;
  499. }
  500. /* hw_params callback */
  501. static int snd_emu10k1x_pcm_hw_params_capture(struct snd_pcm_substream *substream,
  502. struct snd_pcm_hw_params *hw_params)
  503. {
  504. struct snd_pcm_runtime *runtime = substream->runtime;
  505. struct emu10k1x_pcm *epcm = runtime->private_data;
  506. if (! epcm->voice) {
  507. if (epcm->emu->capture_voice.use)
  508. return -EBUSY;
  509. epcm->voice = &epcm->emu->capture_voice;
  510. epcm->voice->epcm = epcm;
  511. epcm->voice->use = 1;
  512. }
  513. return snd_pcm_lib_malloc_pages(substream,
  514. params_buffer_bytes(hw_params));
  515. }
  516. /* hw_free callback */
  517. static int snd_emu10k1x_pcm_hw_free_capture(struct snd_pcm_substream *substream)
  518. {
  519. struct snd_pcm_runtime *runtime = substream->runtime;
  520. struct emu10k1x_pcm *epcm;
  521. if (runtime->private_data == NULL)
  522. return 0;
  523. epcm = runtime->private_data;
  524. if (epcm->voice) {
  525. epcm->voice->use = 0;
  526. epcm->voice->epcm = NULL;
  527. epcm->voice = NULL;
  528. }
  529. return snd_pcm_lib_free_pages(substream);
  530. }
  531. /* prepare capture callback */
  532. static int snd_emu10k1x_pcm_prepare_capture(struct snd_pcm_substream *substream)
  533. {
  534. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  535. struct snd_pcm_runtime *runtime = substream->runtime;
  536. snd_emu10k1x_ptr_write(emu, CAPTURE_DMA_ADDR, 0, runtime->dma_addr);
  537. snd_emu10k1x_ptr_write(emu, CAPTURE_BUFFER_SIZE, 0, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
  538. snd_emu10k1x_ptr_write(emu, CAPTURE_POINTER, 0, 0);
  539. snd_emu10k1x_ptr_write(emu, CAPTURE_UNKNOWN, 0, 0);
  540. return 0;
  541. }
  542. /* trigger_capture callback */
  543. static int snd_emu10k1x_pcm_trigger_capture(struct snd_pcm_substream *substream,
  544. int cmd)
  545. {
  546. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  547. struct snd_pcm_runtime *runtime = substream->runtime;
  548. struct emu10k1x_pcm *epcm = runtime->private_data;
  549. int result = 0;
  550. switch (cmd) {
  551. case SNDRV_PCM_TRIGGER_START:
  552. snd_emu10k1x_intr_enable(emu, INTE_CAP_0_LOOP |
  553. INTE_CAP_0_HALF_LOOP);
  554. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|TRIGGER_CAPTURE);
  555. epcm->running = 1;
  556. break;
  557. case SNDRV_PCM_TRIGGER_STOP:
  558. epcm->running = 0;
  559. snd_emu10k1x_intr_disable(emu, INTE_CAP_0_LOOP |
  560. INTE_CAP_0_HALF_LOOP);
  561. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CAPTURE));
  562. break;
  563. default:
  564. result = -EINVAL;
  565. break;
  566. }
  567. return result;
  568. }
  569. /* pointer_capture callback */
  570. static snd_pcm_uframes_t
  571. snd_emu10k1x_pcm_pointer_capture(struct snd_pcm_substream *substream)
  572. {
  573. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  574. struct snd_pcm_runtime *runtime = substream->runtime;
  575. struct emu10k1x_pcm *epcm = runtime->private_data;
  576. snd_pcm_uframes_t ptr;
  577. if (!epcm->running)
  578. return 0;
  579. ptr = bytes_to_frames(runtime, snd_emu10k1x_ptr_read(emu, CAPTURE_POINTER, 0));
  580. if (ptr >= runtime->buffer_size)
  581. ptr -= runtime->buffer_size;
  582. return ptr;
  583. }
  584. static const struct snd_pcm_ops snd_emu10k1x_capture_ops = {
  585. .open = snd_emu10k1x_pcm_open_capture,
  586. .close = snd_emu10k1x_pcm_close_capture,
  587. .ioctl = snd_pcm_lib_ioctl,
  588. .hw_params = snd_emu10k1x_pcm_hw_params_capture,
  589. .hw_free = snd_emu10k1x_pcm_hw_free_capture,
  590. .prepare = snd_emu10k1x_pcm_prepare_capture,
  591. .trigger = snd_emu10k1x_pcm_trigger_capture,
  592. .pointer = snd_emu10k1x_pcm_pointer_capture,
  593. };
  594. static unsigned short snd_emu10k1x_ac97_read(struct snd_ac97 *ac97,
  595. unsigned short reg)
  596. {
  597. struct emu10k1x *emu = ac97->private_data;
  598. unsigned long flags;
  599. unsigned short val;
  600. spin_lock_irqsave(&emu->emu_lock, flags);
  601. outb(reg, emu->port + AC97ADDRESS);
  602. val = inw(emu->port + AC97DATA);
  603. spin_unlock_irqrestore(&emu->emu_lock, flags);
  604. return val;
  605. }
  606. static void snd_emu10k1x_ac97_write(struct snd_ac97 *ac97,
  607. unsigned short reg, unsigned short val)
  608. {
  609. struct emu10k1x *emu = ac97->private_data;
  610. unsigned long flags;
  611. spin_lock_irqsave(&emu->emu_lock, flags);
  612. outb(reg, emu->port + AC97ADDRESS);
  613. outw(val, emu->port + AC97DATA);
  614. spin_unlock_irqrestore(&emu->emu_lock, flags);
  615. }
  616. static int snd_emu10k1x_ac97(struct emu10k1x *chip)
  617. {
  618. struct snd_ac97_bus *pbus;
  619. struct snd_ac97_template ac97;
  620. int err;
  621. static struct snd_ac97_bus_ops ops = {
  622. .write = snd_emu10k1x_ac97_write,
  623. .read = snd_emu10k1x_ac97_read,
  624. };
  625. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  626. return err;
  627. pbus->no_vra = 1; /* we don't need VRA */
  628. memset(&ac97, 0, sizeof(ac97));
  629. ac97.private_data = chip;
  630. ac97.scaps = AC97_SCAP_NO_SPDIF;
  631. return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  632. }
  633. static int snd_emu10k1x_free(struct emu10k1x *chip)
  634. {
  635. snd_emu10k1x_ptr_write(chip, TRIGGER_CHANNEL, 0, 0);
  636. // disable interrupts
  637. outl(0, chip->port + INTE);
  638. // disable audio
  639. outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG);
  640. /* release the irq */
  641. if (chip->irq >= 0)
  642. free_irq(chip->irq, chip);
  643. // release the i/o port
  644. release_and_free_resource(chip->res_port);
  645. // release the DMA
  646. if (chip->dma_buffer.area) {
  647. snd_dma_free_pages(&chip->dma_buffer);
  648. }
  649. pci_disable_device(chip->pci);
  650. // release the data
  651. kfree(chip);
  652. return 0;
  653. }
  654. static int snd_emu10k1x_dev_free(struct snd_device *device)
  655. {
  656. struct emu10k1x *chip = device->device_data;
  657. return snd_emu10k1x_free(chip);
  658. }
  659. static irqreturn_t snd_emu10k1x_interrupt(int irq, void *dev_id)
  660. {
  661. unsigned int status;
  662. struct emu10k1x *chip = dev_id;
  663. struct emu10k1x_voice *pvoice = chip->voices;
  664. int i;
  665. int mask;
  666. status = inl(chip->port + IPR);
  667. if (! status)
  668. return IRQ_NONE;
  669. // capture interrupt
  670. if (status & (IPR_CAP_0_LOOP | IPR_CAP_0_HALF_LOOP)) {
  671. struct emu10k1x_voice *cap_voice = &chip->capture_voice;
  672. if (cap_voice->use)
  673. snd_emu10k1x_pcm_interrupt(chip, cap_voice);
  674. else
  675. snd_emu10k1x_intr_disable(chip,
  676. INTE_CAP_0_LOOP |
  677. INTE_CAP_0_HALF_LOOP);
  678. }
  679. mask = IPR_CH_0_LOOP|IPR_CH_0_HALF_LOOP;
  680. for (i = 0; i < 3; i++) {
  681. if (status & mask) {
  682. if (pvoice->use)
  683. snd_emu10k1x_pcm_interrupt(chip, pvoice);
  684. else
  685. snd_emu10k1x_intr_disable(chip, mask);
  686. }
  687. pvoice++;
  688. mask <<= 1;
  689. }
  690. if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
  691. if (chip->midi.interrupt)
  692. chip->midi.interrupt(chip, status);
  693. else
  694. snd_emu10k1x_intr_disable(chip, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
  695. }
  696. // acknowledge the interrupt if necessary
  697. outl(status, chip->port + IPR);
  698. /* dev_dbg(chip->card->dev, "interrupt %08x\n", status); */
  699. return IRQ_HANDLED;
  700. }
  701. static const struct snd_pcm_chmap_elem surround_map[] = {
  702. { .channels = 2,
  703. .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
  704. { }
  705. };
  706. static const struct snd_pcm_chmap_elem clfe_map[] = {
  707. { .channels = 2,
  708. .map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } },
  709. { }
  710. };
  711. static int snd_emu10k1x_pcm(struct emu10k1x *emu, int device)
  712. {
  713. struct snd_pcm *pcm;
  714. const struct snd_pcm_chmap_elem *map = NULL;
  715. int err;
  716. int capture = 0;
  717. if (device == 0)
  718. capture = 1;
  719. if ((err = snd_pcm_new(emu->card, "emu10k1x", device, 1, capture, &pcm)) < 0)
  720. return err;
  721. pcm->private_data = emu;
  722. switch(device) {
  723. case 0:
  724. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
  725. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1x_capture_ops);
  726. break;
  727. case 1:
  728. case 2:
  729. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
  730. break;
  731. }
  732. pcm->info_flags = 0;
  733. switch(device) {
  734. case 0:
  735. strcpy(pcm->name, "EMU10K1X Front");
  736. map = snd_pcm_std_chmaps;
  737. break;
  738. case 1:
  739. strcpy(pcm->name, "EMU10K1X Rear");
  740. map = surround_map;
  741. break;
  742. case 2:
  743. strcpy(pcm->name, "EMU10K1X Center/LFE");
  744. map = clfe_map;
  745. break;
  746. }
  747. emu->pcm = pcm;
  748. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  749. snd_dma_pci_data(emu->pci),
  750. 32*1024, 32*1024);
  751. return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2,
  752. 1 << 2, NULL);
  753. }
  754. static int snd_emu10k1x_create(struct snd_card *card,
  755. struct pci_dev *pci,
  756. struct emu10k1x **rchip)
  757. {
  758. struct emu10k1x *chip;
  759. int err;
  760. int ch;
  761. static struct snd_device_ops ops = {
  762. .dev_free = snd_emu10k1x_dev_free,
  763. };
  764. *rchip = NULL;
  765. if ((err = pci_enable_device(pci)) < 0)
  766. return err;
  767. if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
  768. pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
  769. dev_err(card->dev, "error to set 28bit mask DMA\n");
  770. pci_disable_device(pci);
  771. return -ENXIO;
  772. }
  773. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  774. if (chip == NULL) {
  775. pci_disable_device(pci);
  776. return -ENOMEM;
  777. }
  778. chip->card = card;
  779. chip->pci = pci;
  780. chip->irq = -1;
  781. spin_lock_init(&chip->emu_lock);
  782. spin_lock_init(&chip->voice_lock);
  783. chip->port = pci_resource_start(pci, 0);
  784. if ((chip->res_port = request_region(chip->port, 8,
  785. "EMU10K1X")) == NULL) {
  786. dev_err(card->dev, "cannot allocate the port 0x%lx\n",
  787. chip->port);
  788. snd_emu10k1x_free(chip);
  789. return -EBUSY;
  790. }
  791. if (request_irq(pci->irq, snd_emu10k1x_interrupt,
  792. IRQF_SHARED, KBUILD_MODNAME, chip)) {
  793. dev_err(card->dev, "cannot grab irq %d\n", pci->irq);
  794. snd_emu10k1x_free(chip);
  795. return -EBUSY;
  796. }
  797. chip->irq = pci->irq;
  798. if(snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
  799. 4 * 1024, &chip->dma_buffer) < 0) {
  800. snd_emu10k1x_free(chip);
  801. return -ENOMEM;
  802. }
  803. pci_set_master(pci);
  804. /* read revision & serial */
  805. chip->revision = pci->revision;
  806. pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
  807. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
  808. dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n", chip->model,
  809. chip->revision, chip->serial);
  810. outl(0, chip->port + INTE);
  811. for(ch = 0; ch < 3; ch++) {
  812. chip->voices[ch].emu = chip;
  813. chip->voices[ch].number = ch;
  814. }
  815. /*
  816. * Init to 0x02109204 :
  817. * Clock accuracy = 0 (1000ppm)
  818. * Sample Rate = 2 (48kHz)
  819. * Audio Channel = 1 (Left of 2)
  820. * Source Number = 0 (Unspecified)
  821. * Generation Status = 1 (Original for Cat Code 12)
  822. * Cat Code = 12 (Digital Signal Mixer)
  823. * Mode = 0 (Mode 0)
  824. * Emphasis = 0 (None)
  825. * CP = 1 (Copyright unasserted)
  826. * AN = 0 (Audio data)
  827. * P = 0 (Consumer)
  828. */
  829. snd_emu10k1x_ptr_write(chip, SPCS0, 0,
  830. chip->spdif_bits[0] =
  831. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  832. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  833. SPCS_GENERATIONSTATUS | 0x00001200 |
  834. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  835. snd_emu10k1x_ptr_write(chip, SPCS1, 0,
  836. chip->spdif_bits[1] =
  837. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  838. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  839. SPCS_GENERATIONSTATUS | 0x00001200 |
  840. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  841. snd_emu10k1x_ptr_write(chip, SPCS2, 0,
  842. chip->spdif_bits[2] =
  843. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  844. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  845. SPCS_GENERATIONSTATUS | 0x00001200 |
  846. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  847. snd_emu10k1x_ptr_write(chip, SPDIF_SELECT, 0, 0x700); // disable SPDIF
  848. snd_emu10k1x_ptr_write(chip, ROUTING, 0, 0x1003F); // routing
  849. snd_emu10k1x_gpio_write(chip, 0x1080); // analog mode
  850. outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG);
  851. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
  852. chip, &ops)) < 0) {
  853. snd_emu10k1x_free(chip);
  854. return err;
  855. }
  856. *rchip = chip;
  857. return 0;
  858. }
  859. static void snd_emu10k1x_proc_reg_read(struct snd_info_entry *entry,
  860. struct snd_info_buffer *buffer)
  861. {
  862. struct emu10k1x *emu = entry->private_data;
  863. unsigned long value,value1,value2;
  864. unsigned long flags;
  865. int i;
  866. snd_iprintf(buffer, "Registers:\n\n");
  867. for(i = 0; i < 0x20; i+=4) {
  868. spin_lock_irqsave(&emu->emu_lock, flags);
  869. value = inl(emu->port + i);
  870. spin_unlock_irqrestore(&emu->emu_lock, flags);
  871. snd_iprintf(buffer, "Register %02X: %08lX\n", i, value);
  872. }
  873. snd_iprintf(buffer, "\nRegisters\n\n");
  874. for(i = 0; i <= 0x48; i++) {
  875. value = snd_emu10k1x_ptr_read(emu, i, 0);
  876. if(i < 0x10 || (i >= 0x20 && i < 0x40)) {
  877. value1 = snd_emu10k1x_ptr_read(emu, i, 1);
  878. value2 = snd_emu10k1x_ptr_read(emu, i, 2);
  879. snd_iprintf(buffer, "%02X: %08lX %08lX %08lX\n", i, value, value1, value2);
  880. } else {
  881. snd_iprintf(buffer, "%02X: %08lX\n", i, value);
  882. }
  883. }
  884. }
  885. static void snd_emu10k1x_proc_reg_write(struct snd_info_entry *entry,
  886. struct snd_info_buffer *buffer)
  887. {
  888. struct emu10k1x *emu = entry->private_data;
  889. char line[64];
  890. unsigned int reg, channel_id , val;
  891. while (!snd_info_get_line(buffer, line, sizeof(line))) {
  892. if (sscanf(line, "%x %x %x", &reg, &channel_id, &val) != 3)
  893. continue;
  894. if (reg < 0x49 && val <= 0xffffffff && channel_id <= 2)
  895. snd_emu10k1x_ptr_write(emu, reg, channel_id, val);
  896. }
  897. }
  898. static int snd_emu10k1x_proc_init(struct emu10k1x *emu)
  899. {
  900. struct snd_info_entry *entry;
  901. if(! snd_card_proc_new(emu->card, "emu10k1x_regs", &entry)) {
  902. snd_info_set_text_ops(entry, emu, snd_emu10k1x_proc_reg_read);
  903. entry->c.text.write = snd_emu10k1x_proc_reg_write;
  904. entry->mode |= S_IWUSR;
  905. entry->private_data = emu;
  906. }
  907. return 0;
  908. }
  909. #define snd_emu10k1x_shared_spdif_info snd_ctl_boolean_mono_info
  910. static int snd_emu10k1x_shared_spdif_get(struct snd_kcontrol *kcontrol,
  911. struct snd_ctl_elem_value *ucontrol)
  912. {
  913. struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
  914. ucontrol->value.integer.value[0] = (snd_emu10k1x_ptr_read(emu, SPDIF_SELECT, 0) == 0x700) ? 0 : 1;
  915. return 0;
  916. }
  917. static int snd_emu10k1x_shared_spdif_put(struct snd_kcontrol *kcontrol,
  918. struct snd_ctl_elem_value *ucontrol)
  919. {
  920. struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
  921. unsigned int val;
  922. int change = 0;
  923. val = ucontrol->value.integer.value[0] ;
  924. if (val) {
  925. // enable spdif output
  926. snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x000);
  927. snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x700);
  928. snd_emu10k1x_gpio_write(emu, 0x1000);
  929. } else {
  930. // disable spdif output
  931. snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x700);
  932. snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x1003F);
  933. snd_emu10k1x_gpio_write(emu, 0x1080);
  934. }
  935. return change;
  936. }
  937. static struct snd_kcontrol_new snd_emu10k1x_shared_spdif =
  938. {
  939. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  940. .name = "Analog/Digital Output Jack",
  941. .info = snd_emu10k1x_shared_spdif_info,
  942. .get = snd_emu10k1x_shared_spdif_get,
  943. .put = snd_emu10k1x_shared_spdif_put
  944. };
  945. static int snd_emu10k1x_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  946. {
  947. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  948. uinfo->count = 1;
  949. return 0;
  950. }
  951. static int snd_emu10k1x_spdif_get(struct snd_kcontrol *kcontrol,
  952. struct snd_ctl_elem_value *ucontrol)
  953. {
  954. struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
  955. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  956. ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff;
  957. ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff;
  958. ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff;
  959. ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff;
  960. return 0;
  961. }
  962. static int snd_emu10k1x_spdif_get_mask(struct snd_kcontrol *kcontrol,
  963. struct snd_ctl_elem_value *ucontrol)
  964. {
  965. ucontrol->value.iec958.status[0] = 0xff;
  966. ucontrol->value.iec958.status[1] = 0xff;
  967. ucontrol->value.iec958.status[2] = 0xff;
  968. ucontrol->value.iec958.status[3] = 0xff;
  969. return 0;
  970. }
  971. static int snd_emu10k1x_spdif_put(struct snd_kcontrol *kcontrol,
  972. struct snd_ctl_elem_value *ucontrol)
  973. {
  974. struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
  975. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  976. int change;
  977. unsigned int val;
  978. val = (ucontrol->value.iec958.status[0] << 0) |
  979. (ucontrol->value.iec958.status[1] << 8) |
  980. (ucontrol->value.iec958.status[2] << 16) |
  981. (ucontrol->value.iec958.status[3] << 24);
  982. change = val != emu->spdif_bits[idx];
  983. if (change) {
  984. snd_emu10k1x_ptr_write(emu, SPCS0 + idx, 0, val);
  985. emu->spdif_bits[idx] = val;
  986. }
  987. return change;
  988. }
  989. static struct snd_kcontrol_new snd_emu10k1x_spdif_mask_control =
  990. {
  991. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  992. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  993. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
  994. .count = 3,
  995. .info = snd_emu10k1x_spdif_info,
  996. .get = snd_emu10k1x_spdif_get_mask
  997. };
  998. static struct snd_kcontrol_new snd_emu10k1x_spdif_control =
  999. {
  1000. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1001. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1002. .count = 3,
  1003. .info = snd_emu10k1x_spdif_info,
  1004. .get = snd_emu10k1x_spdif_get,
  1005. .put = snd_emu10k1x_spdif_put
  1006. };
  1007. static int snd_emu10k1x_mixer(struct emu10k1x *emu)
  1008. {
  1009. int err;
  1010. struct snd_kcontrol *kctl;
  1011. struct snd_card *card = emu->card;
  1012. if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_mask_control, emu)) == NULL)
  1013. return -ENOMEM;
  1014. if ((err = snd_ctl_add(card, kctl)))
  1015. return err;
  1016. if ((kctl = snd_ctl_new1(&snd_emu10k1x_shared_spdif, emu)) == NULL)
  1017. return -ENOMEM;
  1018. if ((err = snd_ctl_add(card, kctl)))
  1019. return err;
  1020. if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_control, emu)) == NULL)
  1021. return -ENOMEM;
  1022. if ((err = snd_ctl_add(card, kctl)))
  1023. return err;
  1024. return 0;
  1025. }
  1026. #define EMU10K1X_MIDI_MODE_INPUT (1<<0)
  1027. #define EMU10K1X_MIDI_MODE_OUTPUT (1<<1)
  1028. static inline unsigned char mpu401_read(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int idx)
  1029. {
  1030. return (unsigned char)snd_emu10k1x_ptr_read(emu, mpu->port + idx, 0);
  1031. }
  1032. static inline void mpu401_write(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int data, int idx)
  1033. {
  1034. snd_emu10k1x_ptr_write(emu, mpu->port + idx, 0, data);
  1035. }
  1036. #define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0)
  1037. #define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1)
  1038. #define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0)
  1039. #define mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1)
  1040. #define mpu401_input_avail(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x80))
  1041. #define mpu401_output_ready(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x40))
  1042. #define MPU401_RESET 0xff
  1043. #define MPU401_ENTER_UART 0x3f
  1044. #define MPU401_ACK 0xfe
  1045. static void mpu401_clear_rx(struct emu10k1x *emu, struct emu10k1x_midi *mpu)
  1046. {
  1047. int timeout = 100000;
  1048. for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--)
  1049. mpu401_read_data(emu, mpu);
  1050. #ifdef CONFIG_SND_DEBUG
  1051. if (timeout <= 0)
  1052. dev_err(emu->card->dev,
  1053. "cmd: clear rx timeout (status = 0x%x)\n",
  1054. mpu401_read_stat(emu, mpu));
  1055. #endif
  1056. }
  1057. /*
  1058. */
  1059. static void do_emu10k1x_midi_interrupt(struct emu10k1x *emu,
  1060. struct emu10k1x_midi *midi, unsigned int status)
  1061. {
  1062. unsigned char byte;
  1063. if (midi->rmidi == NULL) {
  1064. snd_emu10k1x_intr_disable(emu, midi->tx_enable | midi->rx_enable);
  1065. return;
  1066. }
  1067. spin_lock(&midi->input_lock);
  1068. if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) {
  1069. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1070. mpu401_clear_rx(emu, midi);
  1071. } else {
  1072. byte = mpu401_read_data(emu, midi);
  1073. if (midi->substream_input)
  1074. snd_rawmidi_receive(midi->substream_input, &byte, 1);
  1075. }
  1076. }
  1077. spin_unlock(&midi->input_lock);
  1078. spin_lock(&midi->output_lock);
  1079. if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) {
  1080. if (midi->substream_output &&
  1081. snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) {
  1082. mpu401_write_data(emu, midi, byte);
  1083. } else {
  1084. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1085. }
  1086. }
  1087. spin_unlock(&midi->output_lock);
  1088. }
  1089. static void snd_emu10k1x_midi_interrupt(struct emu10k1x *emu, unsigned int status)
  1090. {
  1091. do_emu10k1x_midi_interrupt(emu, &emu->midi, status);
  1092. }
  1093. static int snd_emu10k1x_midi_cmd(struct emu10k1x * emu,
  1094. struct emu10k1x_midi *midi, unsigned char cmd, int ack)
  1095. {
  1096. unsigned long flags;
  1097. int timeout, ok;
  1098. spin_lock_irqsave(&midi->input_lock, flags);
  1099. mpu401_write_data(emu, midi, 0x00);
  1100. /* mpu401_clear_rx(emu, midi); */
  1101. mpu401_write_cmd(emu, midi, cmd);
  1102. if (ack) {
  1103. ok = 0;
  1104. timeout = 10000;
  1105. while (!ok && timeout-- > 0) {
  1106. if (mpu401_input_avail(emu, midi)) {
  1107. if (mpu401_read_data(emu, midi) == MPU401_ACK)
  1108. ok = 1;
  1109. }
  1110. }
  1111. if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK)
  1112. ok = 1;
  1113. } else {
  1114. ok = 1;
  1115. }
  1116. spin_unlock_irqrestore(&midi->input_lock, flags);
  1117. if (!ok) {
  1118. dev_err(emu->card->dev,
  1119. "midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n",
  1120. cmd, emu->port,
  1121. mpu401_read_stat(emu, midi),
  1122. mpu401_read_data(emu, midi));
  1123. return 1;
  1124. }
  1125. return 0;
  1126. }
  1127. static int snd_emu10k1x_midi_input_open(struct snd_rawmidi_substream *substream)
  1128. {
  1129. struct emu10k1x *emu;
  1130. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1131. unsigned long flags;
  1132. emu = midi->emu;
  1133. if (snd_BUG_ON(!emu))
  1134. return -ENXIO;
  1135. spin_lock_irqsave(&midi->open_lock, flags);
  1136. midi->midi_mode |= EMU10K1X_MIDI_MODE_INPUT;
  1137. midi->substream_input = substream;
  1138. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
  1139. spin_unlock_irqrestore(&midi->open_lock, flags);
  1140. if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
  1141. goto error_out;
  1142. if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
  1143. goto error_out;
  1144. } else {
  1145. spin_unlock_irqrestore(&midi->open_lock, flags);
  1146. }
  1147. return 0;
  1148. error_out:
  1149. return -EIO;
  1150. }
  1151. static int snd_emu10k1x_midi_output_open(struct snd_rawmidi_substream *substream)
  1152. {
  1153. struct emu10k1x *emu;
  1154. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1155. unsigned long flags;
  1156. emu = midi->emu;
  1157. if (snd_BUG_ON(!emu))
  1158. return -ENXIO;
  1159. spin_lock_irqsave(&midi->open_lock, flags);
  1160. midi->midi_mode |= EMU10K1X_MIDI_MODE_OUTPUT;
  1161. midi->substream_output = substream;
  1162. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1163. spin_unlock_irqrestore(&midi->open_lock, flags);
  1164. if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
  1165. goto error_out;
  1166. if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
  1167. goto error_out;
  1168. } else {
  1169. spin_unlock_irqrestore(&midi->open_lock, flags);
  1170. }
  1171. return 0;
  1172. error_out:
  1173. return -EIO;
  1174. }
  1175. static int snd_emu10k1x_midi_input_close(struct snd_rawmidi_substream *substream)
  1176. {
  1177. struct emu10k1x *emu;
  1178. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1179. unsigned long flags;
  1180. int err = 0;
  1181. emu = midi->emu;
  1182. if (snd_BUG_ON(!emu))
  1183. return -ENXIO;
  1184. spin_lock_irqsave(&midi->open_lock, flags);
  1185. snd_emu10k1x_intr_disable(emu, midi->rx_enable);
  1186. midi->midi_mode &= ~EMU10K1X_MIDI_MODE_INPUT;
  1187. midi->substream_input = NULL;
  1188. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
  1189. spin_unlock_irqrestore(&midi->open_lock, flags);
  1190. err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
  1191. } else {
  1192. spin_unlock_irqrestore(&midi->open_lock, flags);
  1193. }
  1194. return err;
  1195. }
  1196. static int snd_emu10k1x_midi_output_close(struct snd_rawmidi_substream *substream)
  1197. {
  1198. struct emu10k1x *emu;
  1199. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1200. unsigned long flags;
  1201. int err = 0;
  1202. emu = midi->emu;
  1203. if (snd_BUG_ON(!emu))
  1204. return -ENXIO;
  1205. spin_lock_irqsave(&midi->open_lock, flags);
  1206. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1207. midi->midi_mode &= ~EMU10K1X_MIDI_MODE_OUTPUT;
  1208. midi->substream_output = NULL;
  1209. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1210. spin_unlock_irqrestore(&midi->open_lock, flags);
  1211. err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
  1212. } else {
  1213. spin_unlock_irqrestore(&midi->open_lock, flags);
  1214. }
  1215. return err;
  1216. }
  1217. static void snd_emu10k1x_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
  1218. {
  1219. struct emu10k1x *emu;
  1220. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1221. emu = midi->emu;
  1222. if (snd_BUG_ON(!emu))
  1223. return;
  1224. if (up)
  1225. snd_emu10k1x_intr_enable(emu, midi->rx_enable);
  1226. else
  1227. snd_emu10k1x_intr_disable(emu, midi->rx_enable);
  1228. }
  1229. static void snd_emu10k1x_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
  1230. {
  1231. struct emu10k1x *emu;
  1232. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1233. unsigned long flags;
  1234. emu = midi->emu;
  1235. if (snd_BUG_ON(!emu))
  1236. return;
  1237. if (up) {
  1238. int max = 4;
  1239. unsigned char byte;
  1240. /* try to send some amount of bytes here before interrupts */
  1241. spin_lock_irqsave(&midi->output_lock, flags);
  1242. while (max > 0) {
  1243. if (mpu401_output_ready(emu, midi)) {
  1244. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT) ||
  1245. snd_rawmidi_transmit(substream, &byte, 1) != 1) {
  1246. /* no more data */
  1247. spin_unlock_irqrestore(&midi->output_lock, flags);
  1248. return;
  1249. }
  1250. mpu401_write_data(emu, midi, byte);
  1251. max--;
  1252. } else {
  1253. break;
  1254. }
  1255. }
  1256. spin_unlock_irqrestore(&midi->output_lock, flags);
  1257. snd_emu10k1x_intr_enable(emu, midi->tx_enable);
  1258. } else {
  1259. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1260. }
  1261. }
  1262. /*
  1263. */
  1264. static struct snd_rawmidi_ops snd_emu10k1x_midi_output =
  1265. {
  1266. .open = snd_emu10k1x_midi_output_open,
  1267. .close = snd_emu10k1x_midi_output_close,
  1268. .trigger = snd_emu10k1x_midi_output_trigger,
  1269. };
  1270. static struct snd_rawmidi_ops snd_emu10k1x_midi_input =
  1271. {
  1272. .open = snd_emu10k1x_midi_input_open,
  1273. .close = snd_emu10k1x_midi_input_close,
  1274. .trigger = snd_emu10k1x_midi_input_trigger,
  1275. };
  1276. static void snd_emu10k1x_midi_free(struct snd_rawmidi *rmidi)
  1277. {
  1278. struct emu10k1x_midi *midi = rmidi->private_data;
  1279. midi->interrupt = NULL;
  1280. midi->rmidi = NULL;
  1281. }
  1282. static int emu10k1x_midi_init(struct emu10k1x *emu,
  1283. struct emu10k1x_midi *midi, int device,
  1284. char *name)
  1285. {
  1286. struct snd_rawmidi *rmidi;
  1287. int err;
  1288. if ((err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi)) < 0)
  1289. return err;
  1290. midi->emu = emu;
  1291. spin_lock_init(&midi->open_lock);
  1292. spin_lock_init(&midi->input_lock);
  1293. spin_lock_init(&midi->output_lock);
  1294. strcpy(rmidi->name, name);
  1295. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1x_midi_output);
  1296. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1x_midi_input);
  1297. rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
  1298. SNDRV_RAWMIDI_INFO_INPUT |
  1299. SNDRV_RAWMIDI_INFO_DUPLEX;
  1300. rmidi->private_data = midi;
  1301. rmidi->private_free = snd_emu10k1x_midi_free;
  1302. midi->rmidi = rmidi;
  1303. return 0;
  1304. }
  1305. static int snd_emu10k1x_midi(struct emu10k1x *emu)
  1306. {
  1307. struct emu10k1x_midi *midi = &emu->midi;
  1308. int err;
  1309. if ((err = emu10k1x_midi_init(emu, midi, 0, "EMU10K1X MPU-401 (UART)")) < 0)
  1310. return err;
  1311. midi->tx_enable = INTE_MIDITXENABLE;
  1312. midi->rx_enable = INTE_MIDIRXENABLE;
  1313. midi->port = MUDATA;
  1314. midi->ipr_tx = IPR_MIDITRANSBUFEMPTY;
  1315. midi->ipr_rx = IPR_MIDIRECVBUFEMPTY;
  1316. midi->interrupt = snd_emu10k1x_midi_interrupt;
  1317. return 0;
  1318. }
  1319. static int snd_emu10k1x_probe(struct pci_dev *pci,
  1320. const struct pci_device_id *pci_id)
  1321. {
  1322. static int dev;
  1323. struct snd_card *card;
  1324. struct emu10k1x *chip;
  1325. int err;
  1326. if (dev >= SNDRV_CARDS)
  1327. return -ENODEV;
  1328. if (!enable[dev]) {
  1329. dev++;
  1330. return -ENOENT;
  1331. }
  1332. err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
  1333. 0, &card);
  1334. if (err < 0)
  1335. return err;
  1336. if ((err = snd_emu10k1x_create(card, pci, &chip)) < 0) {
  1337. snd_card_free(card);
  1338. return err;
  1339. }
  1340. if ((err = snd_emu10k1x_pcm(chip, 0)) < 0) {
  1341. snd_card_free(card);
  1342. return err;
  1343. }
  1344. if ((err = snd_emu10k1x_pcm(chip, 1)) < 0) {
  1345. snd_card_free(card);
  1346. return err;
  1347. }
  1348. if ((err = snd_emu10k1x_pcm(chip, 2)) < 0) {
  1349. snd_card_free(card);
  1350. return err;
  1351. }
  1352. if ((err = snd_emu10k1x_ac97(chip)) < 0) {
  1353. snd_card_free(card);
  1354. return err;
  1355. }
  1356. if ((err = snd_emu10k1x_mixer(chip)) < 0) {
  1357. snd_card_free(card);
  1358. return err;
  1359. }
  1360. if ((err = snd_emu10k1x_midi(chip)) < 0) {
  1361. snd_card_free(card);
  1362. return err;
  1363. }
  1364. snd_emu10k1x_proc_init(chip);
  1365. strcpy(card->driver, "EMU10K1X");
  1366. strcpy(card->shortname, "Dell Sound Blaster Live!");
  1367. sprintf(card->longname, "%s at 0x%lx irq %i",
  1368. card->shortname, chip->port, chip->irq);
  1369. if ((err = snd_card_register(card)) < 0) {
  1370. snd_card_free(card);
  1371. return err;
  1372. }
  1373. pci_set_drvdata(pci, card);
  1374. dev++;
  1375. return 0;
  1376. }
  1377. static void snd_emu10k1x_remove(struct pci_dev *pci)
  1378. {
  1379. snd_card_free(pci_get_drvdata(pci));
  1380. }
  1381. // PCI IDs
  1382. static const struct pci_device_id snd_emu10k1x_ids[] = {
  1383. { PCI_VDEVICE(CREATIVE, 0x0006), 0 }, /* Dell OEM version (EMU10K1) */
  1384. { 0, }
  1385. };
  1386. MODULE_DEVICE_TABLE(pci, snd_emu10k1x_ids);
  1387. // pci_driver definition
  1388. static struct pci_driver emu10k1x_driver = {
  1389. .name = KBUILD_MODNAME,
  1390. .id_table = snd_emu10k1x_ids,
  1391. .probe = snd_emu10k1x_probe,
  1392. .remove = snd_emu10k1x_remove,
  1393. };
  1394. module_pci_driver(emu10k1x_driver);