Arm64Assembler.h 11 KB

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  1. /*
  2. * Copyright (C) 2013 The Android Open Source Project
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions
  7. * are met:
  8. * * Redistributions of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. * * Redistributions in binary form must reproduce the above copyright
  11. * notice, this list of conditions and the following disclaimer in
  12. * the documentation and/or other materials provided with the
  13. * distribution.
  14. *
  15. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  16. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  17. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  18. * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  19. * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  20. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  21. * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  22. * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  23. * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  24. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  25. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26. * SUCH DAMAGE.
  27. */
  28. #ifndef ANDROID_ARMTOARM64ASSEMBLER_H
  29. #define ANDROID_ARMTOARM64ASSEMBLER_H
  30. #include <stdint.h>
  31. #include <sys/types.h>
  32. #include "tinyutils/smartpointer.h"
  33. #include "utils/Vector.h"
  34. #include "utils/KeyedVector.h"
  35. #include "tinyutils/smartpointer.h"
  36. #include "codeflinger/ARMAssemblerInterface.h"
  37. #include "codeflinger/CodeCache.h"
  38. namespace android {
  39. // ----------------------------------------------------------------------------
  40. class ArmToArm64Assembler : public ARMAssemblerInterface
  41. {
  42. public:
  43. explicit ArmToArm64Assembler(const sp<Assembly>& assembly);
  44. explicit ArmToArm64Assembler(void *base);
  45. virtual ~ArmToArm64Assembler();
  46. uint32_t* base() const;
  47. uint32_t* pc() const;
  48. void disassemble(const char* name);
  49. // ------------------------------------------------------------------------
  50. // ARMAssemblerInterface...
  51. // ------------------------------------------------------------------------
  52. virtual void reset();
  53. virtual int generate(const char* name);
  54. virtual int getCodegenArch();
  55. virtual void prolog();
  56. virtual void epilog(uint32_t touched);
  57. virtual void comment(const char* string);
  58. // -----------------------------------------------------------------------
  59. // shifters and addressing modes
  60. // -----------------------------------------------------------------------
  61. // shifters...
  62. virtual bool isValidImmediate(uint32_t immed);
  63. virtual int buildImmediate(uint32_t i, uint32_t& rot, uint32_t& imm);
  64. virtual uint32_t imm(uint32_t immediate);
  65. virtual uint32_t reg_imm(int Rm, int type, uint32_t shift);
  66. virtual uint32_t reg_rrx(int Rm);
  67. virtual uint32_t reg_reg(int Rm, int type, int Rs);
  68. // addressing modes...
  69. virtual uint32_t immed12_pre(int32_t immed12, int W=0);
  70. virtual uint32_t immed12_post(int32_t immed12);
  71. virtual uint32_t reg_scale_pre(int Rm, int type=0, uint32_t shift=0, int W=0);
  72. virtual uint32_t reg_scale_post(int Rm, int type=0, uint32_t shift=0);
  73. virtual uint32_t immed8_pre(int32_t immed8, int W=0);
  74. virtual uint32_t immed8_post(int32_t immed8);
  75. virtual uint32_t reg_pre(int Rm, int W=0);
  76. virtual uint32_t reg_post(int Rm);
  77. virtual void dataProcessing(int opcode, int cc, int s,
  78. int Rd, int Rn,
  79. uint32_t Op2);
  80. virtual void MLA(int cc, int s,
  81. int Rd, int Rm, int Rs, int Rn);
  82. virtual void MUL(int cc, int s,
  83. int Rd, int Rm, int Rs);
  84. virtual void UMULL(int cc, int s,
  85. int RdLo, int RdHi, int Rm, int Rs);
  86. virtual void UMUAL(int cc, int s,
  87. int RdLo, int RdHi, int Rm, int Rs);
  88. virtual void SMULL(int cc, int s,
  89. int RdLo, int RdHi, int Rm, int Rs);
  90. virtual void SMUAL(int cc, int s,
  91. int RdLo, int RdHi, int Rm, int Rs);
  92. virtual void B(int cc, uint32_t* pc);
  93. virtual void BL(int cc, uint32_t* pc);
  94. virtual void BX(int cc, int Rn);
  95. virtual void label(const char* theLabel);
  96. virtual void B(int cc, const char* label);
  97. virtual void BL(int cc, const char* label);
  98. virtual uint32_t* pcForLabel(const char* label);
  99. virtual void ADDR_LDR(int cc, int Rd,
  100. int Rn, uint32_t offset = 0);
  101. virtual void ADDR_ADD(int cc, int s, int Rd,
  102. int Rn, uint32_t Op2);
  103. virtual void ADDR_SUB(int cc, int s, int Rd,
  104. int Rn, uint32_t Op2);
  105. virtual void ADDR_STR (int cc, int Rd,
  106. int Rn, uint32_t offset = 0);
  107. virtual void LDR (int cc, int Rd,
  108. int Rn, uint32_t offset = 0);
  109. virtual void LDRB(int cc, int Rd,
  110. int Rn, uint32_t offset = 0);
  111. virtual void STR (int cc, int Rd,
  112. int Rn, uint32_t offset = 0);
  113. virtual void STRB(int cc, int Rd,
  114. int Rn, uint32_t offset = 0);
  115. virtual void LDRH (int cc, int Rd,
  116. int Rn, uint32_t offset = 0);
  117. virtual void LDRSB(int cc, int Rd,
  118. int Rn, uint32_t offset = 0);
  119. virtual void LDRSH(int cc, int Rd,
  120. int Rn, uint32_t offset = 0);
  121. virtual void STRH (int cc, int Rd,
  122. int Rn, uint32_t offset = 0);
  123. virtual void LDM(int cc, int dir,
  124. int Rn, int W, uint32_t reg_list);
  125. virtual void STM(int cc, int dir,
  126. int Rn, int W, uint32_t reg_list);
  127. virtual void SWP(int cc, int Rn, int Rd, int Rm);
  128. virtual void SWPB(int cc, int Rn, int Rd, int Rm);
  129. virtual void SWI(int cc, uint32_t comment);
  130. virtual void PLD(int Rn, uint32_t offset);
  131. virtual void CLZ(int cc, int Rd, int Rm);
  132. virtual void QADD(int cc, int Rd, int Rm, int Rn);
  133. virtual void QDADD(int cc, int Rd, int Rm, int Rn);
  134. virtual void QSUB(int cc, int Rd, int Rm, int Rn);
  135. virtual void QDSUB(int cc, int Rd, int Rm, int Rn);
  136. virtual void SMUL(int cc, int xy,
  137. int Rd, int Rm, int Rs);
  138. virtual void SMULW(int cc, int y,
  139. int Rd, int Rm, int Rs);
  140. virtual void SMLA(int cc, int xy,
  141. int Rd, int Rm, int Rs, int Rn);
  142. virtual void SMLAL(int cc, int xy,
  143. int RdHi, int RdLo, int Rs, int Rm);
  144. virtual void SMLAW(int cc, int y,
  145. int Rd, int Rm, int Rs, int Rn);
  146. virtual void UXTB16(int cc, int Rd, int Rm, int rotate);
  147. virtual void UBFX(int cc, int Rd, int Rn, int lsb, int width);
  148. private:
  149. ArmToArm64Assembler(const ArmToArm64Assembler& rhs);
  150. ArmToArm64Assembler& operator = (const ArmToArm64Assembler& rhs);
  151. // -----------------------------------------------------------------------
  152. // helper functions
  153. // -----------------------------------------------------------------------
  154. void dataTransfer(int operation, int cc, int Rd, int Rn,
  155. uint32_t operand_type, uint32_t size = 32);
  156. void dataProcessingCommon(int opcode, int s,
  157. int Rd, int Rn, uint32_t Op2);
  158. // -----------------------------------------------------------------------
  159. // Arm64 instructions
  160. // -----------------------------------------------------------------------
  161. uint32_t A64_B_COND(uint32_t cc, uint32_t offset);
  162. uint32_t A64_RET(uint32_t Rn);
  163. uint32_t A64_LDRSTR_Wm_SXTW_0(uint32_t operation,
  164. uint32_t size, uint32_t Rt,
  165. uint32_t Rn, uint32_t Rm);
  166. uint32_t A64_STR_IMM_PreIndex(uint32_t Rt, uint32_t Rn, int32_t simm);
  167. uint32_t A64_LDR_IMM_PostIndex(uint32_t Rt,uint32_t Rn, int32_t simm);
  168. uint32_t A64_ADD_X_Wm_SXTW(uint32_t Rd, uint32_t Rn, uint32_t Rm,
  169. uint32_t amount);
  170. uint32_t A64_SUB_X_Wm_SXTW(uint32_t Rd, uint32_t Rn, uint32_t Rm,
  171. uint32_t amount);
  172. uint32_t A64_ADD_IMM_X(uint32_t Rd, uint32_t Rn,
  173. uint32_t imm, uint32_t shift = 0);
  174. uint32_t A64_SUB_IMM_X(uint32_t Rd, uint32_t Rn,
  175. uint32_t imm, uint32_t shift = 0);
  176. uint32_t A64_ADD_X(uint32_t Rd, uint32_t Rn,
  177. uint32_t Rm, uint32_t shift = 0, uint32_t amount = 0);
  178. uint32_t A64_ADD_W(uint32_t Rd, uint32_t Rn, uint32_t Rm,
  179. uint32_t shift = 0, uint32_t amount = 0);
  180. uint32_t A64_SUB_W(uint32_t Rd, uint32_t Rn, uint32_t Rm,
  181. uint32_t shift = 0, uint32_t amount = 0,
  182. uint32_t setflag = 0);
  183. uint32_t A64_AND_W(uint32_t Rd, uint32_t Rn,
  184. uint32_t Rm, uint32_t shift = 0, uint32_t amount = 0);
  185. uint32_t A64_ORR_W(uint32_t Rd, uint32_t Rn,
  186. uint32_t Rm, uint32_t shift = 0, uint32_t amount = 0);
  187. uint32_t A64_ORN_W(uint32_t Rd, uint32_t Rn,
  188. uint32_t Rm, uint32_t shift = 0, uint32_t amount = 0);
  189. uint32_t A64_MOVZ_W(uint32_t Rd, uint32_t imm, uint32_t shift);
  190. uint32_t A64_MOVZ_X(uint32_t Rd, uint32_t imm, uint32_t shift);
  191. uint32_t A64_MOVK_W(uint32_t Rd, uint32_t imm, uint32_t shift);
  192. uint32_t A64_SMADDL(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t Ra);
  193. uint32_t A64_MADD_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t Ra);
  194. uint32_t A64_SBFM_W(uint32_t Rd, uint32_t Rn,
  195. uint32_t immr, uint32_t imms);
  196. uint32_t A64_UBFM_W(uint32_t Rd, uint32_t Rn,
  197. uint32_t immr, uint32_t imms);
  198. uint32_t A64_UBFM_X(uint32_t Rd, uint32_t Rn,
  199. uint32_t immr, uint32_t imms);
  200. uint32_t A64_EXTR_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t lsb);
  201. uint32_t A64_CSEL_X(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t cond);
  202. uint32_t A64_CSEL_W(uint32_t Rd, uint32_t Rn, uint32_t Rm, uint32_t cond);
  203. uint32_t* mBase;
  204. uint32_t* mPC;
  205. uint32_t* mPrologPC;
  206. int64_t mDuration;
  207. uint32_t mTmpReg1, mTmpReg2, mTmpReg3, mZeroReg;
  208. struct branch_target_t {
  209. inline branch_target_t() : label(0), pc(0) { }
  210. inline branch_target_t(const char* l, uint32_t* p)
  211. : label(l), pc(p) { }
  212. const char* label;
  213. uint32_t* pc;
  214. };
  215. sp<Assembly> mAssembly;
  216. Vector<branch_target_t> mBranchTargets;
  217. KeyedVector< const char*, uint32_t* > mLabels;
  218. KeyedVector< uint32_t*, const char* > mLabelsInverseMapping;
  219. KeyedVector< uint32_t*, const char* > mComments;
  220. enum operand_type_t
  221. {
  222. OPERAND_REG = 0x20,
  223. OPERAND_IMM,
  224. OPERAND_REG_IMM,
  225. OPERAND_REG_OFFSET,
  226. OPERAND_UNSUPPORTED
  227. };
  228. struct addr_mode_t {
  229. int32_t immediate;
  230. bool writeback;
  231. bool preindex;
  232. bool postindex;
  233. int32_t reg_imm_Rm;
  234. int32_t reg_imm_type;
  235. uint32_t reg_imm_shift;
  236. int32_t reg_offset;
  237. } mAddrMode;
  238. };
  239. }; // namespace android
  240. #endif //ANDROID_ARM64ASSEMBLER_H