vt8500_timer.c 4.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168
  1. /*
  2. * arch/arm/mach-vt8500/timer.c
  3. *
  4. * Copyright (C) 2012 Tony Prisk <[email protected]>
  5. * Copyright (C) 2010 Alexey Charkov <[email protected]>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. /*
  22. * This file is copied and modified from the original timer.c provided by
  23. * Alexey Charkov. Minor changes have been made for Device Tree Support.
  24. */
  25. #include <linux/io.h>
  26. #include <linux/irq.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/clocksource.h>
  29. #include <linux/clockchips.h>
  30. #include <linux/delay.h>
  31. #include <linux/of.h>
  32. #include <linux/of_address.h>
  33. #include <linux/of_irq.h>
  34. #define VT8500_TIMER_OFFSET 0x0100
  35. #define VT8500_TIMER_HZ 3000000
  36. #define TIMER_MATCH_VAL 0x0000
  37. #define TIMER_COUNT_VAL 0x0010
  38. #define TIMER_STATUS_VAL 0x0014
  39. #define TIMER_IER_VAL 0x001c /* interrupt enable */
  40. #define TIMER_CTRL_VAL 0x0020
  41. #define TIMER_AS_VAL 0x0024 /* access status */
  42. #define TIMER_COUNT_R_ACTIVE (1 << 5) /* not ready for read */
  43. #define TIMER_COUNT_W_ACTIVE (1 << 4) /* not ready for write */
  44. #define TIMER_MATCH_W_ACTIVE (1 << 0) /* not ready for write */
  45. #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  46. #define MIN_OSCR_DELTA 16
  47. static void __iomem *regbase;
  48. static cycle_t vt8500_timer_read(struct clocksource *cs)
  49. {
  50. int loops = msecs_to_loops(10);
  51. writel(3, regbase + TIMER_CTRL_VAL);
  52. while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE)
  53. && --loops)
  54. cpu_relax();
  55. return readl(regbase + TIMER_COUNT_VAL);
  56. }
  57. static struct clocksource clocksource = {
  58. .name = "vt8500_timer",
  59. .rating = 200,
  60. .read = vt8500_timer_read,
  61. .mask = CLOCKSOURCE_MASK(32),
  62. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  63. };
  64. static int vt8500_timer_set_next_event(unsigned long cycles,
  65. struct clock_event_device *evt)
  66. {
  67. int loops = msecs_to_loops(10);
  68. cycle_t alarm = clocksource.read(&clocksource) + cycles;
  69. while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE)
  70. && --loops)
  71. cpu_relax();
  72. writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL);
  73. if ((signed)(alarm - clocksource.read(&clocksource)) <= MIN_OSCR_DELTA)
  74. return -ETIME;
  75. writel(1, regbase + TIMER_IER_VAL);
  76. return 0;
  77. }
  78. static int vt8500_shutdown(struct clock_event_device *evt)
  79. {
  80. writel(readl(regbase + TIMER_CTRL_VAL) | 1, regbase + TIMER_CTRL_VAL);
  81. writel(0, regbase + TIMER_IER_VAL);
  82. return 0;
  83. }
  84. static struct clock_event_device clockevent = {
  85. .name = "vt8500_timer",
  86. .features = CLOCK_EVT_FEAT_ONESHOT,
  87. .rating = 200,
  88. .set_next_event = vt8500_timer_set_next_event,
  89. .set_state_shutdown = vt8500_shutdown,
  90. .set_state_oneshot = vt8500_shutdown,
  91. };
  92. static irqreturn_t vt8500_timer_interrupt(int irq, void *dev_id)
  93. {
  94. struct clock_event_device *evt = dev_id;
  95. writel(0xf, regbase + TIMER_STATUS_VAL);
  96. evt->event_handler(evt);
  97. return IRQ_HANDLED;
  98. }
  99. static struct irqaction irq = {
  100. .name = "vt8500_timer",
  101. .flags = IRQF_TIMER | IRQF_IRQPOLL,
  102. .handler = vt8500_timer_interrupt,
  103. .dev_id = &clockevent,
  104. };
  105. static int __init vt8500_timer_init(struct device_node *np)
  106. {
  107. int timer_irq, ret;
  108. regbase = of_iomap(np, 0);
  109. if (!regbase) {
  110. pr_err("%s: Missing iobase description in Device Tree\n",
  111. __func__);
  112. return -ENXIO;
  113. }
  114. timer_irq = irq_of_parse_and_map(np, 0);
  115. if (!timer_irq) {
  116. pr_err("%s: Missing irq description in Device Tree\n",
  117. __func__);
  118. return -EINVAL;
  119. }
  120. writel(1, regbase + TIMER_CTRL_VAL);
  121. writel(0xf, regbase + TIMER_STATUS_VAL);
  122. writel(~0, regbase + TIMER_MATCH_VAL);
  123. ret = clocksource_register_hz(&clocksource, VT8500_TIMER_HZ);
  124. if (ret) {
  125. pr_err("%s: vt8500_timer_init: clocksource_register failed for %s\n",
  126. __func__, clocksource.name);
  127. return ret;
  128. }
  129. clockevent.cpumask = cpumask_of(0);
  130. ret = setup_irq(timer_irq, &irq);
  131. if (ret) {
  132. pr_err("%s: setup_irq failed for %s\n", __func__,
  133. clockevent.name);
  134. return ret;
  135. }
  136. clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ,
  137. MIN_OSCR_DELTA * 2, 0xf0000000);
  138. return 0;
  139. }
  140. CLOCKSOURCE_OF_DECLARE(vt8500, "via,vt8500-timer", vt8500_timer_init);