qcedevi.h 3.1 KB

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  1. /* QTI crypto Driver
  2. *
  3. * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 and
  7. * only version 2 as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #ifndef __CRYPTO_MSM_QCEDEVI_H
  15. #define __CRYPTO_MSM_QCEDEVI_H
  16. #include <linux/interrupt.h>
  17. #include <linux/miscdevice.h>
  18. #include <crypto/hash.h>
  19. #include <linux/platform_data/qcom_crypto_device.h>
  20. #include <linux/fips_status.h>
  21. #include "qce.h"
  22. #include "qcedev_smmu.h"
  23. #define CACHE_LINE_SIZE 32
  24. #define CE_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE
  25. enum qcedev_crypto_oper_type {
  26. QCEDEV_CRYPTO_OPER_CIPHER = 0,
  27. QCEDEV_CRYPTO_OPER_SHA = 1,
  28. QCEDEV_CRYPTO_OPER_LAST
  29. };
  30. struct qcedev_handle;
  31. struct qcedev_cipher_req {
  32. struct ablkcipher_request creq;
  33. void *cookie;
  34. };
  35. struct qcedev_sha_req {
  36. struct ahash_request sreq;
  37. void *cookie;
  38. };
  39. struct qcedev_sha_ctxt {
  40. uint32_t auth_data[4];
  41. uint8_t digest[QCEDEV_MAX_SHA_DIGEST];
  42. uint32_t diglen;
  43. uint8_t trailing_buf[64];
  44. uint32_t trailing_buf_len;
  45. uint8_t first_blk;
  46. uint8_t last_blk;
  47. uint8_t authkey[QCEDEV_MAX_SHA_BLOCK_SIZE];
  48. bool init_done;
  49. };
  50. struct qcedev_async_req {
  51. struct list_head list;
  52. struct completion complete;
  53. enum qcedev_crypto_oper_type op_type;
  54. union {
  55. struct qcedev_cipher_op_req cipher_op_req;
  56. struct qcedev_sha_op_req sha_op_req;
  57. };
  58. union {
  59. struct qcedev_cipher_req cipher_req;
  60. struct qcedev_sha_req sha_req;
  61. };
  62. struct qcedev_handle *handle;
  63. int err;
  64. };
  65. /**********************************************************************
  66. * Register ourselves as a misc device to be able to access the dev driver
  67. * from userspace.
  68. */
  69. #define QCEDEV_DEV "qcedev"
  70. struct qcedev_control {
  71. /* CE features supported by platform */
  72. struct msm_ce_hw_support platform_support;
  73. uint32_t ce_lock_count;
  74. uint32_t high_bw_req_count;
  75. /* CE features/algorithms supported by HW engine*/
  76. struct ce_hw_support ce_support;
  77. uint32_t bus_scale_handle;
  78. /* misc device */
  79. struct miscdevice miscdevice;
  80. /* qce handle */
  81. void *qce;
  82. /* platform device */
  83. struct platform_device *pdev;
  84. unsigned int magic;
  85. struct list_head ready_commands;
  86. struct qcedev_async_req *active_command;
  87. spinlock_t lock;
  88. struct tasklet_struct done_tasklet;
  89. struct list_head context_banks;
  90. struct qcedev_mem_client *mem_client;
  91. };
  92. struct qcedev_handle {
  93. /* qcedev control handle */
  94. struct qcedev_control *cntl;
  95. /* qce internal sha context*/
  96. struct qcedev_sha_ctxt sha_ctxt;
  97. /* qcedev mapped buffer list */
  98. struct qcedev_buffer_list registeredbufs;
  99. };
  100. void qcedev_cipher_req_cb(void *cookie, unsigned char *icv,
  101. unsigned char *iv, int ret);
  102. void qcedev_sha_req_cb(void *cookie, unsigned char *digest,
  103. unsigned char *authdata, int ret);
  104. #endif /* __CRYPTO_MSM_QCEDEVI_H */