qcrypto.c 148 KB

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  1. /*
  2. * QTI Crypto driver
  3. *
  4. * Copyright (c) 2010-2017, The Linux Foundation. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 and
  8. * only version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/module.h>
  16. #include <linux/clk.h>
  17. #include <linux/cpu.h>
  18. #include <linux/types.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/dmapool.h>
  22. #include <linux/crypto.h>
  23. #include <linux/kernel.h>
  24. #include <linux/rtnetlink.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/llist.h>
  28. #include <linux/debugfs.h>
  29. #include <linux/workqueue.h>
  30. #include <linux/sched.h>
  31. #include <linux/init.h>
  32. #include <linux/cache.h>
  33. #include <linux/platform_data/qcom_crypto_device.h>
  34. #include <linux/msm-bus.h>
  35. #include <linux/hardirq.h>
  36. #include <linux/qcrypto.h>
  37. #include <crypto/ctr.h>
  38. #include <crypto/des.h>
  39. #include <crypto/aes.h>
  40. #include <crypto/sha.h>
  41. #include <crypto/hash.h>
  42. #include <crypto/algapi.h>
  43. #include <crypto/aead.h>
  44. #include <crypto/authenc.h>
  45. #include <crypto/scatterwalk.h>
  46. #include <crypto/skcipher.h>
  47. #include <crypto/internal/skcipher.h>
  48. #include <crypto/internal/hash.h>
  49. #include <crypto/internal/aead.h>
  50. #include <linux/fips_status.h>
  51. #include "qce.h"
  52. #define DEBUG_MAX_FNAME 16
  53. #define DEBUG_MAX_RW_BUF 4096
  54. #define QCRYPTO_BIG_NUMBER 9999999 /* a big number */
  55. /*
  56. * For crypto 5.0 which has burst size alignment requirement.
  57. */
  58. #define MAX_ALIGN_SIZE 0x40
  59. #define QCRYPTO_HIGH_BANDWIDTH_TIMEOUT 1000
  60. /* Status of response workq */
  61. enum resp_workq_sts {
  62. NOT_SCHEDULED = 0,
  63. IS_SCHEDULED = 1,
  64. SCHEDULE_AGAIN = 2
  65. };
  66. /* Status of req processing by CEs */
  67. enum req_processing_sts {
  68. STOPPED = 0,
  69. IN_PROGRESS = 1
  70. };
  71. enum qcrypto_bus_state {
  72. BUS_NO_BANDWIDTH = 0,
  73. BUS_HAS_BANDWIDTH,
  74. BUS_BANDWIDTH_RELEASING,
  75. BUS_BANDWIDTH_ALLOCATING,
  76. BUS_SUSPENDED,
  77. BUS_SUSPENDING,
  78. };
  79. struct crypto_stat {
  80. u64 aead_sha1_aes_enc;
  81. u64 aead_sha1_aes_dec;
  82. u64 aead_sha1_des_enc;
  83. u64 aead_sha1_des_dec;
  84. u64 aead_sha1_3des_enc;
  85. u64 aead_sha1_3des_dec;
  86. u64 aead_sha256_aes_enc;
  87. u64 aead_sha256_aes_dec;
  88. u64 aead_sha256_des_enc;
  89. u64 aead_sha256_des_dec;
  90. u64 aead_sha256_3des_enc;
  91. u64 aead_sha256_3des_dec;
  92. u64 aead_ccm_aes_enc;
  93. u64 aead_ccm_aes_dec;
  94. u64 aead_rfc4309_ccm_aes_enc;
  95. u64 aead_rfc4309_ccm_aes_dec;
  96. u64 aead_op_success;
  97. u64 aead_op_fail;
  98. u64 aead_bad_msg;
  99. u64 ablk_cipher_aes_enc;
  100. u64 ablk_cipher_aes_dec;
  101. u64 ablk_cipher_des_enc;
  102. u64 ablk_cipher_des_dec;
  103. u64 ablk_cipher_3des_enc;
  104. u64 ablk_cipher_3des_dec;
  105. u64 ablk_cipher_op_success;
  106. u64 ablk_cipher_op_fail;
  107. u64 sha1_digest;
  108. u64 sha256_digest;
  109. u64 sha1_hmac_digest;
  110. u64 sha256_hmac_digest;
  111. u64 ahash_op_success;
  112. u64 ahash_op_fail;
  113. };
  114. static struct crypto_stat _qcrypto_stat;
  115. static struct dentry *_debug_dent;
  116. static char _debug_read_buf[DEBUG_MAX_RW_BUF];
  117. static bool _qcrypto_init_assign;
  118. struct crypto_priv;
  119. struct qcrypto_req_control {
  120. unsigned int index;
  121. bool in_use;
  122. struct crypto_engine *pce;
  123. struct crypto_async_request *req;
  124. struct qcrypto_resp_ctx *arsp;
  125. int res; /* execution result */
  126. };
  127. struct crypto_engine {
  128. struct list_head elist;
  129. void *qce; /* qce handle */
  130. struct platform_device *pdev; /* platform device */
  131. struct crypto_priv *pcp;
  132. uint32_t bus_scale_handle;
  133. struct crypto_queue req_queue; /*
  134. * request queue for those requests
  135. * that have this engine assigned
  136. * waiting to be executed
  137. */
  138. u64 total_req;
  139. u64 err_req;
  140. u32 unit;
  141. u32 ce_device;
  142. u32 ce_hw_instance;
  143. unsigned int signature;
  144. enum qcrypto_bus_state bw_state;
  145. bool high_bw_req;
  146. struct timer_list bw_reaper_timer;
  147. struct work_struct bw_reaper_ws;
  148. struct work_struct bw_allocate_ws;
  149. /* engine execution sequence number */
  150. u32 active_seq;
  151. /* last QCRYPTO_HIGH_BANDWIDTH_TIMEOUT active_seq */
  152. u32 last_active_seq;
  153. bool check_flag;
  154. /*Added to support multi-requests*/
  155. unsigned int max_req;
  156. struct qcrypto_req_control *preq_pool;
  157. atomic_t req_count;
  158. bool issue_req; /* an request is being issued to qce */
  159. bool first_engine; /* this engine is the first engine or not */
  160. unsigned int irq_cpu; /* the cpu running the irq of this engine */
  161. unsigned int max_req_used; /* debug stats */
  162. };
  163. #define MAX_SMP_CPU 8
  164. struct crypto_priv {
  165. /* CE features supported by target device*/
  166. struct msm_ce_hw_support platform_support;
  167. /* CE features/algorithms supported by HW engine*/
  168. struct ce_hw_support ce_support;
  169. /* the lock protects crypto queue and req */
  170. spinlock_t lock;
  171. /* list of registered algorithms */
  172. struct list_head alg_list;
  173. /* current active request */
  174. struct crypto_async_request *req;
  175. struct work_struct unlock_ce_ws;
  176. struct list_head engine_list; /* list of qcrypto engines */
  177. int32_t total_units; /* total units of engines */
  178. struct mutex engine_lock;
  179. struct crypto_engine *next_engine; /* next assign engine */
  180. struct crypto_queue req_queue; /*
  181. * request queue for those requests
  182. * that waiting for an available
  183. * engine.
  184. */
  185. struct llist_head ordered_resp_list; /* Queue to maintain
  186. * responses in sequence.
  187. */
  188. atomic_t resp_cnt;
  189. struct workqueue_struct *resp_wq;
  190. struct work_struct resp_work; /*
  191. * Workq to send responses
  192. * in sequence.
  193. */
  194. enum resp_workq_sts sched_resp_workq_status;
  195. enum req_processing_sts ce_req_proc_sts;
  196. int cpu_getting_irqs_frm_first_ce;
  197. struct crypto_engine *first_engine;
  198. struct crypto_engine *scheduled_eng; /* last engine scheduled */
  199. /* debug stats */
  200. unsigned int no_avail;
  201. unsigned int resp_stop;
  202. unsigned int resp_start;
  203. unsigned int max_qlen;
  204. unsigned int queue_work_eng3;
  205. unsigned int queue_work_not_eng3;
  206. unsigned int queue_work_not_eng3_nz;
  207. unsigned int max_resp_qlen;
  208. unsigned int max_reorder_cnt;
  209. unsigned int cpu_req[MAX_SMP_CPU+1];
  210. };
  211. static struct crypto_priv qcrypto_dev;
  212. static struct crypto_engine *_qcrypto_static_assign_engine(
  213. struct crypto_priv *cp);
  214. static struct crypto_engine *_avail_eng(struct crypto_priv *cp);
  215. static struct qcrypto_req_control *qcrypto_alloc_req_control(
  216. struct crypto_engine *pce)
  217. {
  218. int i;
  219. struct qcrypto_req_control *pqcrypto_req_control = pce->preq_pool;
  220. unsigned int req_count;
  221. for (i = 0; i < pce->max_req; i++) {
  222. if (xchg(&pqcrypto_req_control->in_use, true) == false) {
  223. req_count = atomic_inc_return(&pce->req_count);
  224. if (req_count > pce->max_req_used)
  225. pce->max_req_used = req_count;
  226. return pqcrypto_req_control;
  227. }
  228. pqcrypto_req_control++;
  229. }
  230. return NULL;
  231. }
  232. static void qcrypto_free_req_control(struct crypto_engine *pce,
  233. struct qcrypto_req_control *preq)
  234. {
  235. /* do this before free req */
  236. preq->req = NULL;
  237. preq->arsp = NULL;
  238. /* free req */
  239. if (xchg(&preq->in_use, false) == false)
  240. pr_warn("request info %pK free already\n", preq);
  241. else
  242. atomic_dec(&pce->req_count);
  243. }
  244. static struct qcrypto_req_control *find_req_control_for_areq(
  245. struct crypto_engine *pce,
  246. struct crypto_async_request *areq)
  247. {
  248. int i;
  249. struct qcrypto_req_control *pqcrypto_req_control = pce->preq_pool;
  250. for (i = 0; i < pce->max_req; i++) {
  251. if (pqcrypto_req_control->req == areq)
  252. return pqcrypto_req_control;
  253. pqcrypto_req_control++;
  254. }
  255. return NULL;
  256. }
  257. static void qcrypto_init_req_control(struct crypto_engine *pce,
  258. struct qcrypto_req_control *pqcrypto_req_control)
  259. {
  260. int i;
  261. pce->preq_pool = pqcrypto_req_control;
  262. atomic_set(&pce->req_count, 0);
  263. for (i = 0; i < pce->max_req; i++) {
  264. pqcrypto_req_control->index = i;
  265. pqcrypto_req_control->in_use = false;
  266. pqcrypto_req_control->pce = pce;
  267. pqcrypto_req_control++;
  268. }
  269. }
  270. static struct crypto_engine *_qrypto_find_pengine_device(struct crypto_priv *cp,
  271. unsigned int device)
  272. {
  273. struct crypto_engine *entry = NULL;
  274. unsigned long flags;
  275. spin_lock_irqsave(&cp->lock, flags);
  276. list_for_each_entry(entry, &cp->engine_list, elist) {
  277. if (entry->ce_device == device)
  278. break;
  279. }
  280. spin_unlock_irqrestore(&cp->lock, flags);
  281. if (((entry != NULL) && (entry->ce_device != device)) ||
  282. (entry == NULL)) {
  283. pr_err("Device node for CE device %d NOT FOUND!!\n",
  284. device);
  285. return NULL;
  286. }
  287. return entry;
  288. }
  289. static struct crypto_engine *_qrypto_find_pengine_device_hw
  290. (struct crypto_priv *cp,
  291. u32 device,
  292. u32 hw_instance)
  293. {
  294. struct crypto_engine *entry = NULL;
  295. unsigned long flags;
  296. spin_lock_irqsave(&cp->lock, flags);
  297. list_for_each_entry(entry, &cp->engine_list, elist) {
  298. if ((entry->ce_device == device) &&
  299. (entry->ce_hw_instance == hw_instance))
  300. break;
  301. }
  302. spin_unlock_irqrestore(&cp->lock, flags);
  303. if (((entry != NULL) &&
  304. ((entry->ce_device != device)
  305. || (entry->ce_hw_instance != hw_instance)))
  306. || (entry == NULL)) {
  307. pr_err("Device node for CE device %d NOT FOUND!!\n",
  308. device);
  309. return NULL;
  310. }
  311. return entry;
  312. }
  313. int qcrypto_get_num_engines(void)
  314. {
  315. struct crypto_priv *cp = &qcrypto_dev;
  316. struct crypto_engine *entry = NULL;
  317. int count = 0;
  318. list_for_each_entry(entry, &cp->engine_list, elist) {
  319. count++;
  320. }
  321. return count;
  322. }
  323. EXPORT_SYMBOL(qcrypto_get_num_engines);
  324. void qcrypto_get_engine_list(size_t num_engines,
  325. struct crypto_engine_entry *arr)
  326. {
  327. struct crypto_priv *cp = &qcrypto_dev;
  328. struct crypto_engine *entry = NULL;
  329. size_t arr_index = 0;
  330. list_for_each_entry(entry, &cp->engine_list, elist) {
  331. arr[arr_index].ce_device = entry->ce_device;
  332. arr[arr_index].hw_instance = entry->ce_hw_instance;
  333. arr_index++;
  334. if (arr_index >= num_engines)
  335. break;
  336. }
  337. }
  338. EXPORT_SYMBOL(qcrypto_get_engine_list);
  339. enum qcrypto_alg_type {
  340. QCRYPTO_ALG_CIPHER = 0,
  341. QCRYPTO_ALG_SHA = 1,
  342. QCRYPTO_ALG_AEAD = 2,
  343. QCRYPTO_ALG_LAST
  344. };
  345. struct qcrypto_alg {
  346. struct list_head entry;
  347. struct crypto_alg cipher_alg;
  348. struct ahash_alg sha_alg;
  349. struct aead_alg aead_alg;
  350. enum qcrypto_alg_type alg_type;
  351. struct crypto_priv *cp;
  352. };
  353. #define QCRYPTO_MAX_KEY_SIZE 64
  354. /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
  355. #define QCRYPTO_MAX_IV_LENGTH 16
  356. #define QCRYPTO_CCM4309_NONCE_LEN 3
  357. struct qcrypto_cipher_ctx {
  358. struct list_head rsp_queue; /* response queue */
  359. struct crypto_engine *pengine; /* fixed engine assigned to this tfm */
  360. struct crypto_priv *cp;
  361. unsigned int flags;
  362. enum qce_hash_alg_enum auth_alg; /* for aead */
  363. u8 auth_key[QCRYPTO_MAX_KEY_SIZE];
  364. u8 iv[QCRYPTO_MAX_IV_LENGTH];
  365. u8 enc_key[QCRYPTO_MAX_KEY_SIZE];
  366. unsigned int enc_key_len;
  367. unsigned int authsize;
  368. unsigned int auth_key_len;
  369. u8 ccm4309_nonce[QCRYPTO_CCM4309_NONCE_LEN];
  370. struct crypto_skcipher *cipher_aes192_fb;
  371. struct crypto_ahash *ahash_aead_aes192_fb;
  372. };
  373. struct qcrypto_resp_ctx {
  374. struct list_head list;
  375. struct llist_node llist;
  376. struct crypto_async_request *async_req; /* async req */
  377. int res; /* execution result */
  378. };
  379. struct qcrypto_cipher_req_ctx {
  380. struct qcrypto_resp_ctx rsp_entry;/* rsp entry. */
  381. struct crypto_engine *pengine; /* engine assigned to this request */
  382. u8 *iv;
  383. u8 rfc4309_iv[QCRYPTO_MAX_IV_LENGTH];
  384. unsigned int ivsize;
  385. int aead;
  386. int ccmtype; /* default: 0, rfc4309: 1 */
  387. struct scatterlist asg; /* Formatted associated data sg */
  388. unsigned char *adata; /* Pointer to formatted assoc data */
  389. enum qce_cipher_alg_enum alg;
  390. enum qce_cipher_dir_enum dir;
  391. enum qce_cipher_mode_enum mode;
  392. struct scatterlist *orig_src; /* Original src sg ptr */
  393. struct scatterlist *orig_dst; /* Original dst sg ptr */
  394. struct scatterlist dsg; /* Dest Data sg */
  395. struct scatterlist ssg; /* Source Data sg */
  396. unsigned char *data; /* Incoming data pointer*/
  397. struct aead_request *aead_req;
  398. struct ahash_request *fb_hash_req;
  399. uint8_t fb_ahash_digest[SHA256_DIGEST_SIZE];
  400. struct scatterlist fb_ablkcipher_src_sg[2];
  401. struct scatterlist fb_ablkcipher_dst_sg[2];
  402. char *fb_aes_iv;
  403. unsigned int fb_ahash_length;
  404. struct skcipher_request *fb_aes_req;
  405. struct scatterlist *fb_aes_src;
  406. struct scatterlist *fb_aes_dst;
  407. unsigned int fb_aes_cryptlen;
  408. };
  409. #define SHA_MAX_BLOCK_SIZE SHA256_BLOCK_SIZE
  410. #define SHA_MAX_STATE_SIZE (SHA256_DIGEST_SIZE / sizeof(u32))
  411. #define SHA_MAX_DIGEST_SIZE SHA256_DIGEST_SIZE
  412. #define MSM_QCRYPTO_REQ_QUEUE_LENGTH 768
  413. #define COMPLETION_CB_BACKLOG_LENGTH_STOP 400
  414. #define COMPLETION_CB_BACKLOG_LENGTH_START \
  415. (COMPLETION_CB_BACKLOG_LENGTH_STOP / 2)
  416. static uint8_t _std_init_vector_sha1_uint8[] = {
  417. 0x67, 0x45, 0x23, 0x01, 0xEF, 0xCD, 0xAB, 0x89,
  418. 0x98, 0xBA, 0xDC, 0xFE, 0x10, 0x32, 0x54, 0x76,
  419. 0xC3, 0xD2, 0xE1, 0xF0
  420. };
  421. /* standard initialization vector for SHA-256, source: FIPS 180-2 */
  422. static uint8_t _std_init_vector_sha256_uint8[] = {
  423. 0x6A, 0x09, 0xE6, 0x67, 0xBB, 0x67, 0xAE, 0x85,
  424. 0x3C, 0x6E, 0xF3, 0x72, 0xA5, 0x4F, 0xF5, 0x3A,
  425. 0x51, 0x0E, 0x52, 0x7F, 0x9B, 0x05, 0x68, 0x8C,
  426. 0x1F, 0x83, 0xD9, 0xAB, 0x5B, 0xE0, 0xCD, 0x19
  427. };
  428. struct qcrypto_sha_ctx {
  429. struct list_head rsp_queue; /* response queue */
  430. struct crypto_engine *pengine; /* fixed engine assigned to this tfm */
  431. struct crypto_priv *cp;
  432. unsigned int flags;
  433. enum qce_hash_alg_enum alg;
  434. uint32_t diglen;
  435. uint32_t authkey_in_len;
  436. uint8_t authkey[SHA_MAX_BLOCK_SIZE];
  437. struct ahash_request *ahash_req;
  438. struct completion ahash_req_complete;
  439. };
  440. struct qcrypto_sha_req_ctx {
  441. struct qcrypto_resp_ctx rsp_entry;/* rsp entry. */
  442. struct crypto_engine *pengine; /* engine assigned to this request */
  443. struct scatterlist *src;
  444. uint32_t nbytes;
  445. struct scatterlist *orig_src; /* Original src sg ptr */
  446. struct scatterlist dsg; /* Data sg */
  447. unsigned char *data; /* Incoming data pointer*/
  448. unsigned char *data2; /* Updated data pointer*/
  449. uint32_t byte_count[4];
  450. u64 count;
  451. uint8_t first_blk;
  452. uint8_t last_blk;
  453. uint8_t trailing_buf[SHA_MAX_BLOCK_SIZE];
  454. uint32_t trailing_buf_len;
  455. /* dma buffer, Internal use */
  456. uint8_t staging_dmabuf
  457. [SHA_MAX_BLOCK_SIZE+SHA_MAX_DIGEST_SIZE+MAX_ALIGN_SIZE];
  458. uint8_t digest[SHA_MAX_DIGEST_SIZE];
  459. struct scatterlist sg[2];
  460. };
  461. static void _byte_stream_to_words(uint32_t *iv, unsigned char *b,
  462. unsigned int len)
  463. {
  464. unsigned int n;
  465. n = len / sizeof(uint32_t);
  466. for (; n > 0; n--) {
  467. *iv = ((*b << 24) & 0xff000000) |
  468. (((*(b+1)) << 16) & 0xff0000) |
  469. (((*(b+2)) << 8) & 0xff00) |
  470. (*(b+3) & 0xff);
  471. b += sizeof(uint32_t);
  472. iv++;
  473. }
  474. n = len % sizeof(uint32_t);
  475. if (n == 3) {
  476. *iv = ((*b << 24) & 0xff000000) |
  477. (((*(b+1)) << 16) & 0xff0000) |
  478. (((*(b+2)) << 8) & 0xff00);
  479. } else if (n == 2) {
  480. *iv = ((*b << 24) & 0xff000000) |
  481. (((*(b+1)) << 16) & 0xff0000);
  482. } else if (n == 1) {
  483. *iv = ((*b << 24) & 0xff000000);
  484. }
  485. }
  486. static void _words_to_byte_stream(uint32_t *iv, unsigned char *b,
  487. unsigned int len)
  488. {
  489. unsigned int n = len / sizeof(uint32_t);
  490. for (; n > 0; n--) {
  491. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  492. *b++ = (unsigned char) ((*iv >> 16) & 0xff);
  493. *b++ = (unsigned char) ((*iv >> 8) & 0xff);
  494. *b++ = (unsigned char) (*iv & 0xff);
  495. iv++;
  496. }
  497. n = len % sizeof(uint32_t);
  498. if (n == 3) {
  499. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  500. *b++ = (unsigned char) ((*iv >> 16) & 0xff);
  501. *b = (unsigned char) ((*iv >> 8) & 0xff);
  502. } else if (n == 2) {
  503. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  504. *b = (unsigned char) ((*iv >> 16) & 0xff);
  505. } else if (n == 1) {
  506. *b = (unsigned char) ((*iv >> 24) & 0xff);
  507. }
  508. }
  509. static void qcrypto_ce_set_bus(struct crypto_engine *pengine,
  510. bool high_bw_req)
  511. {
  512. struct crypto_priv *cp = pengine->pcp;
  513. unsigned int control_flag;
  514. int ret = 0;
  515. if (cp->ce_support.req_bw_before_clk) {
  516. if (high_bw_req)
  517. control_flag = QCE_BW_REQUEST_FIRST;
  518. else
  519. control_flag = QCE_CLK_DISABLE_FIRST;
  520. } else {
  521. if (high_bw_req)
  522. control_flag = QCE_CLK_ENABLE_FIRST;
  523. else
  524. control_flag = QCE_BW_REQUEST_RESET_FIRST;
  525. }
  526. switch (control_flag) {
  527. case QCE_CLK_ENABLE_FIRST:
  528. ret = qce_enable_clk(pengine->qce);
  529. if (ret) {
  530. pr_err("%s Unable enable clk\n", __func__);
  531. return;
  532. }
  533. ret = msm_bus_scale_client_update_request(
  534. pengine->bus_scale_handle, 1);
  535. if (ret) {
  536. pr_err("%s Unable to set high bw\n", __func__);
  537. ret = qce_disable_clk(pengine->qce);
  538. if (ret)
  539. pr_err("%s Unable disable clk\n", __func__);
  540. return;
  541. }
  542. break;
  543. case QCE_BW_REQUEST_FIRST:
  544. ret = msm_bus_scale_client_update_request(
  545. pengine->bus_scale_handle, 1);
  546. if (ret) {
  547. pr_err("%s Unable to set high bw\n", __func__);
  548. return;
  549. }
  550. ret = qce_enable_clk(pengine->qce);
  551. if (ret) {
  552. pr_err("%s Unable enable clk\n", __func__);
  553. ret = msm_bus_scale_client_update_request(
  554. pengine->bus_scale_handle, 0);
  555. if (ret)
  556. pr_err("%s Unable to set low bw\n", __func__);
  557. return;
  558. }
  559. break;
  560. case QCE_CLK_DISABLE_FIRST:
  561. ret = qce_disable_clk(pengine->qce);
  562. if (ret) {
  563. pr_err("%s Unable to disable clk\n", __func__);
  564. return;
  565. }
  566. ret = msm_bus_scale_client_update_request(
  567. pengine->bus_scale_handle, 0);
  568. if (ret) {
  569. pr_err("%s Unable to set low bw\n", __func__);
  570. ret = qce_enable_clk(pengine->qce);
  571. if (ret)
  572. pr_err("%s Unable enable clk\n", __func__);
  573. return;
  574. }
  575. break;
  576. case QCE_BW_REQUEST_RESET_FIRST:
  577. ret = msm_bus_scale_client_update_request(
  578. pengine->bus_scale_handle, 0);
  579. if (ret) {
  580. pr_err("%s Unable to set low bw\n", __func__);
  581. return;
  582. }
  583. ret = qce_disable_clk(pengine->qce);
  584. if (ret) {
  585. pr_err("%s Unable to disable clk\n", __func__);
  586. ret = msm_bus_scale_client_update_request(
  587. pengine->bus_scale_handle, 1);
  588. if (ret)
  589. pr_err("%s Unable to set high bw\n", __func__);
  590. return;
  591. }
  592. break;
  593. default:
  594. return;
  595. }
  596. }
  597. static void qcrypto_bw_reaper_timer_callback(unsigned long data)
  598. {
  599. struct crypto_engine *pengine = (struct crypto_engine *)data;
  600. schedule_work(&pengine->bw_reaper_ws);
  601. }
  602. static void qcrypto_bw_set_timeout(struct crypto_engine *pengine)
  603. {
  604. pengine->bw_reaper_timer.data =
  605. (unsigned long)(pengine);
  606. pengine->bw_reaper_timer.expires = jiffies +
  607. msecs_to_jiffies(QCRYPTO_HIGH_BANDWIDTH_TIMEOUT);
  608. mod_timer(&(pengine->bw_reaper_timer),
  609. pengine->bw_reaper_timer.expires);
  610. }
  611. static void qcrypto_ce_bw_allocate_req(struct crypto_engine *pengine)
  612. {
  613. schedule_work(&pengine->bw_allocate_ws);
  614. }
  615. static int _start_qcrypto_process(struct crypto_priv *cp,
  616. struct crypto_engine *pengine);
  617. static void qcrypto_bw_allocate_work(struct work_struct *work)
  618. {
  619. struct crypto_engine *pengine = container_of(work,
  620. struct crypto_engine, bw_allocate_ws);
  621. unsigned long flags;
  622. struct crypto_priv *cp = pengine->pcp;
  623. spin_lock_irqsave(&cp->lock, flags);
  624. pengine->bw_state = BUS_BANDWIDTH_ALLOCATING;
  625. spin_unlock_irqrestore(&cp->lock, flags);
  626. qcrypto_ce_set_bus(pengine, true);
  627. qcrypto_bw_set_timeout(pengine);
  628. spin_lock_irqsave(&cp->lock, flags);
  629. pengine->bw_state = BUS_HAS_BANDWIDTH;
  630. pengine->high_bw_req = false;
  631. pengine->active_seq++;
  632. pengine->check_flag = true;
  633. spin_unlock_irqrestore(&cp->lock, flags);
  634. _start_qcrypto_process(cp, pengine);
  635. };
  636. static void qcrypto_bw_reaper_work(struct work_struct *work)
  637. {
  638. struct crypto_engine *pengine = container_of(work,
  639. struct crypto_engine, bw_reaper_ws);
  640. struct crypto_priv *cp = pengine->pcp;
  641. unsigned long flags;
  642. u32 active_seq;
  643. bool restart = false;
  644. spin_lock_irqsave(&cp->lock, flags);
  645. active_seq = pengine->active_seq;
  646. if (pengine->bw_state == BUS_HAS_BANDWIDTH &&
  647. (active_seq == pengine->last_active_seq)) {
  648. /* check if engine is stuck */
  649. if (atomic_read(&pengine->req_count) > 0) {
  650. if (pengine->check_flag)
  651. dev_warn(&pengine->pdev->dev,
  652. "The engine appears to be stuck seq %d.\n",
  653. active_seq);
  654. pengine->check_flag = false;
  655. goto ret;
  656. }
  657. if (cp->platform_support.bus_scale_table == NULL)
  658. goto ret;
  659. pengine->bw_state = BUS_BANDWIDTH_RELEASING;
  660. spin_unlock_irqrestore(&cp->lock, flags);
  661. qcrypto_ce_set_bus(pengine, false);
  662. spin_lock_irqsave(&cp->lock, flags);
  663. if (pengine->high_bw_req == true) {
  664. /* we got request while we are disabling clock */
  665. pengine->bw_state = BUS_BANDWIDTH_ALLOCATING;
  666. spin_unlock_irqrestore(&cp->lock, flags);
  667. qcrypto_ce_set_bus(pengine, true);
  668. spin_lock_irqsave(&cp->lock, flags);
  669. pengine->bw_state = BUS_HAS_BANDWIDTH;
  670. pengine->high_bw_req = false;
  671. restart = true;
  672. } else
  673. pengine->bw_state = BUS_NO_BANDWIDTH;
  674. }
  675. ret:
  676. pengine->last_active_seq = active_seq;
  677. spin_unlock_irqrestore(&cp->lock, flags);
  678. if (restart)
  679. _start_qcrypto_process(cp, pengine);
  680. if (pengine->bw_state != BUS_NO_BANDWIDTH)
  681. qcrypto_bw_set_timeout(pengine);
  682. }
  683. static int qcrypto_count_sg(struct scatterlist *sg, int nbytes)
  684. {
  685. int i;
  686. for (i = 0; nbytes > 0 && sg != NULL; i++, sg = sg_next(sg))
  687. nbytes -= sg->length;
  688. return i;
  689. }
  690. static size_t qcrypto_sg_copy_from_buffer(struct scatterlist *sgl,
  691. unsigned int nents, void *buf, size_t buflen)
  692. {
  693. int i;
  694. size_t offset, len;
  695. for (i = 0, offset = 0; i < nents; ++i) {
  696. len = sg_copy_from_buffer(sgl, 1, buf, buflen);
  697. buf += len;
  698. buflen -= len;
  699. offset += len;
  700. sgl = sg_next(sgl);
  701. }
  702. return offset;
  703. }
  704. static size_t qcrypto_sg_copy_to_buffer(struct scatterlist *sgl,
  705. unsigned int nents, void *buf, size_t buflen)
  706. {
  707. int i;
  708. size_t offset, len;
  709. for (i = 0, offset = 0; i < nents; ++i) {
  710. len = sg_copy_to_buffer(sgl, 1, buf, buflen);
  711. buf += len;
  712. buflen -= len;
  713. offset += len;
  714. sgl = sg_next(sgl);
  715. }
  716. return offset;
  717. }
  718. static struct qcrypto_alg *_qcrypto_sha_alg_alloc(struct crypto_priv *cp,
  719. struct ahash_alg *template)
  720. {
  721. struct qcrypto_alg *q_alg;
  722. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  723. if (!q_alg)
  724. return ERR_PTR(-ENOMEM);
  725. q_alg->alg_type = QCRYPTO_ALG_SHA;
  726. q_alg->sha_alg = *template;
  727. q_alg->cp = cp;
  728. return q_alg;
  729. };
  730. static struct qcrypto_alg *_qcrypto_cipher_alg_alloc(struct crypto_priv *cp,
  731. struct crypto_alg *template)
  732. {
  733. struct qcrypto_alg *q_alg;
  734. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  735. if (!q_alg)
  736. return ERR_PTR(-ENOMEM);
  737. q_alg->alg_type = QCRYPTO_ALG_CIPHER;
  738. q_alg->cipher_alg = *template;
  739. q_alg->cp = cp;
  740. return q_alg;
  741. };
  742. static struct qcrypto_alg *_qcrypto_aead_alg_alloc(struct crypto_priv *cp,
  743. struct aead_alg *template)
  744. {
  745. struct qcrypto_alg *q_alg;
  746. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  747. if (!q_alg)
  748. return ERR_PTR(-ENOMEM);
  749. q_alg->alg_type = QCRYPTO_ALG_AEAD;
  750. q_alg->aead_alg = *template;
  751. q_alg->cp = cp;
  752. return q_alg;
  753. };
  754. static int _qcrypto_cipher_ctx_init(struct qcrypto_cipher_ctx *ctx,
  755. struct qcrypto_alg *q_alg)
  756. {
  757. if (!ctx || !q_alg) {
  758. pr_err("ctx or q_alg is NULL\n");
  759. return -EINVAL;
  760. }
  761. ctx->flags = 0;
  762. /* update context with ptr to cp */
  763. ctx->cp = q_alg->cp;
  764. /* random first IV */
  765. get_random_bytes(ctx->iv, QCRYPTO_MAX_IV_LENGTH);
  766. if (_qcrypto_init_assign) {
  767. ctx->pengine = _qcrypto_static_assign_engine(ctx->cp);
  768. if (ctx->pengine == NULL)
  769. return -ENODEV;
  770. } else
  771. ctx->pengine = NULL;
  772. INIT_LIST_HEAD(&ctx->rsp_queue);
  773. ctx->auth_alg = QCE_HASH_LAST;
  774. return 0;
  775. }
  776. static int _qcrypto_cipher_cra_init(struct crypto_tfm *tfm)
  777. {
  778. struct crypto_alg *alg = tfm->__crt_alg;
  779. struct qcrypto_alg *q_alg;
  780. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  781. q_alg = container_of(alg, struct qcrypto_alg, cipher_alg);
  782. return _qcrypto_cipher_ctx_init(ctx, q_alg);
  783. };
  784. static int _qcrypto_ahash_cra_init(struct crypto_tfm *tfm)
  785. {
  786. struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
  787. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  788. struct ahash_alg *alg = container_of(crypto_hash_alg_common(ahash),
  789. struct ahash_alg, halg);
  790. struct qcrypto_alg *q_alg = container_of(alg, struct qcrypto_alg,
  791. sha_alg);
  792. crypto_ahash_set_reqsize(ahash, sizeof(struct qcrypto_sha_req_ctx));
  793. /* update context with ptr to cp */
  794. sha_ctx->cp = q_alg->cp;
  795. sha_ctx->flags = 0;
  796. sha_ctx->ahash_req = NULL;
  797. if (_qcrypto_init_assign) {
  798. sha_ctx->pengine = _qcrypto_static_assign_engine(sha_ctx->cp);
  799. if (sha_ctx->pengine == NULL)
  800. return -ENODEV;
  801. } else
  802. sha_ctx->pengine = NULL;
  803. INIT_LIST_HEAD(&sha_ctx->rsp_queue);
  804. return 0;
  805. };
  806. static void _qcrypto_ahash_cra_exit(struct crypto_tfm *tfm)
  807. {
  808. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  809. if (!list_empty(&sha_ctx->rsp_queue))
  810. pr_err("_qcrypto_ahash_cra_exit: requests still outstanding");
  811. if (sha_ctx->ahash_req != NULL) {
  812. ahash_request_free(sha_ctx->ahash_req);
  813. sha_ctx->ahash_req = NULL;
  814. }
  815. };
  816. static void _crypto_sha_hmac_ahash_req_complete(
  817. struct crypto_async_request *req, int err);
  818. static int _qcrypto_ahash_hmac_cra_init(struct crypto_tfm *tfm)
  819. {
  820. struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
  821. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  822. int ret = 0;
  823. ret = _qcrypto_ahash_cra_init(tfm);
  824. if (ret)
  825. return ret;
  826. sha_ctx->ahash_req = ahash_request_alloc(ahash, GFP_KERNEL);
  827. if (sha_ctx->ahash_req == NULL) {
  828. _qcrypto_ahash_cra_exit(tfm);
  829. return -ENOMEM;
  830. }
  831. init_completion(&sha_ctx->ahash_req_complete);
  832. ahash_request_set_callback(sha_ctx->ahash_req,
  833. CRYPTO_TFM_REQ_MAY_BACKLOG,
  834. _crypto_sha_hmac_ahash_req_complete,
  835. &sha_ctx->ahash_req_complete);
  836. crypto_ahash_clear_flags(ahash, ~0);
  837. return 0;
  838. };
  839. static int _qcrypto_cra_ablkcipher_init(struct crypto_tfm *tfm)
  840. {
  841. tfm->crt_ablkcipher.reqsize = sizeof(struct qcrypto_cipher_req_ctx);
  842. return _qcrypto_cipher_cra_init(tfm);
  843. };
  844. static int _qcrypto_cra_aes_ablkcipher_init(struct crypto_tfm *tfm)
  845. {
  846. const char *name = tfm->__crt_alg->cra_name;
  847. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  848. int ret;
  849. struct crypto_priv *cp = &qcrypto_dev;
  850. if (cp->ce_support.use_sw_aes_cbc_ecb_ctr_algo) {
  851. ctx->cipher_aes192_fb = NULL;
  852. return _qcrypto_cra_ablkcipher_init(tfm);
  853. }
  854. ctx->cipher_aes192_fb = crypto_alloc_skcipher(name, 0,
  855. CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK);
  856. if (IS_ERR(ctx->cipher_aes192_fb)) {
  857. pr_err("Error allocating fallback algo %s\n", name);
  858. ret = PTR_ERR(ctx->cipher_aes192_fb);
  859. ctx->cipher_aes192_fb = NULL;
  860. return ret;
  861. }
  862. return _qcrypto_cra_ablkcipher_init(tfm);
  863. };
  864. static int _qcrypto_aead_cra_init(struct crypto_aead *tfm)
  865. {
  866. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  867. struct aead_alg *aeadalg = crypto_aead_alg(tfm);
  868. struct qcrypto_alg *q_alg = container_of(aeadalg, struct qcrypto_alg,
  869. aead_alg);
  870. return _qcrypto_cipher_ctx_init(ctx, q_alg);
  871. };
  872. static int _qcrypto_cra_aead_sha1_init(struct crypto_aead *tfm)
  873. {
  874. int rc;
  875. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  876. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  877. rc = _qcrypto_aead_cra_init(tfm);
  878. ctx->auth_alg = QCE_HASH_SHA1_HMAC;
  879. return rc;
  880. }
  881. static int _qcrypto_cra_aead_sha256_init(struct crypto_aead *tfm)
  882. {
  883. int rc;
  884. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  885. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  886. rc = _qcrypto_aead_cra_init(tfm);
  887. ctx->auth_alg = QCE_HASH_SHA256_HMAC;
  888. return rc;
  889. }
  890. static int _qcrypto_cra_aead_ccm_init(struct crypto_aead *tfm)
  891. {
  892. int rc;
  893. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  894. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  895. rc = _qcrypto_aead_cra_init(tfm);
  896. ctx->auth_alg = QCE_HASH_AES_CMAC;
  897. return rc;
  898. }
  899. static int _qcrypto_cra_aead_rfc4309_ccm_init(struct crypto_aead *tfm)
  900. {
  901. int rc;
  902. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  903. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  904. rc = _qcrypto_aead_cra_init(tfm);
  905. ctx->auth_alg = QCE_HASH_AES_CMAC;
  906. return rc;
  907. }
  908. static int _qcrypto_cra_aead_aes_sha1_init(struct crypto_aead *tfm)
  909. {
  910. int rc;
  911. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  912. struct crypto_priv *cp = &qcrypto_dev;
  913. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  914. rc = _qcrypto_aead_cra_init(tfm);
  915. if (rc)
  916. return rc;
  917. ctx->cipher_aes192_fb = NULL;
  918. ctx->ahash_aead_aes192_fb = NULL;
  919. if (!cp->ce_support.aes_key_192) {
  920. ctx->cipher_aes192_fb = crypto_alloc_skcipher(
  921. "cbc(aes)", 0, 0);
  922. if (IS_ERR(ctx->cipher_aes192_fb)) {
  923. ctx->cipher_aes192_fb = NULL;
  924. } else {
  925. ctx->ahash_aead_aes192_fb = crypto_alloc_ahash(
  926. "hmac(sha1)", 0, 0);
  927. if (IS_ERR(ctx->ahash_aead_aes192_fb)) {
  928. ctx->ahash_aead_aes192_fb = NULL;
  929. crypto_free_skcipher(ctx->cipher_aes192_fb);
  930. ctx->cipher_aes192_fb = NULL;
  931. }
  932. }
  933. }
  934. ctx->auth_alg = QCE_HASH_SHA1_HMAC;
  935. return 0;
  936. }
  937. static int _qcrypto_cra_aead_aes_sha256_init(struct crypto_aead *tfm)
  938. {
  939. int rc;
  940. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  941. struct crypto_priv *cp = &qcrypto_dev;
  942. crypto_aead_set_reqsize(tfm, sizeof(struct qcrypto_cipher_req_ctx));
  943. rc = _qcrypto_aead_cra_init(tfm);
  944. if (rc)
  945. return rc;
  946. ctx->cipher_aes192_fb = NULL;
  947. ctx->ahash_aead_aes192_fb = NULL;
  948. if (!cp->ce_support.aes_key_192) {
  949. ctx->cipher_aes192_fb = crypto_alloc_skcipher(
  950. "cbc(aes)", 0, 0);
  951. if (IS_ERR(ctx->cipher_aes192_fb)) {
  952. ctx->cipher_aes192_fb = NULL;
  953. } else {
  954. ctx->ahash_aead_aes192_fb = crypto_alloc_ahash(
  955. "hmac(sha256)", 0, 0);
  956. if (IS_ERR(ctx->ahash_aead_aes192_fb)) {
  957. ctx->ahash_aead_aes192_fb = NULL;
  958. crypto_free_skcipher(ctx->cipher_aes192_fb);
  959. ctx->cipher_aes192_fb = NULL;
  960. }
  961. }
  962. }
  963. ctx->auth_alg = QCE_HASH_SHA256_HMAC;
  964. return 0;
  965. }
  966. static void _qcrypto_cra_ablkcipher_exit(struct crypto_tfm *tfm)
  967. {
  968. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  969. if (!list_empty(&ctx->rsp_queue))
  970. pr_err("_qcrypto__cra_ablkcipher_exit: requests still outstanding");
  971. };
  972. static void _qcrypto_cra_aes_ablkcipher_exit(struct crypto_tfm *tfm)
  973. {
  974. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  975. _qcrypto_cra_ablkcipher_exit(tfm);
  976. if (ctx->cipher_aes192_fb)
  977. crypto_free_skcipher(ctx->cipher_aes192_fb);
  978. ctx->cipher_aes192_fb = NULL;
  979. }
  980. static void _qcrypto_cra_aead_exit(struct crypto_aead *tfm)
  981. {
  982. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  983. if (!list_empty(&ctx->rsp_queue))
  984. pr_err("_qcrypto__cra_aead_exit: requests still outstanding");
  985. }
  986. static void _qcrypto_cra_aead_aes_exit(struct crypto_aead *tfm)
  987. {
  988. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  989. if (!list_empty(&ctx->rsp_queue))
  990. pr_err("_qcrypto__cra_aead_exit: requests still outstanding");
  991. if (ctx->cipher_aes192_fb)
  992. crypto_free_skcipher(ctx->cipher_aes192_fb);
  993. if (ctx->ahash_aead_aes192_fb)
  994. crypto_free_ahash(ctx->ahash_aead_aes192_fb);
  995. ctx->cipher_aes192_fb = NULL;
  996. ctx->ahash_aead_aes192_fb = NULL;
  997. }
  998. static int _disp_stats(int id)
  999. {
  1000. struct crypto_stat *pstat;
  1001. int len = 0;
  1002. unsigned long flags;
  1003. struct crypto_priv *cp = &qcrypto_dev;
  1004. struct crypto_engine *pe;
  1005. int i;
  1006. pstat = &_qcrypto_stat;
  1007. len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1,
  1008. "\nQTI crypto accelerator %d Statistics\n",
  1009. id + 1);
  1010. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1011. " ABLK CIPHER AES encryption : %llu\n",
  1012. pstat->ablk_cipher_aes_enc);
  1013. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1014. " ABLK CIPHER AES decryption : %llu\n",
  1015. pstat->ablk_cipher_aes_dec);
  1016. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1017. " ABLK CIPHER DES encryption : %llu\n",
  1018. pstat->ablk_cipher_des_enc);
  1019. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1020. " ABLK CIPHER DES decryption : %llu\n",
  1021. pstat->ablk_cipher_des_dec);
  1022. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1023. " ABLK CIPHER 3DES encryption : %llu\n",
  1024. pstat->ablk_cipher_3des_enc);
  1025. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1026. " ABLK CIPHER 3DES decryption : %llu\n",
  1027. pstat->ablk_cipher_3des_dec);
  1028. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1029. " ABLK CIPHER operation success : %llu\n",
  1030. pstat->ablk_cipher_op_success);
  1031. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1032. " ABLK CIPHER operation fail : %llu\n",
  1033. pstat->ablk_cipher_op_fail);
  1034. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1035. "\n");
  1036. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1037. " AEAD SHA1-AES encryption : %llu\n",
  1038. pstat->aead_sha1_aes_enc);
  1039. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1040. " AEAD SHA1-AES decryption : %llu\n",
  1041. pstat->aead_sha1_aes_dec);
  1042. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1043. " AEAD SHA1-DES encryption : %llu\n",
  1044. pstat->aead_sha1_des_enc);
  1045. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1046. " AEAD SHA1-DES decryption : %llu\n",
  1047. pstat->aead_sha1_des_dec);
  1048. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1049. " AEAD SHA1-3DES encryption : %llu\n",
  1050. pstat->aead_sha1_3des_enc);
  1051. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1052. " AEAD SHA1-3DES decryption : %llu\n",
  1053. pstat->aead_sha1_3des_dec);
  1054. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1055. " AEAD SHA256-AES encryption : %llu\n",
  1056. pstat->aead_sha256_aes_enc);
  1057. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1058. " AEAD SHA256-AES decryption : %llu\n",
  1059. pstat->aead_sha256_aes_dec);
  1060. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1061. " AEAD SHA256-DES encryption : %llu\n",
  1062. pstat->aead_sha256_des_enc);
  1063. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1064. " AEAD SHA256-DES decryption : %llu\n",
  1065. pstat->aead_sha256_des_dec);
  1066. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1067. " AEAD SHA256-3DES encryption : %llu\n",
  1068. pstat->aead_sha256_3des_enc);
  1069. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1070. " AEAD SHA256-3DES decryption : %llu\n",
  1071. pstat->aead_sha256_3des_dec);
  1072. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1073. " AEAD CCM-AES encryption : %llu\n",
  1074. pstat->aead_ccm_aes_enc);
  1075. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1076. " AEAD CCM-AES decryption : %llu\n",
  1077. pstat->aead_ccm_aes_dec);
  1078. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1079. " AEAD RFC4309-CCM-AES encryption : %llu\n",
  1080. pstat->aead_rfc4309_ccm_aes_enc);
  1081. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1082. " AEAD RFC4309-CCM-AES decryption : %llu\n",
  1083. pstat->aead_rfc4309_ccm_aes_dec);
  1084. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1085. " AEAD operation success : %llu\n",
  1086. pstat->aead_op_success);
  1087. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1088. " AEAD operation fail : %llu\n",
  1089. pstat->aead_op_fail);
  1090. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1091. " AEAD bad message : %llu\n",
  1092. pstat->aead_bad_msg);
  1093. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1094. "\n");
  1095. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1096. " AHASH SHA1 digest : %llu\n",
  1097. pstat->sha1_digest);
  1098. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1099. " AHASH SHA256 digest : %llu\n",
  1100. pstat->sha256_digest);
  1101. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1102. " AHASH SHA1 HMAC digest : %llu\n",
  1103. pstat->sha1_hmac_digest);
  1104. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1105. " AHASH SHA256 HMAC digest : %llu\n",
  1106. pstat->sha256_hmac_digest);
  1107. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1108. " AHASH operation success : %llu\n",
  1109. pstat->ahash_op_success);
  1110. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1111. " AHASH operation fail : %llu\n",
  1112. pstat->ahash_op_fail);
  1113. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1114. " resp start, resp stop, max rsp queue reorder-cnt : %u %u %u %u\n",
  1115. cp->resp_start, cp->resp_stop,
  1116. cp->max_resp_qlen, cp->max_reorder_cnt);
  1117. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1118. " max queue legnth, no avail : %u %u\n",
  1119. cp->max_qlen, cp->no_avail);
  1120. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1121. " work queue : %u %u %u\n",
  1122. cp->queue_work_eng3,
  1123. cp->queue_work_not_eng3,
  1124. cp->queue_work_not_eng3_nz);
  1125. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  1126. "\n");
  1127. spin_lock_irqsave(&cp->lock, flags);
  1128. list_for_each_entry(pe, &cp->engine_list, elist) {
  1129. len += scnprintf(
  1130. _debug_read_buf + len,
  1131. DEBUG_MAX_RW_BUF - len - 1,
  1132. " Engine %4d Req max %d : %llu\n",
  1133. pe->unit,
  1134. pe->max_req_used,
  1135. pe->total_req
  1136. );
  1137. len += scnprintf(
  1138. _debug_read_buf + len,
  1139. DEBUG_MAX_RW_BUF - len - 1,
  1140. " Engine %4d Req Error : %llu\n",
  1141. pe->unit,
  1142. pe->err_req
  1143. );
  1144. qce_get_driver_stats(pe->qce);
  1145. }
  1146. spin_unlock_irqrestore(&cp->lock, flags);
  1147. for (i = 0; i < MAX_SMP_CPU+1; i++)
  1148. if (cp->cpu_req[i])
  1149. len += scnprintf(
  1150. _debug_read_buf + len,
  1151. DEBUG_MAX_RW_BUF - len - 1,
  1152. "CPU %d Issue Req : %d\n",
  1153. i, cp->cpu_req[i]);
  1154. return len;
  1155. }
  1156. static void _qcrypto_remove_engine(struct crypto_engine *pengine)
  1157. {
  1158. struct crypto_priv *cp;
  1159. struct qcrypto_alg *q_alg;
  1160. struct qcrypto_alg *n;
  1161. unsigned long flags;
  1162. struct crypto_engine *pe;
  1163. cp = pengine->pcp;
  1164. spin_lock_irqsave(&cp->lock, flags);
  1165. list_del(&pengine->elist);
  1166. if (pengine->first_engine) {
  1167. cp->first_engine = NULL;
  1168. pe = list_first_entry(&cp->engine_list, struct crypto_engine,
  1169. elist);
  1170. if (pe) {
  1171. pe->first_engine = true;
  1172. cp->first_engine = pe;
  1173. }
  1174. }
  1175. if (cp->next_engine == pengine)
  1176. cp->next_engine = NULL;
  1177. if (cp->scheduled_eng == pengine)
  1178. cp->scheduled_eng = NULL;
  1179. spin_unlock_irqrestore(&cp->lock, flags);
  1180. cp->total_units--;
  1181. cancel_work_sync(&pengine->bw_reaper_ws);
  1182. cancel_work_sync(&pengine->bw_allocate_ws);
  1183. del_timer_sync(&pengine->bw_reaper_timer);
  1184. if (pengine->bus_scale_handle != 0)
  1185. msm_bus_scale_unregister_client(pengine->bus_scale_handle);
  1186. pengine->bus_scale_handle = 0;
  1187. kzfree(pengine->preq_pool);
  1188. if (cp->total_units)
  1189. return;
  1190. list_for_each_entry_safe(q_alg, n, &cp->alg_list, entry) {
  1191. if (q_alg->alg_type == QCRYPTO_ALG_CIPHER)
  1192. crypto_unregister_alg(&q_alg->cipher_alg);
  1193. if (q_alg->alg_type == QCRYPTO_ALG_SHA)
  1194. crypto_unregister_ahash(&q_alg->sha_alg);
  1195. if (q_alg->alg_type == QCRYPTO_ALG_AEAD)
  1196. crypto_unregister_aead(&q_alg->aead_alg);
  1197. list_del(&q_alg->entry);
  1198. kzfree(q_alg);
  1199. }
  1200. }
  1201. static int _qcrypto_remove(struct platform_device *pdev)
  1202. {
  1203. struct crypto_engine *pengine;
  1204. struct crypto_priv *cp;
  1205. pengine = platform_get_drvdata(pdev);
  1206. if (!pengine)
  1207. return 0;
  1208. cp = pengine->pcp;
  1209. mutex_lock(&cp->engine_lock);
  1210. _qcrypto_remove_engine(pengine);
  1211. mutex_unlock(&cp->engine_lock);
  1212. if (pengine->qce)
  1213. qce_close(pengine->qce);
  1214. kzfree(pengine);
  1215. return 0;
  1216. }
  1217. static int _qcrypto_check_aes_keylen(struct crypto_ablkcipher *cipher,
  1218. struct crypto_priv *cp, unsigned int len)
  1219. {
  1220. switch (len) {
  1221. case AES_KEYSIZE_128:
  1222. case AES_KEYSIZE_256:
  1223. break;
  1224. case AES_KEYSIZE_192:
  1225. if (cp->ce_support.aes_key_192)
  1226. break;
  1227. default:
  1228. crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1229. return -EINVAL;
  1230. };
  1231. return 0;
  1232. }
  1233. static int _qcrypto_setkey_aes_192_fallback(struct crypto_ablkcipher *cipher,
  1234. const u8 *key)
  1235. {
  1236. struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
  1237. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  1238. int ret;
  1239. ctx->enc_key_len = AES_KEYSIZE_192;
  1240. ctx->cipher_aes192_fb->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
  1241. ctx->cipher_aes192_fb->base.crt_flags |=
  1242. (cipher->base.crt_flags & CRYPTO_TFM_REQ_MASK);
  1243. ret = crypto_skcipher_setkey(ctx->cipher_aes192_fb, key,
  1244. AES_KEYSIZE_192);
  1245. if (ret) {
  1246. tfm->crt_flags &= ~CRYPTO_TFM_RES_MASK;
  1247. tfm->crt_flags |=
  1248. (cipher->base.crt_flags & CRYPTO_TFM_RES_MASK);
  1249. }
  1250. return ret;
  1251. }
  1252. static int _qcrypto_setkey_aes(struct crypto_ablkcipher *cipher, const u8 *key,
  1253. unsigned int len)
  1254. {
  1255. struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
  1256. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  1257. struct crypto_priv *cp = ctx->cp;
  1258. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY)
  1259. return 0;
  1260. if ((len == AES_KEYSIZE_192) && (!cp->ce_support.aes_key_192)
  1261. && ctx->cipher_aes192_fb)
  1262. return _qcrypto_setkey_aes_192_fallback(cipher, key);
  1263. if (_qcrypto_check_aes_keylen(cipher, cp, len))
  1264. return -EINVAL;
  1265. ctx->enc_key_len = len;
  1266. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  1267. if (key != NULL) {
  1268. memcpy(ctx->enc_key, key, len);
  1269. } else {
  1270. pr_err("%s Inavlid key pointer\n", __func__);
  1271. return -EINVAL;
  1272. }
  1273. }
  1274. return 0;
  1275. };
  1276. static int _qcrypto_setkey_aes_xts(struct crypto_ablkcipher *cipher,
  1277. const u8 *key, unsigned int len)
  1278. {
  1279. struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
  1280. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  1281. struct crypto_priv *cp = ctx->cp;
  1282. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY)
  1283. return 0;
  1284. if (_qcrypto_check_aes_keylen(cipher, cp, len/2))
  1285. return -EINVAL;
  1286. ctx->enc_key_len = len;
  1287. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  1288. if (key != NULL) {
  1289. memcpy(ctx->enc_key, key, len);
  1290. } else {
  1291. pr_err("%s Inavlid key pointer\n", __func__);
  1292. return -EINVAL;
  1293. }
  1294. }
  1295. return 0;
  1296. };
  1297. static int _qcrypto_setkey_des(struct crypto_ablkcipher *cipher, const u8 *key,
  1298. unsigned int len)
  1299. {
  1300. struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
  1301. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  1302. u32 tmp[DES_EXPKEY_WORDS];
  1303. int ret;
  1304. if (!key) {
  1305. pr_err("%s Inavlid key pointer\n", __func__);
  1306. return -EINVAL;
  1307. }
  1308. ret = des_ekey(tmp, key);
  1309. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY) {
  1310. pr_err("%s HW KEY usage not supported for DES algorithm\n",
  1311. __func__);
  1312. return 0;
  1313. };
  1314. if (len != DES_KEY_SIZE) {
  1315. crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1316. return -EINVAL;
  1317. };
  1318. if (unlikely(ret == 0) && (tfm->crt_flags & CRYPTO_TFM_REQ_WEAK_KEY)) {
  1319. tfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY;
  1320. return -EINVAL;
  1321. }
  1322. ctx->enc_key_len = len;
  1323. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY))
  1324. memcpy(ctx->enc_key, key, len);
  1325. return 0;
  1326. };
  1327. static int _qcrypto_setkey_3des(struct crypto_ablkcipher *cipher, const u8 *key,
  1328. unsigned int len)
  1329. {
  1330. struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
  1331. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  1332. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY) {
  1333. pr_err("%s HW KEY usage not supported for 3DES algorithm\n",
  1334. __func__);
  1335. return 0;
  1336. };
  1337. if (len != DES3_EDE_KEY_SIZE) {
  1338. crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  1339. return -EINVAL;
  1340. };
  1341. ctx->enc_key_len = len;
  1342. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  1343. if (key != NULL) {
  1344. memcpy(ctx->enc_key, key, len);
  1345. } else {
  1346. pr_err("%s Inavlid key pointer\n", __func__);
  1347. return -EINVAL;
  1348. }
  1349. }
  1350. return 0;
  1351. };
  1352. static void seq_response(struct work_struct *work)
  1353. {
  1354. struct crypto_priv *cp = container_of(work, struct crypto_priv,
  1355. resp_work);
  1356. struct llist_node *list;
  1357. struct llist_node *rev = NULL;
  1358. struct crypto_engine *pengine;
  1359. unsigned long flags;
  1360. int total_unit;
  1361. again:
  1362. list = llist_del_all(&cp->ordered_resp_list);
  1363. if (!list)
  1364. goto end;
  1365. while (list) {
  1366. struct llist_node *t = list;
  1367. list = llist_next(list);
  1368. t->next = rev;
  1369. rev = t;
  1370. }
  1371. while (rev) {
  1372. struct qcrypto_resp_ctx *arsp;
  1373. struct crypto_async_request *areq;
  1374. arsp = container_of(rev, struct qcrypto_resp_ctx, llist);
  1375. rev = llist_next(rev);
  1376. areq = arsp->async_req;
  1377. local_bh_disable();
  1378. areq->complete(areq, arsp->res);
  1379. local_bh_enable();
  1380. atomic_dec(&cp->resp_cnt);
  1381. }
  1382. if (atomic_read(&cp->resp_cnt) < COMPLETION_CB_BACKLOG_LENGTH_START &&
  1383. (cmpxchg(&cp->ce_req_proc_sts, STOPPED, IN_PROGRESS)
  1384. == STOPPED)) {
  1385. cp->resp_start++;
  1386. for (total_unit = cp->total_units; total_unit-- > 0;) {
  1387. spin_lock_irqsave(&cp->lock, flags);
  1388. pengine = _avail_eng(cp);
  1389. spin_unlock_irqrestore(&cp->lock, flags);
  1390. if (pengine)
  1391. _start_qcrypto_process(cp, pengine);
  1392. else
  1393. break;
  1394. }
  1395. }
  1396. end:
  1397. if (cmpxchg(&cp->sched_resp_workq_status, SCHEDULE_AGAIN,
  1398. IS_SCHEDULED) == SCHEDULE_AGAIN)
  1399. goto again;
  1400. else if (cmpxchg(&cp->sched_resp_workq_status, IS_SCHEDULED,
  1401. NOT_SCHEDULED) == SCHEDULE_AGAIN)
  1402. goto end;
  1403. }
  1404. #define SCHEUDLE_RSP_QLEN_THRESHOLD 64
  1405. static void _qcrypto_tfm_complete(struct crypto_engine *pengine, u32 type,
  1406. void *tfm_ctx,
  1407. struct qcrypto_resp_ctx *cur_arsp,
  1408. int res)
  1409. {
  1410. struct crypto_priv *cp = pengine->pcp;
  1411. unsigned long flags;
  1412. struct qcrypto_resp_ctx *arsp;
  1413. struct list_head *plist;
  1414. unsigned int resp_qlen;
  1415. unsigned int cnt = 0;
  1416. switch (type) {
  1417. case CRYPTO_ALG_TYPE_AHASH:
  1418. plist = &((struct qcrypto_sha_ctx *) tfm_ctx)->rsp_queue;
  1419. break;
  1420. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  1421. case CRYPTO_ALG_TYPE_AEAD:
  1422. default:
  1423. plist = &((struct qcrypto_cipher_ctx *) tfm_ctx)->rsp_queue;
  1424. break;
  1425. }
  1426. spin_lock_irqsave(&cp->lock, flags);
  1427. cur_arsp->res = res;
  1428. while (!list_empty(plist)) {
  1429. arsp = list_first_entry(plist,
  1430. struct qcrypto_resp_ctx, list);
  1431. if (arsp->res == -EINPROGRESS)
  1432. break;
  1433. list_del(&arsp->list);
  1434. llist_add(&arsp->llist, &cp->ordered_resp_list);
  1435. atomic_inc(&cp->resp_cnt);
  1436. cnt++;
  1437. }
  1438. resp_qlen = atomic_read(&cp->resp_cnt);
  1439. if (resp_qlen > cp->max_resp_qlen)
  1440. cp->max_resp_qlen = resp_qlen;
  1441. if (cnt > cp->max_reorder_cnt)
  1442. cp->max_reorder_cnt = cnt;
  1443. if ((resp_qlen >= COMPLETION_CB_BACKLOG_LENGTH_STOP) &&
  1444. cmpxchg(&cp->ce_req_proc_sts, IN_PROGRESS,
  1445. STOPPED) == IN_PROGRESS) {
  1446. cp->resp_stop++;
  1447. }
  1448. spin_unlock_irqrestore(&cp->lock, flags);
  1449. retry:
  1450. if (!llist_empty(&cp->ordered_resp_list)) {
  1451. unsigned int cpu;
  1452. if (pengine->first_engine) {
  1453. cpu = WORK_CPU_UNBOUND;
  1454. cp->queue_work_eng3++;
  1455. } else {
  1456. cp->queue_work_not_eng3++;
  1457. cpu = cp->cpu_getting_irqs_frm_first_ce;
  1458. /*
  1459. * If source not the first engine, and there
  1460. * are outstanding requests going on first engine,
  1461. * skip scheduling of work queue to anticipate
  1462. * more may be coming. If the response queue
  1463. * length exceeds threshold, to avoid further
  1464. * delay, schedule work queue immediately.
  1465. */
  1466. if (cp->first_engine && atomic_read(
  1467. &cp->first_engine->req_count)) {
  1468. if (resp_qlen < SCHEUDLE_RSP_QLEN_THRESHOLD)
  1469. return;
  1470. cp->queue_work_not_eng3_nz++;
  1471. }
  1472. }
  1473. if (cmpxchg(&cp->sched_resp_workq_status, NOT_SCHEDULED,
  1474. IS_SCHEDULED) == NOT_SCHEDULED)
  1475. queue_work_on(cpu, cp->resp_wq, &cp->resp_work);
  1476. else if (cmpxchg(&cp->sched_resp_workq_status, IS_SCHEDULED,
  1477. SCHEDULE_AGAIN) == NOT_SCHEDULED)
  1478. goto retry;
  1479. }
  1480. }
  1481. static void req_done(struct qcrypto_req_control *pqcrypto_req_control)
  1482. {
  1483. struct crypto_engine *pengine;
  1484. struct crypto_async_request *areq;
  1485. struct crypto_priv *cp;
  1486. struct qcrypto_resp_ctx *arsp;
  1487. u32 type = 0;
  1488. void *tfm_ctx = NULL;
  1489. unsigned int cpu;
  1490. int res;
  1491. pengine = pqcrypto_req_control->pce;
  1492. cp = pengine->pcp;
  1493. areq = pqcrypto_req_control->req;
  1494. arsp = pqcrypto_req_control->arsp;
  1495. res = pqcrypto_req_control->res;
  1496. qcrypto_free_req_control(pengine, pqcrypto_req_control);
  1497. if (areq) {
  1498. type = crypto_tfm_alg_type(areq->tfm);
  1499. tfm_ctx = crypto_tfm_ctx(areq->tfm);
  1500. }
  1501. cpu = smp_processor_id();
  1502. pengine->irq_cpu = cpu;
  1503. if (pengine->first_engine) {
  1504. if (cpu != cp->cpu_getting_irqs_frm_first_ce)
  1505. cp->cpu_getting_irqs_frm_first_ce = cpu;
  1506. }
  1507. if (areq)
  1508. _qcrypto_tfm_complete(pengine, type, tfm_ctx, arsp, res);
  1509. if (READ_ONCE(cp->ce_req_proc_sts) == IN_PROGRESS)
  1510. _start_qcrypto_process(cp, pengine);
  1511. }
  1512. static void _qce_ahash_complete(void *cookie, unsigned char *digest,
  1513. unsigned char *authdata, int ret)
  1514. {
  1515. struct ahash_request *areq = (struct ahash_request *) cookie;
  1516. struct crypto_async_request *async_req;
  1517. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  1518. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(areq->base.tfm);
  1519. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(areq);
  1520. struct crypto_priv *cp = sha_ctx->cp;
  1521. struct crypto_stat *pstat;
  1522. uint32_t diglen = crypto_ahash_digestsize(ahash);
  1523. uint32_t *auth32 = (uint32_t *)authdata;
  1524. struct crypto_engine *pengine;
  1525. struct qcrypto_req_control *pqcrypto_req_control;
  1526. async_req = &areq->base;
  1527. pstat = &_qcrypto_stat;
  1528. pengine = rctx->pengine;
  1529. pqcrypto_req_control = find_req_control_for_areq(pengine,
  1530. async_req);
  1531. if (pqcrypto_req_control == NULL) {
  1532. pr_err("async request not found\n");
  1533. return;
  1534. }
  1535. #ifdef QCRYPTO_DEBUG
  1536. dev_info(&pengine->pdev->dev, "_qce_ahash_complete: %pK ret %d\n",
  1537. areq, ret);
  1538. #endif
  1539. if (digest) {
  1540. memcpy(rctx->digest, digest, diglen);
  1541. if (rctx->last_blk)
  1542. memcpy(areq->result, digest, diglen);
  1543. }
  1544. if (authdata) {
  1545. rctx->byte_count[0] = auth32[0];
  1546. rctx->byte_count[1] = auth32[1];
  1547. rctx->byte_count[2] = auth32[2];
  1548. rctx->byte_count[3] = auth32[3];
  1549. }
  1550. areq->src = rctx->src;
  1551. areq->nbytes = rctx->nbytes;
  1552. rctx->last_blk = 0;
  1553. rctx->first_blk = 0;
  1554. if (ret) {
  1555. pqcrypto_req_control->res = -ENXIO;
  1556. pstat->ahash_op_fail++;
  1557. } else {
  1558. pqcrypto_req_control->res = 0;
  1559. pstat->ahash_op_success++;
  1560. }
  1561. if (cp->ce_support.aligned_only) {
  1562. areq->src = rctx->orig_src;
  1563. kfree(rctx->data);
  1564. }
  1565. req_done(pqcrypto_req_control);
  1566. };
  1567. static void _qce_ablk_cipher_complete(void *cookie, unsigned char *icb,
  1568. unsigned char *iv, int ret)
  1569. {
  1570. struct ablkcipher_request *areq = (struct ablkcipher_request *) cookie;
  1571. struct crypto_async_request *async_req;
  1572. struct crypto_ablkcipher *ablk = crypto_ablkcipher_reqtfm(areq);
  1573. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(areq->base.tfm);
  1574. struct crypto_priv *cp = ctx->cp;
  1575. struct crypto_stat *pstat;
  1576. struct qcrypto_cipher_req_ctx *rctx;
  1577. struct crypto_engine *pengine;
  1578. struct qcrypto_req_control *pqcrypto_req_control;
  1579. async_req = &areq->base;
  1580. pstat = &_qcrypto_stat;
  1581. rctx = ablkcipher_request_ctx(areq);
  1582. pengine = rctx->pengine;
  1583. pqcrypto_req_control = find_req_control_for_areq(pengine,
  1584. async_req);
  1585. if (pqcrypto_req_control == NULL) {
  1586. pr_err("async request not found\n");
  1587. return;
  1588. }
  1589. #ifdef QCRYPTO_DEBUG
  1590. dev_info(&pengine->pdev->dev, "_qce_ablk_cipher_complete: %pK ret %d\n",
  1591. areq, ret);
  1592. #endif
  1593. if (iv)
  1594. memcpy(ctx->iv, iv, crypto_ablkcipher_ivsize(ablk));
  1595. if (ret) {
  1596. pqcrypto_req_control->res = -ENXIO;
  1597. pstat->ablk_cipher_op_fail++;
  1598. } else {
  1599. pqcrypto_req_control->res = 0;
  1600. pstat->ablk_cipher_op_success++;
  1601. }
  1602. if (cp->ce_support.aligned_only) {
  1603. struct qcrypto_cipher_req_ctx *rctx;
  1604. uint32_t num_sg = 0;
  1605. uint32_t bytes = 0;
  1606. rctx = ablkcipher_request_ctx(areq);
  1607. areq->src = rctx->orig_src;
  1608. areq->dst = rctx->orig_dst;
  1609. num_sg = qcrypto_count_sg(areq->dst, areq->nbytes);
  1610. bytes = qcrypto_sg_copy_from_buffer(areq->dst, num_sg,
  1611. rctx->data, areq->nbytes);
  1612. if (bytes != areq->nbytes)
  1613. pr_warn("bytes copied=0x%x bytes to copy= 0x%x", bytes,
  1614. areq->nbytes);
  1615. kzfree(rctx->data);
  1616. }
  1617. req_done(pqcrypto_req_control);
  1618. };
  1619. static void _qce_aead_complete(void *cookie, unsigned char *icv,
  1620. unsigned char *iv, int ret)
  1621. {
  1622. struct aead_request *areq = (struct aead_request *) cookie;
  1623. struct crypto_async_request *async_req;
  1624. struct crypto_aead *aead = crypto_aead_reqtfm(areq);
  1625. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(areq->base.tfm);
  1626. struct qcrypto_cipher_req_ctx *rctx;
  1627. struct crypto_stat *pstat;
  1628. struct crypto_engine *pengine;
  1629. struct qcrypto_req_control *pqcrypto_req_control;
  1630. async_req = &areq->base;
  1631. pstat = &_qcrypto_stat;
  1632. rctx = aead_request_ctx(areq);
  1633. pengine = rctx->pengine;
  1634. pqcrypto_req_control = find_req_control_for_areq(pengine,
  1635. async_req);
  1636. if (pqcrypto_req_control == NULL) {
  1637. pr_err("async request not found\n");
  1638. return;
  1639. }
  1640. if (rctx->mode == QCE_MODE_CCM) {
  1641. kzfree(rctx->adata);
  1642. } else {
  1643. uint32_t ivsize = crypto_aead_ivsize(aead);
  1644. if (ret == 0) {
  1645. if (rctx->dir == QCE_ENCRYPT) {
  1646. /* copy the icv to dst */
  1647. scatterwalk_map_and_copy(icv, areq->dst,
  1648. areq->cryptlen + areq->assoclen,
  1649. ctx->authsize, 1);
  1650. } else {
  1651. unsigned char tmp[SHA256_DIGESTSIZE] = {0};
  1652. /* compare icv from src */
  1653. scatterwalk_map_and_copy(tmp,
  1654. areq->src, areq->assoclen +
  1655. areq->cryptlen - ctx->authsize,
  1656. ctx->authsize, 0);
  1657. ret = memcmp(icv, tmp, ctx->authsize);
  1658. if (ret != 0)
  1659. ret = -EBADMSG;
  1660. }
  1661. } else {
  1662. ret = -ENXIO;
  1663. }
  1664. if (iv)
  1665. memcpy(ctx->iv, iv, ivsize);
  1666. }
  1667. if (ret == (-EBADMSG))
  1668. pstat->aead_bad_msg++;
  1669. else if (ret)
  1670. pstat->aead_op_fail++;
  1671. else
  1672. pstat->aead_op_success++;
  1673. pqcrypto_req_control->res = ret;
  1674. req_done(pqcrypto_req_control);
  1675. }
  1676. static int aead_ccm_set_msg_len(u8 *block, unsigned int msglen, int csize)
  1677. {
  1678. __be32 data;
  1679. memset(block, 0, csize);
  1680. block += csize;
  1681. if (csize >= 4)
  1682. csize = 4;
  1683. else if (msglen > (1 << (8 * csize)))
  1684. return -EOVERFLOW;
  1685. data = cpu_to_be32(msglen);
  1686. memcpy(block - csize, (u8 *)&data + 4 - csize, csize);
  1687. return 0;
  1688. }
  1689. static int qccrypto_set_aead_ccm_nonce(struct qce_req *qreq, uint32_t assoclen)
  1690. {
  1691. unsigned int i = ((unsigned int)qreq->iv[0]) + 1;
  1692. memcpy(&qreq->nonce[0], qreq->iv, qreq->ivsize);
  1693. /*
  1694. * Format control info per RFC 3610 and
  1695. * NIST Special Publication 800-38C
  1696. */
  1697. qreq->nonce[0] |= (8 * ((qreq->authsize - 2) / 2));
  1698. if (assoclen)
  1699. qreq->nonce[0] |= 64;
  1700. if (i > MAX_NONCE)
  1701. return -EINVAL;
  1702. return aead_ccm_set_msg_len(qreq->nonce + 16 - i, qreq->cryptlen, i);
  1703. }
  1704. static int qcrypto_aead_ccm_format_adata(struct qce_req *qreq, uint32_t alen,
  1705. struct scatterlist *sg, unsigned char *adata)
  1706. {
  1707. uint32_t len;
  1708. uint32_t bytes = 0;
  1709. uint32_t num_sg = 0;
  1710. /*
  1711. * Add control info for associated data
  1712. * RFC 3610 and NIST Special Publication 800-38C
  1713. */
  1714. if (alen < 65280) {
  1715. *(__be16 *)adata = cpu_to_be16(alen);
  1716. len = 2;
  1717. } else {
  1718. if ((alen >= 65280) && (alen <= 0xffffffff)) {
  1719. *(__be16 *)adata = cpu_to_be16(0xfffe);
  1720. *(__be32 *)&adata[2] = cpu_to_be32(alen);
  1721. len = 6;
  1722. } else {
  1723. *(__be16 *)adata = cpu_to_be16(0xffff);
  1724. *(__be32 *)&adata[6] = cpu_to_be32(alen);
  1725. len = 10;
  1726. }
  1727. }
  1728. adata += len;
  1729. qreq->assoclen = ALIGN((alen + len), 16);
  1730. num_sg = qcrypto_count_sg(sg, alen);
  1731. bytes = qcrypto_sg_copy_to_buffer(sg, num_sg, adata, alen);
  1732. if (bytes != alen)
  1733. pr_warn("bytes copied=0x%x bytes to copy= 0x%x", bytes, alen);
  1734. return 0;
  1735. }
  1736. static int _qcrypto_process_ablkcipher(struct crypto_engine *pengine,
  1737. struct qcrypto_req_control *pqcrypto_req_control)
  1738. {
  1739. struct crypto_async_request *async_req;
  1740. struct qce_req qreq;
  1741. int ret;
  1742. struct qcrypto_cipher_req_ctx *rctx;
  1743. struct qcrypto_cipher_ctx *cipher_ctx;
  1744. struct ablkcipher_request *req;
  1745. struct crypto_ablkcipher *tfm;
  1746. async_req = pqcrypto_req_control->req;
  1747. req = container_of(async_req, struct ablkcipher_request, base);
  1748. cipher_ctx = crypto_tfm_ctx(async_req->tfm);
  1749. rctx = ablkcipher_request_ctx(req);
  1750. rctx->pengine = pengine;
  1751. tfm = crypto_ablkcipher_reqtfm(req);
  1752. if (pengine->pcp->ce_support.aligned_only) {
  1753. uint32_t bytes = 0;
  1754. uint32_t num_sg = 0;
  1755. rctx->orig_src = req->src;
  1756. rctx->orig_dst = req->dst;
  1757. rctx->data = kzalloc((req->nbytes + 64), GFP_ATOMIC);
  1758. if (rctx->data == NULL)
  1759. return -ENOMEM;
  1760. num_sg = qcrypto_count_sg(req->src, req->nbytes);
  1761. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, rctx->data,
  1762. req->nbytes);
  1763. if (bytes != req->nbytes)
  1764. pr_warn("bytes copied=0x%x bytes to copy= 0x%x", bytes,
  1765. req->nbytes);
  1766. sg_set_buf(&rctx->dsg, rctx->data, req->nbytes);
  1767. sg_mark_end(&rctx->dsg);
  1768. rctx->iv = req->info;
  1769. req->src = &rctx->dsg;
  1770. req->dst = &rctx->dsg;
  1771. }
  1772. qreq.op = QCE_REQ_ABLK_CIPHER;
  1773. qreq.qce_cb = _qce_ablk_cipher_complete;
  1774. qreq.areq = req;
  1775. qreq.alg = rctx->alg;
  1776. qreq.dir = rctx->dir;
  1777. qreq.mode = rctx->mode;
  1778. qreq.enckey = cipher_ctx->enc_key;
  1779. qreq.encklen = cipher_ctx->enc_key_len;
  1780. qreq.iv = req->info;
  1781. qreq.ivsize = crypto_ablkcipher_ivsize(tfm);
  1782. qreq.cryptlen = req->nbytes;
  1783. qreq.use_pmem = 0;
  1784. qreq.flags = cipher_ctx->flags;
  1785. if ((cipher_ctx->enc_key_len == 0) &&
  1786. (pengine->pcp->platform_support.hw_key_support == 0))
  1787. ret = -EINVAL;
  1788. else
  1789. ret = qce_ablk_cipher_req(pengine->qce, &qreq);
  1790. return ret;
  1791. }
  1792. static int _qcrypto_process_ahash(struct crypto_engine *pengine,
  1793. struct qcrypto_req_control *pqcrypto_req_control)
  1794. {
  1795. struct crypto_async_request *async_req;
  1796. struct ahash_request *req;
  1797. struct qce_sha_req sreq;
  1798. struct qcrypto_sha_req_ctx *rctx;
  1799. struct qcrypto_sha_ctx *sha_ctx;
  1800. int ret = 0;
  1801. async_req = pqcrypto_req_control->req;
  1802. req = container_of(async_req,
  1803. struct ahash_request, base);
  1804. rctx = ahash_request_ctx(req);
  1805. sha_ctx = crypto_tfm_ctx(async_req->tfm);
  1806. rctx->pengine = pengine;
  1807. sreq.qce_cb = _qce_ahash_complete;
  1808. sreq.digest = &rctx->digest[0];
  1809. sreq.src = req->src;
  1810. sreq.auth_data[0] = rctx->byte_count[0];
  1811. sreq.auth_data[1] = rctx->byte_count[1];
  1812. sreq.auth_data[2] = rctx->byte_count[2];
  1813. sreq.auth_data[3] = rctx->byte_count[3];
  1814. sreq.first_blk = rctx->first_blk;
  1815. sreq.last_blk = rctx->last_blk;
  1816. sreq.size = req->nbytes;
  1817. sreq.areq = req;
  1818. sreq.flags = sha_ctx->flags;
  1819. switch (sha_ctx->alg) {
  1820. case QCE_HASH_SHA1:
  1821. sreq.alg = QCE_HASH_SHA1;
  1822. sreq.authkey = NULL;
  1823. break;
  1824. case QCE_HASH_SHA256:
  1825. sreq.alg = QCE_HASH_SHA256;
  1826. sreq.authkey = NULL;
  1827. break;
  1828. case QCE_HASH_SHA1_HMAC:
  1829. sreq.alg = QCE_HASH_SHA1_HMAC;
  1830. sreq.authkey = &sha_ctx->authkey[0];
  1831. sreq.authklen = SHA_HMAC_KEY_SIZE;
  1832. break;
  1833. case QCE_HASH_SHA256_HMAC:
  1834. sreq.alg = QCE_HASH_SHA256_HMAC;
  1835. sreq.authkey = &sha_ctx->authkey[0];
  1836. sreq.authklen = SHA_HMAC_KEY_SIZE;
  1837. break;
  1838. default:
  1839. pr_err("Algorithm %d not supported, exiting", sha_ctx->alg);
  1840. ret = -1;
  1841. break;
  1842. };
  1843. ret = qce_process_sha_req(pengine->qce, &sreq);
  1844. return ret;
  1845. }
  1846. static int _qcrypto_process_aead(struct crypto_engine *pengine,
  1847. struct qcrypto_req_control *pqcrypto_req_control)
  1848. {
  1849. struct crypto_async_request *async_req;
  1850. struct qce_req qreq;
  1851. int ret = 0;
  1852. struct qcrypto_cipher_req_ctx *rctx;
  1853. struct qcrypto_cipher_ctx *cipher_ctx;
  1854. struct aead_request *req;
  1855. struct crypto_aead *aead;
  1856. async_req = pqcrypto_req_control->req;
  1857. req = container_of(async_req, struct aead_request, base);
  1858. aead = crypto_aead_reqtfm(req);
  1859. rctx = aead_request_ctx(req);
  1860. rctx->pengine = pengine;
  1861. cipher_ctx = crypto_tfm_ctx(async_req->tfm);
  1862. qreq.op = QCE_REQ_AEAD;
  1863. qreq.qce_cb = _qce_aead_complete;
  1864. qreq.areq = req;
  1865. qreq.alg = rctx->alg;
  1866. qreq.dir = rctx->dir;
  1867. qreq.mode = rctx->mode;
  1868. qreq.iv = rctx->iv;
  1869. qreq.enckey = cipher_ctx->enc_key;
  1870. qreq.encklen = cipher_ctx->enc_key_len;
  1871. qreq.authkey = cipher_ctx->auth_key;
  1872. qreq.authklen = cipher_ctx->auth_key_len;
  1873. qreq.authsize = crypto_aead_authsize(aead);
  1874. qreq.auth_alg = cipher_ctx->auth_alg;
  1875. if (qreq.mode == QCE_MODE_CCM)
  1876. qreq.ivsize = AES_BLOCK_SIZE;
  1877. else
  1878. qreq.ivsize = crypto_aead_ivsize(aead);
  1879. qreq.flags = cipher_ctx->flags;
  1880. if (qreq.mode == QCE_MODE_CCM) {
  1881. uint32_t assoclen;
  1882. if (qreq.dir == QCE_ENCRYPT)
  1883. qreq.cryptlen = req->cryptlen;
  1884. else
  1885. qreq.cryptlen = req->cryptlen -
  1886. qreq.authsize;
  1887. /* if rfc4309 ccm, adjust assoclen */
  1888. assoclen = req->assoclen;
  1889. if (rctx->ccmtype)
  1890. assoclen -= 8;
  1891. /* Get NONCE */
  1892. ret = qccrypto_set_aead_ccm_nonce(&qreq, assoclen);
  1893. if (ret)
  1894. return ret;
  1895. if (assoclen) {
  1896. rctx->adata = kzalloc((assoclen + 0x64),
  1897. GFP_ATOMIC);
  1898. if (!rctx->adata)
  1899. return -ENOMEM;
  1900. /* Format Associated data */
  1901. ret = qcrypto_aead_ccm_format_adata(&qreq,
  1902. assoclen,
  1903. req->src,
  1904. rctx->adata);
  1905. } else {
  1906. qreq.assoclen = 0;
  1907. rctx->adata = NULL;
  1908. }
  1909. if (ret) {
  1910. kzfree(rctx->adata);
  1911. return ret;
  1912. }
  1913. /*
  1914. * update req with new formatted associated
  1915. * data info
  1916. */
  1917. qreq.asg = &rctx->asg;
  1918. if (rctx->adata)
  1919. sg_set_buf(qreq.asg, rctx->adata,
  1920. qreq.assoclen);
  1921. sg_mark_end(qreq.asg);
  1922. }
  1923. ret = qce_aead_req(pengine->qce, &qreq);
  1924. return ret;
  1925. }
  1926. static struct crypto_engine *_qcrypto_static_assign_engine(
  1927. struct crypto_priv *cp)
  1928. {
  1929. struct crypto_engine *pengine;
  1930. unsigned long flags;
  1931. spin_lock_irqsave(&cp->lock, flags);
  1932. if (cp->next_engine)
  1933. pengine = cp->next_engine;
  1934. else
  1935. pengine = list_first_entry(&cp->engine_list,
  1936. struct crypto_engine, elist);
  1937. if (list_is_last(&pengine->elist, &cp->engine_list))
  1938. cp->next_engine = list_first_entry(
  1939. &cp->engine_list, struct crypto_engine, elist);
  1940. else
  1941. cp->next_engine = list_next_entry(pengine, elist);
  1942. spin_unlock_irqrestore(&cp->lock, flags);
  1943. return pengine;
  1944. }
  1945. static int _start_qcrypto_process(struct crypto_priv *cp,
  1946. struct crypto_engine *pengine)
  1947. {
  1948. struct crypto_async_request *async_req = NULL;
  1949. struct crypto_async_request *backlog_eng = NULL;
  1950. struct crypto_async_request *backlog_cp = NULL;
  1951. unsigned long flags;
  1952. u32 type;
  1953. int ret = 0;
  1954. struct crypto_stat *pstat;
  1955. void *tfm_ctx;
  1956. struct qcrypto_cipher_req_ctx *cipher_rctx;
  1957. struct qcrypto_sha_req_ctx *ahash_rctx;
  1958. struct ablkcipher_request *ablkcipher_req;
  1959. struct ahash_request *ahash_req;
  1960. struct aead_request *aead_req;
  1961. struct qcrypto_resp_ctx *arsp;
  1962. struct qcrypto_req_control *pqcrypto_req_control;
  1963. unsigned int cpu = MAX_SMP_CPU;
  1964. if (READ_ONCE(cp->ce_req_proc_sts) == STOPPED)
  1965. return 0;
  1966. if (in_interrupt()) {
  1967. cpu = smp_processor_id();
  1968. if (cpu >= MAX_SMP_CPU)
  1969. cpu = MAX_SMP_CPU - 1;
  1970. } else
  1971. cpu = MAX_SMP_CPU;
  1972. pstat = &_qcrypto_stat;
  1973. again:
  1974. spin_lock_irqsave(&cp->lock, flags);
  1975. if (pengine->issue_req ||
  1976. atomic_read(&pengine->req_count) >= (pengine->max_req)) {
  1977. spin_unlock_irqrestore(&cp->lock, flags);
  1978. return 0;
  1979. }
  1980. backlog_eng = crypto_get_backlog(&pengine->req_queue);
  1981. /* make sure it is in high bandwidth state */
  1982. if (pengine->bw_state != BUS_HAS_BANDWIDTH) {
  1983. spin_unlock_irqrestore(&cp->lock, flags);
  1984. return 0;
  1985. }
  1986. /* try to get request from request queue of the engine first */
  1987. async_req = crypto_dequeue_request(&pengine->req_queue);
  1988. if (!async_req) {
  1989. /*
  1990. * if no request from the engine,
  1991. * try to get from request queue of driver
  1992. */
  1993. backlog_cp = crypto_get_backlog(&cp->req_queue);
  1994. async_req = crypto_dequeue_request(&cp->req_queue);
  1995. if (!async_req) {
  1996. spin_unlock_irqrestore(&cp->lock, flags);
  1997. return 0;
  1998. }
  1999. }
  2000. pqcrypto_req_control = qcrypto_alloc_req_control(pengine);
  2001. if (pqcrypto_req_control == NULL) {
  2002. pr_err("Allocation of request failed\n");
  2003. spin_unlock_irqrestore(&cp->lock, flags);
  2004. return 0;
  2005. }
  2006. /* add associated rsp entry to tfm response queue */
  2007. type = crypto_tfm_alg_type(async_req->tfm);
  2008. tfm_ctx = crypto_tfm_ctx(async_req->tfm);
  2009. switch (type) {
  2010. case CRYPTO_ALG_TYPE_AHASH:
  2011. ahash_req = container_of(async_req,
  2012. struct ahash_request, base);
  2013. ahash_rctx = ahash_request_ctx(ahash_req);
  2014. arsp = &ahash_rctx->rsp_entry;
  2015. list_add_tail(
  2016. &arsp->list,
  2017. &((struct qcrypto_sha_ctx *)tfm_ctx)
  2018. ->rsp_queue);
  2019. break;
  2020. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  2021. ablkcipher_req = container_of(async_req,
  2022. struct ablkcipher_request, base);
  2023. cipher_rctx = ablkcipher_request_ctx(ablkcipher_req);
  2024. arsp = &cipher_rctx->rsp_entry;
  2025. list_add_tail(
  2026. &arsp->list,
  2027. &((struct qcrypto_cipher_ctx *)tfm_ctx)
  2028. ->rsp_queue);
  2029. break;
  2030. case CRYPTO_ALG_TYPE_AEAD:
  2031. default:
  2032. aead_req = container_of(async_req,
  2033. struct aead_request, base);
  2034. cipher_rctx = aead_request_ctx(aead_req);
  2035. arsp = &cipher_rctx->rsp_entry;
  2036. list_add_tail(
  2037. &arsp->list,
  2038. &((struct qcrypto_cipher_ctx *)tfm_ctx)
  2039. ->rsp_queue);
  2040. break;
  2041. }
  2042. arsp->res = -EINPROGRESS;
  2043. arsp->async_req = async_req;
  2044. pqcrypto_req_control->pce = pengine;
  2045. pqcrypto_req_control->req = async_req;
  2046. pqcrypto_req_control->arsp = arsp;
  2047. pengine->active_seq++;
  2048. pengine->check_flag = true;
  2049. pengine->issue_req = true;
  2050. cp->cpu_req[cpu]++;
  2051. smp_mb(); /* make it visible */
  2052. spin_unlock_irqrestore(&cp->lock, flags);
  2053. if (backlog_eng)
  2054. backlog_eng->complete(backlog_eng, -EINPROGRESS);
  2055. if (backlog_cp)
  2056. backlog_cp->complete(backlog_cp, -EINPROGRESS);
  2057. switch (type) {
  2058. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  2059. ret = _qcrypto_process_ablkcipher(pengine,
  2060. pqcrypto_req_control);
  2061. break;
  2062. case CRYPTO_ALG_TYPE_AHASH:
  2063. ret = _qcrypto_process_ahash(pengine, pqcrypto_req_control);
  2064. break;
  2065. case CRYPTO_ALG_TYPE_AEAD:
  2066. ret = _qcrypto_process_aead(pengine, pqcrypto_req_control);
  2067. break;
  2068. default:
  2069. ret = -EINVAL;
  2070. };
  2071. pengine->issue_req = false;
  2072. smp_mb(); /* make it visible */
  2073. pengine->total_req++;
  2074. if (ret) {
  2075. pengine->err_req++;
  2076. qcrypto_free_req_control(pengine, pqcrypto_req_control);
  2077. if (type == CRYPTO_ALG_TYPE_ABLKCIPHER)
  2078. pstat->ablk_cipher_op_fail++;
  2079. else
  2080. if (type == CRYPTO_ALG_TYPE_AHASH)
  2081. pstat->ahash_op_fail++;
  2082. else
  2083. pstat->aead_op_fail++;
  2084. _qcrypto_tfm_complete(pengine, type, tfm_ctx, arsp, ret);
  2085. goto again;
  2086. };
  2087. return ret;
  2088. }
  2089. static inline struct crypto_engine *_next_eng(struct crypto_priv *cp,
  2090. struct crypto_engine *p)
  2091. {
  2092. if (p == NULL || list_is_last(&p->elist, &cp->engine_list))
  2093. p = list_first_entry(&cp->engine_list, struct crypto_engine,
  2094. elist);
  2095. else
  2096. p = list_entry(p->elist.next, struct crypto_engine, elist);
  2097. return p;
  2098. }
  2099. static struct crypto_engine *_avail_eng(struct crypto_priv *cp)
  2100. {
  2101. /* call this function with spinlock set */
  2102. struct crypto_engine *q = NULL;
  2103. struct crypto_engine *p = cp->scheduled_eng;
  2104. struct crypto_engine *q1;
  2105. int eng_cnt = cp->total_units;
  2106. if (unlikely(list_empty(&cp->engine_list))) {
  2107. pr_err("%s: no valid ce to schedule\n", __func__);
  2108. return NULL;
  2109. }
  2110. p = _next_eng(cp, p);
  2111. q1 = p;
  2112. while (eng_cnt-- > 0) {
  2113. if (!p->issue_req && atomic_read(&p->req_count) < p->max_req) {
  2114. q = p;
  2115. break;
  2116. }
  2117. p = _next_eng(cp, p);
  2118. if (q1 == p)
  2119. break;
  2120. }
  2121. cp->scheduled_eng = q;
  2122. return q;
  2123. }
  2124. static int _qcrypto_queue_req(struct crypto_priv *cp,
  2125. struct crypto_engine *pengine,
  2126. struct crypto_async_request *req)
  2127. {
  2128. int ret;
  2129. unsigned long flags;
  2130. spin_lock_irqsave(&cp->lock, flags);
  2131. if (pengine) {
  2132. ret = crypto_enqueue_request(&pengine->req_queue, req);
  2133. } else {
  2134. ret = crypto_enqueue_request(&cp->req_queue, req);
  2135. pengine = _avail_eng(cp);
  2136. if (cp->req_queue.qlen > cp->max_qlen)
  2137. cp->max_qlen = cp->req_queue.qlen;
  2138. }
  2139. if (pengine) {
  2140. switch (pengine->bw_state) {
  2141. case BUS_NO_BANDWIDTH:
  2142. if (pengine->high_bw_req == false) {
  2143. qcrypto_ce_bw_allocate_req(pengine);
  2144. pengine->high_bw_req = true;
  2145. }
  2146. pengine = NULL;
  2147. break;
  2148. case BUS_HAS_BANDWIDTH:
  2149. break;
  2150. case BUS_BANDWIDTH_RELEASING:
  2151. pengine->high_bw_req = true;
  2152. pengine = NULL;
  2153. break;
  2154. case BUS_BANDWIDTH_ALLOCATING:
  2155. pengine = NULL;
  2156. break;
  2157. case BUS_SUSPENDED:
  2158. case BUS_SUSPENDING:
  2159. default:
  2160. pengine = NULL;
  2161. break;
  2162. }
  2163. } else {
  2164. cp->no_avail++;
  2165. }
  2166. spin_unlock_irqrestore(&cp->lock, flags);
  2167. if (pengine && (READ_ONCE(cp->ce_req_proc_sts) == IN_PROGRESS))
  2168. _start_qcrypto_process(cp, pengine);
  2169. return ret;
  2170. }
  2171. static int _qcrypto_enc_aes_192_fallback(struct ablkcipher_request *req)
  2172. {
  2173. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2174. int err;
  2175. SKCIPHER_REQUEST_ON_STACK(subreq, ctx->cipher_aes192_fb);
  2176. skcipher_request_set_tfm(subreq, ctx->cipher_aes192_fb);
  2177. skcipher_request_set_callback(subreq, req->base.flags,
  2178. NULL, NULL);
  2179. skcipher_request_set_crypt(subreq, req->src, req->dst,
  2180. req->nbytes, req->info);
  2181. err = crypto_skcipher_encrypt(subreq);
  2182. skcipher_request_zero(subreq);
  2183. return err;
  2184. }
  2185. static int _qcrypto_dec_aes_192_fallback(struct ablkcipher_request *req)
  2186. {
  2187. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2188. int err;
  2189. SKCIPHER_REQUEST_ON_STACK(subreq, ctx->cipher_aes192_fb);
  2190. skcipher_request_set_tfm(subreq, ctx->cipher_aes192_fb);
  2191. skcipher_request_set_callback(subreq, req->base.flags,
  2192. NULL, NULL);
  2193. skcipher_request_set_crypt(subreq, req->src, req->dst,
  2194. req->nbytes, req->info);
  2195. err = crypto_skcipher_decrypt(subreq);
  2196. skcipher_request_zero(subreq);
  2197. return err;
  2198. }
  2199. static int _qcrypto_enc_aes_ecb(struct ablkcipher_request *req)
  2200. {
  2201. struct qcrypto_cipher_req_ctx *rctx;
  2202. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2203. struct crypto_priv *cp = ctx->cp;
  2204. struct crypto_stat *pstat;
  2205. pstat = &_qcrypto_stat;
  2206. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2207. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2208. #ifdef QCRYPTO_DEBUG
  2209. dev_info(&ctx->pengine->pdev->dev, "_qcrypto_enc_aes_ecb: %pK\n", req);
  2210. #endif
  2211. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2212. (!cp->ce_support.aes_key_192) &&
  2213. ctx->cipher_aes192_fb)
  2214. return _qcrypto_enc_aes_192_fallback(req);
  2215. rctx = ablkcipher_request_ctx(req);
  2216. rctx->aead = 0;
  2217. rctx->alg = CIPHER_ALG_AES;
  2218. rctx->dir = QCE_ENCRYPT;
  2219. rctx->mode = QCE_MODE_ECB;
  2220. pstat->ablk_cipher_aes_enc++;
  2221. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2222. };
  2223. static int _qcrypto_enc_aes_cbc(struct ablkcipher_request *req)
  2224. {
  2225. struct qcrypto_cipher_req_ctx *rctx;
  2226. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2227. struct crypto_priv *cp = ctx->cp;
  2228. struct crypto_stat *pstat;
  2229. pstat = &_qcrypto_stat;
  2230. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2231. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2232. #ifdef QCRYPTO_DEBUG
  2233. dev_info(&ctx->pengine->pdev->dev, "_qcrypto_enc_aes_cbc: %pK\n", req);
  2234. #endif
  2235. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2236. (!cp->ce_support.aes_key_192) &&
  2237. ctx->cipher_aes192_fb)
  2238. return _qcrypto_enc_aes_192_fallback(req);
  2239. rctx = ablkcipher_request_ctx(req);
  2240. rctx->aead = 0;
  2241. rctx->alg = CIPHER_ALG_AES;
  2242. rctx->dir = QCE_ENCRYPT;
  2243. rctx->mode = QCE_MODE_CBC;
  2244. pstat->ablk_cipher_aes_enc++;
  2245. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2246. };
  2247. static int _qcrypto_enc_aes_ctr(struct ablkcipher_request *req)
  2248. {
  2249. struct qcrypto_cipher_req_ctx *rctx;
  2250. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2251. struct crypto_priv *cp = ctx->cp;
  2252. struct crypto_stat *pstat;
  2253. pstat = &_qcrypto_stat;
  2254. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2255. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2256. #ifdef QCRYPTO_DEBUG
  2257. dev_info(&ctx->pengine->pdev->dev, "_qcrypto_enc_aes_ctr: %pK\n", req);
  2258. #endif
  2259. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2260. (!cp->ce_support.aes_key_192) &&
  2261. ctx->cipher_aes192_fb)
  2262. return _qcrypto_enc_aes_192_fallback(req);
  2263. rctx = ablkcipher_request_ctx(req);
  2264. rctx->aead = 0;
  2265. rctx->alg = CIPHER_ALG_AES;
  2266. rctx->dir = QCE_ENCRYPT;
  2267. rctx->mode = QCE_MODE_CTR;
  2268. pstat->ablk_cipher_aes_enc++;
  2269. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2270. };
  2271. static int _qcrypto_enc_aes_xts(struct ablkcipher_request *req)
  2272. {
  2273. struct qcrypto_cipher_req_ctx *rctx;
  2274. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2275. struct crypto_priv *cp = ctx->cp;
  2276. struct crypto_stat *pstat;
  2277. pstat = &_qcrypto_stat;
  2278. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2279. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2280. rctx = ablkcipher_request_ctx(req);
  2281. rctx->aead = 0;
  2282. rctx->alg = CIPHER_ALG_AES;
  2283. rctx->dir = QCE_ENCRYPT;
  2284. rctx->mode = QCE_MODE_XTS;
  2285. pstat->ablk_cipher_aes_enc++;
  2286. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2287. };
  2288. static int _qcrypto_aead_encrypt_aes_ccm(struct aead_request *req)
  2289. {
  2290. struct qcrypto_cipher_req_ctx *rctx;
  2291. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2292. struct crypto_priv *cp = ctx->cp;
  2293. struct crypto_stat *pstat;
  2294. if ((ctx->authsize > 16) || (ctx->authsize < 4) || (ctx->authsize & 1))
  2295. return -EINVAL;
  2296. if ((ctx->auth_key_len != AES_KEYSIZE_128) &&
  2297. (ctx->auth_key_len != AES_KEYSIZE_256))
  2298. return -EINVAL;
  2299. pstat = &_qcrypto_stat;
  2300. rctx = aead_request_ctx(req);
  2301. rctx->aead = 1;
  2302. rctx->alg = CIPHER_ALG_AES;
  2303. rctx->dir = QCE_ENCRYPT;
  2304. rctx->mode = QCE_MODE_CCM;
  2305. rctx->iv = req->iv;
  2306. rctx->ccmtype = 0;
  2307. pstat->aead_ccm_aes_enc++;
  2308. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2309. }
  2310. static int _qcrypto_aead_rfc4309_enc_aes_ccm(struct aead_request *req)
  2311. {
  2312. struct qcrypto_cipher_req_ctx *rctx;
  2313. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2314. struct crypto_priv *cp = ctx->cp;
  2315. struct crypto_stat *pstat;
  2316. pstat = &_qcrypto_stat;
  2317. if (req->assoclen != 16 && req->assoclen != 20)
  2318. return -EINVAL;
  2319. rctx = aead_request_ctx(req);
  2320. rctx->aead = 1;
  2321. rctx->alg = CIPHER_ALG_AES;
  2322. rctx->dir = QCE_ENCRYPT;
  2323. rctx->mode = QCE_MODE_CCM;
  2324. memset(rctx->rfc4309_iv, 0, sizeof(rctx->rfc4309_iv));
  2325. rctx->rfc4309_iv[0] = 3; /* L -1 */
  2326. memcpy(&rctx->rfc4309_iv[1], ctx->ccm4309_nonce, 3);
  2327. memcpy(&rctx->rfc4309_iv[4], req->iv, 8);
  2328. rctx->ccmtype = 1;
  2329. rctx->iv = rctx->rfc4309_iv;
  2330. pstat->aead_rfc4309_ccm_aes_enc++;
  2331. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2332. }
  2333. static int _qcrypto_enc_des_ecb(struct ablkcipher_request *req)
  2334. {
  2335. struct qcrypto_cipher_req_ctx *rctx;
  2336. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2337. struct crypto_priv *cp = ctx->cp;
  2338. struct crypto_stat *pstat;
  2339. pstat = &_qcrypto_stat;
  2340. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2341. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2342. rctx = ablkcipher_request_ctx(req);
  2343. rctx->aead = 0;
  2344. rctx->alg = CIPHER_ALG_DES;
  2345. rctx->dir = QCE_ENCRYPT;
  2346. rctx->mode = QCE_MODE_ECB;
  2347. pstat->ablk_cipher_des_enc++;
  2348. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2349. };
  2350. static int _qcrypto_enc_des_cbc(struct ablkcipher_request *req)
  2351. {
  2352. struct qcrypto_cipher_req_ctx *rctx;
  2353. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2354. struct crypto_priv *cp = ctx->cp;
  2355. struct crypto_stat *pstat;
  2356. pstat = &_qcrypto_stat;
  2357. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2358. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2359. rctx = ablkcipher_request_ctx(req);
  2360. rctx->aead = 0;
  2361. rctx->alg = CIPHER_ALG_DES;
  2362. rctx->dir = QCE_ENCRYPT;
  2363. rctx->mode = QCE_MODE_CBC;
  2364. pstat->ablk_cipher_des_enc++;
  2365. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2366. };
  2367. static int _qcrypto_enc_3des_ecb(struct ablkcipher_request *req)
  2368. {
  2369. struct qcrypto_cipher_req_ctx *rctx;
  2370. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2371. struct crypto_priv *cp = ctx->cp;
  2372. struct crypto_stat *pstat;
  2373. pstat = &_qcrypto_stat;
  2374. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2375. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2376. rctx = ablkcipher_request_ctx(req);
  2377. rctx->aead = 0;
  2378. rctx->alg = CIPHER_ALG_3DES;
  2379. rctx->dir = QCE_ENCRYPT;
  2380. rctx->mode = QCE_MODE_ECB;
  2381. pstat->ablk_cipher_3des_enc++;
  2382. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2383. };
  2384. static int _qcrypto_enc_3des_cbc(struct ablkcipher_request *req)
  2385. {
  2386. struct qcrypto_cipher_req_ctx *rctx;
  2387. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2388. struct crypto_priv *cp = ctx->cp;
  2389. struct crypto_stat *pstat;
  2390. pstat = &_qcrypto_stat;
  2391. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2392. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2393. rctx = ablkcipher_request_ctx(req);
  2394. rctx->aead = 0;
  2395. rctx->alg = CIPHER_ALG_3DES;
  2396. rctx->dir = QCE_ENCRYPT;
  2397. rctx->mode = QCE_MODE_CBC;
  2398. pstat->ablk_cipher_3des_enc++;
  2399. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2400. };
  2401. static int _qcrypto_dec_aes_ecb(struct ablkcipher_request *req)
  2402. {
  2403. struct qcrypto_cipher_req_ctx *rctx;
  2404. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2405. struct crypto_priv *cp = ctx->cp;
  2406. struct crypto_stat *pstat;
  2407. pstat = &_qcrypto_stat;
  2408. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2409. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2410. #ifdef QCRYPTO_DEBUG
  2411. dev_info(&ctx->pengine->pdev->dev, "_qcrypto_dec_aes_ecb: %pK\n", req);
  2412. #endif
  2413. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2414. (!cp->ce_support.aes_key_192) &&
  2415. ctx->cipher_aes192_fb)
  2416. return _qcrypto_dec_aes_192_fallback(req);
  2417. rctx = ablkcipher_request_ctx(req);
  2418. rctx->aead = 0;
  2419. rctx->alg = CIPHER_ALG_AES;
  2420. rctx->dir = QCE_DECRYPT;
  2421. rctx->mode = QCE_MODE_ECB;
  2422. pstat->ablk_cipher_aes_dec++;
  2423. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2424. };
  2425. static int _qcrypto_dec_aes_cbc(struct ablkcipher_request *req)
  2426. {
  2427. struct qcrypto_cipher_req_ctx *rctx;
  2428. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2429. struct crypto_priv *cp = ctx->cp;
  2430. struct crypto_stat *pstat;
  2431. pstat = &_qcrypto_stat;
  2432. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2433. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2434. #ifdef QCRYPTO_DEBUG
  2435. dev_info(&ctx->pengine->pdev->dev, "_qcrypto_dec_aes_cbc: %pK\n", req);
  2436. #endif
  2437. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2438. (!cp->ce_support.aes_key_192) &&
  2439. ctx->cipher_aes192_fb)
  2440. return _qcrypto_dec_aes_192_fallback(req);
  2441. rctx = ablkcipher_request_ctx(req);
  2442. rctx->aead = 0;
  2443. rctx->alg = CIPHER_ALG_AES;
  2444. rctx->dir = QCE_DECRYPT;
  2445. rctx->mode = QCE_MODE_CBC;
  2446. pstat->ablk_cipher_aes_dec++;
  2447. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2448. };
  2449. static int _qcrypto_dec_aes_ctr(struct ablkcipher_request *req)
  2450. {
  2451. struct qcrypto_cipher_req_ctx *rctx;
  2452. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2453. struct crypto_priv *cp = ctx->cp;
  2454. struct crypto_stat *pstat;
  2455. pstat = &_qcrypto_stat;
  2456. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2457. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2458. #ifdef QCRYPTO_DEBUG
  2459. dev_info(&ctx->pengine->pdev->dev, "_qcrypto_dec_aes_ctr: %pK\n", req);
  2460. #endif
  2461. if ((ctx->enc_key_len == AES_KEYSIZE_192) &&
  2462. (!cp->ce_support.aes_key_192) &&
  2463. ctx->cipher_aes192_fb)
  2464. return _qcrypto_dec_aes_192_fallback(req);
  2465. rctx = ablkcipher_request_ctx(req);
  2466. rctx->aead = 0;
  2467. rctx->alg = CIPHER_ALG_AES;
  2468. rctx->mode = QCE_MODE_CTR;
  2469. /* Note. There is no such thing as aes/counter mode, decrypt */
  2470. rctx->dir = QCE_ENCRYPT;
  2471. pstat->ablk_cipher_aes_dec++;
  2472. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2473. };
  2474. static int _qcrypto_dec_des_ecb(struct ablkcipher_request *req)
  2475. {
  2476. struct qcrypto_cipher_req_ctx *rctx;
  2477. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2478. struct crypto_priv *cp = ctx->cp;
  2479. struct crypto_stat *pstat;
  2480. pstat = &_qcrypto_stat;
  2481. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2482. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2483. rctx = ablkcipher_request_ctx(req);
  2484. rctx->aead = 0;
  2485. rctx->alg = CIPHER_ALG_DES;
  2486. rctx->dir = QCE_DECRYPT;
  2487. rctx->mode = QCE_MODE_ECB;
  2488. pstat->ablk_cipher_des_dec++;
  2489. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2490. };
  2491. static int _qcrypto_dec_des_cbc(struct ablkcipher_request *req)
  2492. {
  2493. struct qcrypto_cipher_req_ctx *rctx;
  2494. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2495. struct crypto_priv *cp = ctx->cp;
  2496. struct crypto_stat *pstat;
  2497. pstat = &_qcrypto_stat;
  2498. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2499. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2500. rctx = ablkcipher_request_ctx(req);
  2501. rctx->aead = 0;
  2502. rctx->alg = CIPHER_ALG_DES;
  2503. rctx->dir = QCE_DECRYPT;
  2504. rctx->mode = QCE_MODE_CBC;
  2505. pstat->ablk_cipher_des_dec++;
  2506. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2507. };
  2508. static int _qcrypto_dec_3des_ecb(struct ablkcipher_request *req)
  2509. {
  2510. struct qcrypto_cipher_req_ctx *rctx;
  2511. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2512. struct crypto_priv *cp = ctx->cp;
  2513. struct crypto_stat *pstat;
  2514. pstat = &_qcrypto_stat;
  2515. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2516. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2517. rctx = ablkcipher_request_ctx(req);
  2518. rctx->aead = 0;
  2519. rctx->alg = CIPHER_ALG_3DES;
  2520. rctx->dir = QCE_DECRYPT;
  2521. rctx->mode = QCE_MODE_ECB;
  2522. pstat->ablk_cipher_3des_dec++;
  2523. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2524. };
  2525. static int _qcrypto_dec_3des_cbc(struct ablkcipher_request *req)
  2526. {
  2527. struct qcrypto_cipher_req_ctx *rctx;
  2528. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2529. struct crypto_priv *cp = ctx->cp;
  2530. struct crypto_stat *pstat;
  2531. pstat = &_qcrypto_stat;
  2532. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2533. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2534. rctx = ablkcipher_request_ctx(req);
  2535. rctx->aead = 0;
  2536. rctx->alg = CIPHER_ALG_3DES;
  2537. rctx->dir = QCE_DECRYPT;
  2538. rctx->mode = QCE_MODE_CBC;
  2539. pstat->ablk_cipher_3des_dec++;
  2540. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2541. };
  2542. static int _qcrypto_dec_aes_xts(struct ablkcipher_request *req)
  2543. {
  2544. struct qcrypto_cipher_req_ctx *rctx;
  2545. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2546. struct crypto_priv *cp = ctx->cp;
  2547. struct crypto_stat *pstat;
  2548. pstat = &_qcrypto_stat;
  2549. WARN_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2550. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2551. rctx = ablkcipher_request_ctx(req);
  2552. rctx->aead = 0;
  2553. rctx->alg = CIPHER_ALG_AES;
  2554. rctx->mode = QCE_MODE_XTS;
  2555. rctx->dir = QCE_DECRYPT;
  2556. pstat->ablk_cipher_aes_dec++;
  2557. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2558. };
  2559. static int _qcrypto_aead_decrypt_aes_ccm(struct aead_request *req)
  2560. {
  2561. struct qcrypto_cipher_req_ctx *rctx;
  2562. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2563. struct crypto_priv *cp = ctx->cp;
  2564. struct crypto_stat *pstat;
  2565. if ((ctx->authsize > 16) || (ctx->authsize < 4) || (ctx->authsize & 1))
  2566. return -EINVAL;
  2567. if ((ctx->auth_key_len != AES_KEYSIZE_128) &&
  2568. (ctx->auth_key_len != AES_KEYSIZE_256))
  2569. return -EINVAL;
  2570. pstat = &_qcrypto_stat;
  2571. rctx = aead_request_ctx(req);
  2572. rctx->aead = 1;
  2573. rctx->alg = CIPHER_ALG_AES;
  2574. rctx->dir = QCE_DECRYPT;
  2575. rctx->mode = QCE_MODE_CCM;
  2576. rctx->iv = req->iv;
  2577. rctx->ccmtype = 0;
  2578. pstat->aead_ccm_aes_dec++;
  2579. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2580. }
  2581. static int _qcrypto_aead_rfc4309_dec_aes_ccm(struct aead_request *req)
  2582. {
  2583. struct qcrypto_cipher_req_ctx *rctx;
  2584. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2585. struct crypto_priv *cp = ctx->cp;
  2586. struct crypto_stat *pstat;
  2587. pstat = &_qcrypto_stat;
  2588. if (req->assoclen != 16 && req->assoclen != 20)
  2589. return -EINVAL;
  2590. rctx = aead_request_ctx(req);
  2591. rctx->aead = 1;
  2592. rctx->alg = CIPHER_ALG_AES;
  2593. rctx->dir = QCE_DECRYPT;
  2594. rctx->mode = QCE_MODE_CCM;
  2595. memset(rctx->rfc4309_iv, 0, sizeof(rctx->rfc4309_iv));
  2596. rctx->rfc4309_iv[0] = 3; /* L -1 */
  2597. memcpy(&rctx->rfc4309_iv[1], ctx->ccm4309_nonce, 3);
  2598. memcpy(&rctx->rfc4309_iv[4], req->iv, 8);
  2599. rctx->ccmtype = 1;
  2600. rctx->iv = rctx->rfc4309_iv;
  2601. pstat->aead_rfc4309_ccm_aes_dec++;
  2602. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2603. }
  2604. static int _qcrypto_aead_setauthsize(struct crypto_aead *authenc,
  2605. unsigned int authsize)
  2606. {
  2607. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2608. ctx->authsize = authsize;
  2609. return 0;
  2610. }
  2611. static int _qcrypto_aead_ccm_setauthsize(struct crypto_aead *authenc,
  2612. unsigned int authsize)
  2613. {
  2614. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2615. switch (authsize) {
  2616. case 4:
  2617. case 6:
  2618. case 8:
  2619. case 10:
  2620. case 12:
  2621. case 14:
  2622. case 16:
  2623. break;
  2624. default:
  2625. return -EINVAL;
  2626. }
  2627. ctx->authsize = authsize;
  2628. return 0;
  2629. }
  2630. static int _qcrypto_aead_rfc4309_ccm_setauthsize(struct crypto_aead *authenc,
  2631. unsigned int authsize)
  2632. {
  2633. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2634. switch (authsize) {
  2635. case 8:
  2636. case 12:
  2637. case 16:
  2638. break;
  2639. default:
  2640. return -EINVAL;
  2641. }
  2642. ctx->authsize = authsize;
  2643. return 0;
  2644. }
  2645. static int _qcrypto_aead_setkey(struct crypto_aead *tfm, const u8 *key,
  2646. unsigned int keylen)
  2647. {
  2648. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  2649. struct rtattr *rta = (struct rtattr *)key;
  2650. struct crypto_authenc_key_param *param;
  2651. int ret;
  2652. if (!RTA_OK(rta, keylen))
  2653. goto badkey;
  2654. if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
  2655. goto badkey;
  2656. if (RTA_PAYLOAD(rta) < sizeof(*param))
  2657. goto badkey;
  2658. param = RTA_DATA(rta);
  2659. ctx->enc_key_len = be32_to_cpu(param->enckeylen);
  2660. key += RTA_ALIGN(rta->rta_len);
  2661. keylen -= RTA_ALIGN(rta->rta_len);
  2662. if (keylen < ctx->enc_key_len)
  2663. goto badkey;
  2664. ctx->auth_key_len = keylen - ctx->enc_key_len;
  2665. if (ctx->enc_key_len >= QCRYPTO_MAX_KEY_SIZE ||
  2666. ctx->auth_key_len >= QCRYPTO_MAX_KEY_SIZE)
  2667. goto badkey;
  2668. memset(ctx->auth_key, 0, QCRYPTO_MAX_KEY_SIZE);
  2669. memcpy(ctx->enc_key, key + ctx->auth_key_len, ctx->enc_key_len);
  2670. memcpy(ctx->auth_key, key, ctx->auth_key_len);
  2671. if (ctx->enc_key_len == AES_KEYSIZE_192 && ctx->cipher_aes192_fb &&
  2672. ctx->ahash_aead_aes192_fb) {
  2673. crypto_ahash_clear_flags(ctx->ahash_aead_aes192_fb, ~0);
  2674. ret = crypto_ahash_setkey(ctx->ahash_aead_aes192_fb,
  2675. ctx->auth_key, ctx->auth_key_len);
  2676. if (ret)
  2677. goto badkey;
  2678. crypto_skcipher_clear_flags(ctx->cipher_aes192_fb, ~0);
  2679. ret = crypto_skcipher_setkey(ctx->cipher_aes192_fb,
  2680. ctx->enc_key, ctx->enc_key_len);
  2681. if (ret)
  2682. goto badkey;
  2683. }
  2684. return 0;
  2685. badkey:
  2686. ctx->enc_key_len = 0;
  2687. crypto_aead_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2688. return -EINVAL;
  2689. }
  2690. static int _qcrypto_aead_ccm_setkey(struct crypto_aead *aead, const u8 *key,
  2691. unsigned int keylen)
  2692. {
  2693. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  2694. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  2695. struct crypto_priv *cp = ctx->cp;
  2696. switch (keylen) {
  2697. case AES_KEYSIZE_128:
  2698. case AES_KEYSIZE_256:
  2699. break;
  2700. case AES_KEYSIZE_192:
  2701. if (cp->ce_support.aes_key_192)
  2702. break;
  2703. default:
  2704. ctx->enc_key_len = 0;
  2705. crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2706. return -EINVAL;
  2707. };
  2708. ctx->enc_key_len = keylen;
  2709. memcpy(ctx->enc_key, key, keylen);
  2710. ctx->auth_key_len = keylen;
  2711. memcpy(ctx->auth_key, key, keylen);
  2712. return 0;
  2713. }
  2714. static int _qcrypto_aead_rfc4309_ccm_setkey(struct crypto_aead *aead,
  2715. const u8 *key, unsigned int key_len)
  2716. {
  2717. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  2718. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  2719. int ret;
  2720. if (key_len < QCRYPTO_CCM4309_NONCE_LEN)
  2721. return -EINVAL;
  2722. key_len -= QCRYPTO_CCM4309_NONCE_LEN;
  2723. memcpy(ctx->ccm4309_nonce, key + key_len, QCRYPTO_CCM4309_NONCE_LEN);
  2724. ret = _qcrypto_aead_ccm_setkey(aead, key, key_len);
  2725. return ret;
  2726. };
  2727. static void _qcrypto_aead_aes_192_fb_a_cb(struct qcrypto_cipher_req_ctx *rctx,
  2728. int res)
  2729. {
  2730. struct aead_request *req;
  2731. struct crypto_async_request *areq;
  2732. req = rctx->aead_req;
  2733. areq = &req->base;
  2734. if (rctx->fb_aes_req)
  2735. skcipher_request_free(rctx->fb_aes_req);
  2736. if (rctx->fb_hash_req)
  2737. ahash_request_free(rctx->fb_hash_req);
  2738. rctx->fb_aes_req = NULL;
  2739. rctx->fb_hash_req = NULL;
  2740. kfree(rctx->fb_aes_iv);
  2741. areq->complete(areq, res);
  2742. }
  2743. static void _aead_aes_fb_stage2_ahash_complete(
  2744. struct crypto_async_request *base, int err)
  2745. {
  2746. struct qcrypto_cipher_req_ctx *rctx;
  2747. struct aead_request *req;
  2748. struct qcrypto_cipher_ctx *ctx;
  2749. rctx = base->data;
  2750. req = rctx->aead_req;
  2751. ctx = crypto_tfm_ctx(req->base.tfm);
  2752. /* copy icv */
  2753. if (err == 0)
  2754. scatterwalk_map_and_copy(rctx->fb_ahash_digest,
  2755. rctx->fb_aes_dst,
  2756. req->cryptlen,
  2757. ctx->authsize, 1);
  2758. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2759. }
  2760. static int _start_aead_aes_fb_stage2_hmac(struct qcrypto_cipher_req_ctx *rctx)
  2761. {
  2762. struct ahash_request *ahash_req;
  2763. ahash_req = rctx->fb_hash_req;
  2764. ahash_request_set_callback(ahash_req, CRYPTO_TFM_REQ_MAY_BACKLOG,
  2765. _aead_aes_fb_stage2_ahash_complete, rctx);
  2766. return crypto_ahash_digest(ahash_req);
  2767. }
  2768. static void _aead_aes_fb_stage2_decrypt_complete(
  2769. struct crypto_async_request *base, int err)
  2770. {
  2771. struct qcrypto_cipher_req_ctx *rctx;
  2772. rctx = base->data;
  2773. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2774. }
  2775. static int _start_aead_aes_fb_stage2_decrypt(
  2776. struct qcrypto_cipher_req_ctx *rctx)
  2777. {
  2778. struct skcipher_request *aes_req;
  2779. aes_req = rctx->fb_aes_req;
  2780. skcipher_request_set_callback(aes_req, CRYPTO_TFM_REQ_MAY_BACKLOG,
  2781. _aead_aes_fb_stage2_decrypt_complete, rctx);
  2782. return crypto_skcipher_decrypt(aes_req);
  2783. }
  2784. static void _aead_aes_fb_stage1_ahash_complete(
  2785. struct crypto_async_request *base, int err)
  2786. {
  2787. struct qcrypto_cipher_req_ctx *rctx;
  2788. struct aead_request *req;
  2789. struct qcrypto_cipher_ctx *ctx;
  2790. rctx = base->data;
  2791. req = rctx->aead_req;
  2792. ctx = crypto_tfm_ctx(req->base.tfm);
  2793. /* compare icv */
  2794. if (err == 0) {
  2795. unsigned char tmp[ctx->authsize];
  2796. scatterwalk_map_and_copy(tmp, rctx->fb_aes_src,
  2797. req->cryptlen - ctx->authsize, ctx->authsize, 0);
  2798. if (memcmp(rctx->fb_ahash_digest, tmp, ctx->authsize) != 0)
  2799. err = -EBADMSG;
  2800. }
  2801. if (err)
  2802. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2803. else {
  2804. err = _start_aead_aes_fb_stage2_decrypt(rctx);
  2805. if (err != -EINPROGRESS && err != -EBUSY)
  2806. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2807. }
  2808. }
  2809. static void _aead_aes_fb_stage1_encrypt_complete(
  2810. struct crypto_async_request *base, int err)
  2811. {
  2812. struct qcrypto_cipher_req_ctx *rctx;
  2813. struct aead_request *req;
  2814. struct qcrypto_cipher_ctx *ctx;
  2815. rctx = base->data;
  2816. req = rctx->aead_req;
  2817. ctx = crypto_tfm_ctx(req->base.tfm);
  2818. memcpy(ctx->iv, rctx->fb_aes_iv, rctx->ivsize);
  2819. if (err) {
  2820. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2821. return;
  2822. }
  2823. err = _start_aead_aes_fb_stage2_hmac(rctx);
  2824. /* copy icv */
  2825. if (err == 0) {
  2826. scatterwalk_map_and_copy(rctx->fb_ahash_digest,
  2827. rctx->fb_aes_dst,
  2828. req->cryptlen,
  2829. ctx->authsize, 1);
  2830. }
  2831. if (err != -EINPROGRESS && err != -EBUSY)
  2832. _qcrypto_aead_aes_192_fb_a_cb(rctx, err);
  2833. }
  2834. static int _qcrypto_aead_aes_192_fallback(struct aead_request *req,
  2835. bool is_encrypt)
  2836. {
  2837. int rc = -EINVAL;
  2838. struct qcrypto_cipher_req_ctx *rctx = aead_request_ctx(req);
  2839. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2840. struct crypto_aead *aead_tfm = crypto_aead_reqtfm(req);
  2841. struct skcipher_request *aes_req = NULL;
  2842. struct ahash_request *ahash_req = NULL;
  2843. int nbytes;
  2844. struct scatterlist *src, *dst;
  2845. rctx->fb_aes_iv = NULL;
  2846. aes_req = skcipher_request_alloc(ctx->cipher_aes192_fb, GFP_KERNEL);
  2847. if (!aes_req)
  2848. return -ENOMEM;
  2849. ahash_req = ahash_request_alloc(ctx->ahash_aead_aes192_fb, GFP_KERNEL);
  2850. if (!ahash_req)
  2851. goto ret;
  2852. rctx->fb_aes_req = aes_req;
  2853. rctx->fb_hash_req = ahash_req;
  2854. rctx->aead_req = req;
  2855. /* assoc and iv are sitting in the beginning of src sg list */
  2856. /* Similarly, assoc and iv are sitting in the beginning of dst list */
  2857. src = scatterwalk_ffwd(rctx->fb_ablkcipher_src_sg, req->src,
  2858. req->assoclen);
  2859. dst = scatterwalk_ffwd(rctx->fb_ablkcipher_dst_sg, req->dst,
  2860. req->assoclen);
  2861. nbytes = req->cryptlen;
  2862. if (!is_encrypt)
  2863. nbytes -= ctx->authsize;
  2864. rctx->fb_ahash_length = nbytes + req->assoclen;
  2865. rctx->fb_aes_src = src;
  2866. rctx->fb_aes_dst = dst;
  2867. rctx->fb_aes_cryptlen = nbytes;
  2868. rctx->ivsize = crypto_aead_ivsize(aead_tfm);
  2869. rctx->fb_aes_iv = kzalloc(rctx->ivsize, GFP_ATOMIC);
  2870. if (!rctx->fb_aes_iv)
  2871. goto ret;
  2872. memcpy(rctx->fb_aes_iv, req->iv, rctx->ivsize);
  2873. skcipher_request_set_crypt(aes_req, rctx->fb_aes_src,
  2874. rctx->fb_aes_dst,
  2875. rctx->fb_aes_cryptlen, rctx->fb_aes_iv);
  2876. if (is_encrypt)
  2877. ahash_request_set_crypt(ahash_req, req->dst,
  2878. rctx->fb_ahash_digest,
  2879. rctx->fb_ahash_length);
  2880. else
  2881. ahash_request_set_crypt(ahash_req, req->src,
  2882. rctx->fb_ahash_digest,
  2883. rctx->fb_ahash_length);
  2884. if (is_encrypt) {
  2885. skcipher_request_set_callback(aes_req,
  2886. CRYPTO_TFM_REQ_MAY_BACKLOG,
  2887. _aead_aes_fb_stage1_encrypt_complete, rctx);
  2888. rc = crypto_skcipher_encrypt(aes_req);
  2889. if (rc == 0) {
  2890. memcpy(ctx->iv, rctx->fb_aes_iv, rctx->ivsize);
  2891. rc = _start_aead_aes_fb_stage2_hmac(rctx);
  2892. if (rc == 0) {
  2893. /* copy icv */
  2894. scatterwalk_map_and_copy(rctx->fb_ahash_digest,
  2895. dst,
  2896. req->cryptlen,
  2897. ctx->authsize, 1);
  2898. }
  2899. }
  2900. if (rc == -EINPROGRESS || rc == -EBUSY)
  2901. return rc;
  2902. goto ret;
  2903. } else {
  2904. ahash_request_set_callback(ahash_req,
  2905. CRYPTO_TFM_REQ_MAY_BACKLOG,
  2906. _aead_aes_fb_stage1_ahash_complete, rctx);
  2907. rc = crypto_ahash_digest(ahash_req);
  2908. if (rc == 0) {
  2909. unsigned char tmp[ctx->authsize];
  2910. /* compare icv */
  2911. scatterwalk_map_and_copy(tmp,
  2912. src, req->cryptlen - ctx->authsize,
  2913. ctx->authsize, 0);
  2914. if (memcmp(rctx->fb_ahash_digest, tmp,
  2915. ctx->authsize) != 0)
  2916. rc = -EBADMSG;
  2917. else
  2918. rc = _start_aead_aes_fb_stage2_decrypt(rctx);
  2919. }
  2920. if (rc == -EINPROGRESS || rc == -EBUSY)
  2921. return rc;
  2922. goto ret;
  2923. }
  2924. ret:
  2925. if (aes_req)
  2926. skcipher_request_free(aes_req);
  2927. if (ahash_req)
  2928. ahash_request_free(ahash_req);
  2929. kfree(rctx->fb_aes_iv);
  2930. return rc;
  2931. }
  2932. static int _qcrypto_aead_encrypt_aes_cbc(struct aead_request *req)
  2933. {
  2934. struct qcrypto_cipher_req_ctx *rctx;
  2935. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2936. struct crypto_priv *cp = ctx->cp;
  2937. struct crypto_stat *pstat;
  2938. pstat = &_qcrypto_stat;
  2939. #ifdef QCRYPTO_DEBUG
  2940. dev_info(&ctx->pengine->pdev->dev,
  2941. "_qcrypto_aead_encrypt_aes_cbc: %pK\n", req);
  2942. #endif
  2943. rctx = aead_request_ctx(req);
  2944. rctx->aead = 1;
  2945. rctx->alg = CIPHER_ALG_AES;
  2946. rctx->dir = QCE_ENCRYPT;
  2947. rctx->mode = QCE_MODE_CBC;
  2948. rctx->iv = req->iv;
  2949. rctx->aead_req = req;
  2950. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  2951. pstat->aead_sha1_aes_enc++;
  2952. else
  2953. pstat->aead_sha256_aes_enc++;
  2954. if (ctx->enc_key_len == AES_KEYSIZE_192 && ctx->cipher_aes192_fb &&
  2955. ctx->ahash_aead_aes192_fb)
  2956. return _qcrypto_aead_aes_192_fallback(req, true);
  2957. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2958. }
  2959. static int _qcrypto_aead_decrypt_aes_cbc(struct aead_request *req)
  2960. {
  2961. struct qcrypto_cipher_req_ctx *rctx;
  2962. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2963. struct crypto_priv *cp = ctx->cp;
  2964. struct crypto_stat *pstat;
  2965. pstat = &_qcrypto_stat;
  2966. #ifdef QCRYPTO_DEBUG
  2967. dev_info(&ctx->pengine->pdev->dev,
  2968. "_qcrypto_aead_decrypt_aes_cbc: %pK\n", req);
  2969. #endif
  2970. rctx = aead_request_ctx(req);
  2971. rctx->aead = 1;
  2972. rctx->alg = CIPHER_ALG_AES;
  2973. rctx->dir = QCE_DECRYPT;
  2974. rctx->mode = QCE_MODE_CBC;
  2975. rctx->iv = req->iv;
  2976. rctx->aead_req = req;
  2977. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  2978. pstat->aead_sha1_aes_dec++;
  2979. else
  2980. pstat->aead_sha256_aes_dec++;
  2981. if (ctx->enc_key_len == AES_KEYSIZE_192 && ctx->cipher_aes192_fb &&
  2982. ctx->ahash_aead_aes192_fb)
  2983. return _qcrypto_aead_aes_192_fallback(req, false);
  2984. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2985. }
  2986. static int _qcrypto_aead_encrypt_des_cbc(struct aead_request *req)
  2987. {
  2988. struct qcrypto_cipher_req_ctx *rctx;
  2989. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2990. struct crypto_priv *cp = ctx->cp;
  2991. struct crypto_stat *pstat;
  2992. pstat = &_qcrypto_stat;
  2993. rctx = aead_request_ctx(req);
  2994. rctx->aead = 1;
  2995. rctx->alg = CIPHER_ALG_DES;
  2996. rctx->dir = QCE_ENCRYPT;
  2997. rctx->mode = QCE_MODE_CBC;
  2998. rctx->iv = req->iv;
  2999. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3000. pstat->aead_sha1_des_enc++;
  3001. else
  3002. pstat->aead_sha256_des_enc++;
  3003. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3004. }
  3005. static int _qcrypto_aead_decrypt_des_cbc(struct aead_request *req)
  3006. {
  3007. struct qcrypto_cipher_req_ctx *rctx;
  3008. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3009. struct crypto_priv *cp = ctx->cp;
  3010. struct crypto_stat *pstat;
  3011. pstat = &_qcrypto_stat;
  3012. rctx = aead_request_ctx(req);
  3013. rctx->aead = 1;
  3014. rctx->alg = CIPHER_ALG_DES;
  3015. rctx->dir = QCE_DECRYPT;
  3016. rctx->mode = QCE_MODE_CBC;
  3017. rctx->iv = req->iv;
  3018. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3019. pstat->aead_sha1_des_dec++;
  3020. else
  3021. pstat->aead_sha256_des_dec++;
  3022. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3023. }
  3024. static int _qcrypto_aead_encrypt_3des_cbc(struct aead_request *req)
  3025. {
  3026. struct qcrypto_cipher_req_ctx *rctx;
  3027. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3028. struct crypto_priv *cp = ctx->cp;
  3029. struct crypto_stat *pstat;
  3030. pstat = &_qcrypto_stat;
  3031. rctx = aead_request_ctx(req);
  3032. rctx->aead = 1;
  3033. rctx->alg = CIPHER_ALG_3DES;
  3034. rctx->dir = QCE_ENCRYPT;
  3035. rctx->mode = QCE_MODE_CBC;
  3036. rctx->iv = req->iv;
  3037. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3038. pstat->aead_sha1_3des_enc++;
  3039. else
  3040. pstat->aead_sha256_3des_enc++;
  3041. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3042. }
  3043. static int _qcrypto_aead_decrypt_3des_cbc(struct aead_request *req)
  3044. {
  3045. struct qcrypto_cipher_req_ctx *rctx;
  3046. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3047. struct crypto_priv *cp = ctx->cp;
  3048. struct crypto_stat *pstat;
  3049. pstat = &_qcrypto_stat;
  3050. rctx = aead_request_ctx(req);
  3051. rctx->aead = 1;
  3052. rctx->alg = CIPHER_ALG_3DES;
  3053. rctx->dir = QCE_DECRYPT;
  3054. rctx->mode = QCE_MODE_CBC;
  3055. rctx->iv = req->iv;
  3056. if (ctx->auth_alg == QCE_HASH_SHA1_HMAC)
  3057. pstat->aead_sha1_3des_dec++;
  3058. else
  3059. pstat->aead_sha256_3des_dec++;
  3060. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  3061. }
  3062. static int _sha_init(struct ahash_request *req)
  3063. {
  3064. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3065. rctx->first_blk = 1;
  3066. rctx->last_blk = 0;
  3067. rctx->byte_count[0] = 0;
  3068. rctx->byte_count[1] = 0;
  3069. rctx->byte_count[2] = 0;
  3070. rctx->byte_count[3] = 0;
  3071. rctx->trailing_buf_len = 0;
  3072. rctx->count = 0;
  3073. return 0;
  3074. };
  3075. static int _sha1_init(struct ahash_request *req)
  3076. {
  3077. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3078. struct crypto_stat *pstat;
  3079. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3080. pstat = &_qcrypto_stat;
  3081. _sha_init(req);
  3082. sha_ctx->alg = QCE_HASH_SHA1;
  3083. memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
  3084. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3085. SHA1_DIGEST_SIZE);
  3086. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3087. pstat->sha1_digest++;
  3088. return 0;
  3089. };
  3090. static int _sha256_init(struct ahash_request *req)
  3091. {
  3092. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3093. struct crypto_stat *pstat;
  3094. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3095. pstat = &_qcrypto_stat;
  3096. _sha_init(req);
  3097. sha_ctx->alg = QCE_HASH_SHA256;
  3098. memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
  3099. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3100. SHA256_DIGEST_SIZE);
  3101. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3102. pstat->sha256_digest++;
  3103. return 0;
  3104. };
  3105. static int _sha1_export(struct ahash_request *req, void *out)
  3106. {
  3107. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3108. struct sha1_state *out_ctx = (struct sha1_state *)out;
  3109. out_ctx->count = rctx->count;
  3110. _byte_stream_to_words(out_ctx->state, rctx->digest, SHA1_DIGEST_SIZE);
  3111. memcpy(out_ctx->buffer, rctx->trailing_buf, SHA1_BLOCK_SIZE);
  3112. return 0;
  3113. };
  3114. static int _sha1_hmac_export(struct ahash_request *req, void *out)
  3115. {
  3116. return _sha1_export(req, out);
  3117. }
  3118. /* crypto hw padding constant for hmac first operation */
  3119. #define HMAC_PADDING 64
  3120. static int __sha1_import_common(struct ahash_request *req, const void *in,
  3121. bool hmac)
  3122. {
  3123. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3124. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3125. struct sha1_state *in_ctx = (struct sha1_state *)in;
  3126. u64 hw_count = in_ctx->count;
  3127. rctx->count = in_ctx->count;
  3128. memcpy(rctx->trailing_buf, in_ctx->buffer, SHA1_BLOCK_SIZE);
  3129. if (in_ctx->count <= SHA1_BLOCK_SIZE) {
  3130. rctx->first_blk = 1;
  3131. } else {
  3132. rctx->first_blk = 0;
  3133. /*
  3134. * For hmac, there is a hardware padding done
  3135. * when first is set. So the byte_count will be
  3136. * incremened by 64 after the operstion of first
  3137. */
  3138. if (hmac)
  3139. hw_count += HMAC_PADDING;
  3140. }
  3141. rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
  3142. rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
  3143. _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
  3144. rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
  3145. (SHA1_BLOCK_SIZE-1));
  3146. return 0;
  3147. }
  3148. static int _sha1_import(struct ahash_request *req, const void *in)
  3149. {
  3150. return __sha1_import_common(req, in, false);
  3151. }
  3152. static int _sha1_hmac_import(struct ahash_request *req, const void *in)
  3153. {
  3154. return __sha1_import_common(req, in, true);
  3155. }
  3156. static int _sha256_export(struct ahash_request *req, void *out)
  3157. {
  3158. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3159. struct sha256_state *out_ctx = (struct sha256_state *)out;
  3160. out_ctx->count = rctx->count;
  3161. _byte_stream_to_words(out_ctx->state, rctx->digest, SHA256_DIGEST_SIZE);
  3162. memcpy(out_ctx->buf, rctx->trailing_buf, SHA256_BLOCK_SIZE);
  3163. return 0;
  3164. };
  3165. static int _sha256_hmac_export(struct ahash_request *req, void *out)
  3166. {
  3167. return _sha256_export(req, out);
  3168. }
  3169. static int __sha256_import_common(struct ahash_request *req, const void *in,
  3170. bool hmac)
  3171. {
  3172. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3173. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3174. struct sha256_state *in_ctx = (struct sha256_state *)in;
  3175. u64 hw_count = in_ctx->count;
  3176. rctx->count = in_ctx->count;
  3177. memcpy(rctx->trailing_buf, in_ctx->buf, SHA256_BLOCK_SIZE);
  3178. if (in_ctx->count <= SHA256_BLOCK_SIZE) {
  3179. rctx->first_blk = 1;
  3180. } else {
  3181. rctx->first_blk = 0;
  3182. /*
  3183. * for hmac, there is a hardware padding done
  3184. * when first is set. So the byte_count will be
  3185. * incremened by 64 after the operstion of first
  3186. */
  3187. if (hmac)
  3188. hw_count += HMAC_PADDING;
  3189. }
  3190. rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
  3191. rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
  3192. _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
  3193. rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
  3194. (SHA256_BLOCK_SIZE-1));
  3195. return 0;
  3196. }
  3197. static int _sha256_import(struct ahash_request *req, const void *in)
  3198. {
  3199. return __sha256_import_common(req, in, false);
  3200. }
  3201. static int _sha256_hmac_import(struct ahash_request *req, const void *in)
  3202. {
  3203. return __sha256_import_common(req, in, true);
  3204. }
  3205. static int _copy_source(struct ahash_request *req)
  3206. {
  3207. struct qcrypto_sha_req_ctx *srctx = NULL;
  3208. uint32_t bytes = 0;
  3209. uint32_t num_sg = 0;
  3210. srctx = ahash_request_ctx(req);
  3211. srctx->orig_src = req->src;
  3212. srctx->data = kzalloc((req->nbytes + 64), GFP_ATOMIC);
  3213. if (srctx->data == NULL) {
  3214. pr_err("Mem Alloc fail rctx->data, err %ld for 0x%x\n",
  3215. PTR_ERR(srctx->data), (req->nbytes + 64));
  3216. return -ENOMEM;
  3217. }
  3218. num_sg = qcrypto_count_sg(req->src, req->nbytes);
  3219. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, srctx->data,
  3220. req->nbytes);
  3221. if (bytes != req->nbytes)
  3222. pr_warn("bytes copied=0x%x bytes to copy= 0x%x", bytes,
  3223. req->nbytes);
  3224. sg_set_buf(&srctx->dsg, srctx->data,
  3225. req->nbytes);
  3226. sg_mark_end(&srctx->dsg);
  3227. req->src = &srctx->dsg;
  3228. return 0;
  3229. }
  3230. static int _sha_update(struct ahash_request *req, uint32_t sha_block_size)
  3231. {
  3232. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3233. struct crypto_priv *cp = sha_ctx->cp;
  3234. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3235. uint32_t total, len, num_sg;
  3236. struct scatterlist *sg_last;
  3237. uint8_t *k_src = NULL;
  3238. uint32_t sha_pad_len = 0;
  3239. uint32_t trailing_buf_len = 0;
  3240. uint32_t nbytes;
  3241. uint32_t offset = 0;
  3242. uint32_t bytes = 0;
  3243. uint8_t *staging;
  3244. int ret = 0;
  3245. /* check for trailing buffer from previous updates and append it */
  3246. total = req->nbytes + rctx->trailing_buf_len;
  3247. len = req->nbytes;
  3248. if (total <= sha_block_size) {
  3249. k_src = &rctx->trailing_buf[rctx->trailing_buf_len];
  3250. num_sg = qcrypto_count_sg(req->src, len);
  3251. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, k_src, len);
  3252. rctx->trailing_buf_len = total;
  3253. return 0;
  3254. }
  3255. /* save the original req structure fields*/
  3256. rctx->src = req->src;
  3257. rctx->nbytes = req->nbytes;
  3258. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3259. L1_CACHE_BYTES);
  3260. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  3261. k_src = &rctx->trailing_buf[0];
  3262. /* get new trailing buffer */
  3263. sha_pad_len = ALIGN(total, sha_block_size) - total;
  3264. trailing_buf_len = sha_block_size - sha_pad_len;
  3265. offset = req->nbytes - trailing_buf_len;
  3266. if (offset != req->nbytes)
  3267. scatterwalk_map_and_copy(k_src, req->src, offset,
  3268. trailing_buf_len, 0);
  3269. nbytes = total - trailing_buf_len;
  3270. num_sg = qcrypto_count_sg(req->src, req->nbytes);
  3271. len = rctx->trailing_buf_len;
  3272. sg_last = req->src;
  3273. while (len < nbytes) {
  3274. if ((len + sg_last->length) > nbytes)
  3275. break;
  3276. len += sg_last->length;
  3277. sg_last = sg_next(sg_last);
  3278. }
  3279. if (rctx->trailing_buf_len) {
  3280. if (cp->ce_support.aligned_only) {
  3281. rctx->data2 = kzalloc((req->nbytes + 64), GFP_ATOMIC);
  3282. if (rctx->data2 == NULL) {
  3283. pr_err("Mem Alloc fail srctx->data2, err %ld\n",
  3284. PTR_ERR(rctx->data2));
  3285. return -ENOMEM;
  3286. }
  3287. memcpy(rctx->data2, staging,
  3288. rctx->trailing_buf_len);
  3289. memcpy((rctx->data2 + rctx->trailing_buf_len),
  3290. rctx->data, req->src->length);
  3291. kzfree(rctx->data);
  3292. rctx->data = rctx->data2;
  3293. sg_set_buf(&rctx->sg[0], rctx->data,
  3294. (rctx->trailing_buf_len +
  3295. req->src->length));
  3296. req->src = rctx->sg;
  3297. sg_mark_end(&rctx->sg[0]);
  3298. } else {
  3299. sg_mark_end(sg_last);
  3300. memset(rctx->sg, 0, sizeof(rctx->sg));
  3301. sg_set_buf(&rctx->sg[0], staging,
  3302. rctx->trailing_buf_len);
  3303. sg_mark_end(&rctx->sg[1]);
  3304. sg_chain(rctx->sg, 2, req->src);
  3305. req->src = rctx->sg;
  3306. }
  3307. } else
  3308. sg_mark_end(sg_last);
  3309. req->nbytes = nbytes;
  3310. rctx->trailing_buf_len = trailing_buf_len;
  3311. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3312. return ret;
  3313. };
  3314. static int _sha1_update(struct ahash_request *req)
  3315. {
  3316. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3317. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3318. struct crypto_priv *cp = sha_ctx->cp;
  3319. if (cp->ce_support.aligned_only) {
  3320. if (_copy_source(req))
  3321. return -ENOMEM;
  3322. }
  3323. rctx->count += req->nbytes;
  3324. return _sha_update(req, SHA1_BLOCK_SIZE);
  3325. }
  3326. static int _sha256_update(struct ahash_request *req)
  3327. {
  3328. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3329. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3330. struct crypto_priv *cp = sha_ctx->cp;
  3331. if (cp->ce_support.aligned_only) {
  3332. if (_copy_source(req))
  3333. return -ENOMEM;
  3334. }
  3335. rctx->count += req->nbytes;
  3336. return _sha_update(req, SHA256_BLOCK_SIZE);
  3337. }
  3338. static int _sha_final(struct ahash_request *req, uint32_t sha_block_size)
  3339. {
  3340. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3341. struct crypto_priv *cp = sha_ctx->cp;
  3342. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3343. int ret = 0;
  3344. uint8_t *staging;
  3345. if (cp->ce_support.aligned_only) {
  3346. if (_copy_source(req))
  3347. return -ENOMEM;
  3348. }
  3349. rctx->last_blk = 1;
  3350. /* save the original req structure fields*/
  3351. rctx->src = req->src;
  3352. rctx->nbytes = req->nbytes;
  3353. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3354. L1_CACHE_BYTES);
  3355. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  3356. sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
  3357. sg_mark_end(&rctx->sg[0]);
  3358. req->src = &rctx->sg[0];
  3359. req->nbytes = rctx->trailing_buf_len;
  3360. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3361. return ret;
  3362. };
  3363. static int _sha1_final(struct ahash_request *req)
  3364. {
  3365. return _sha_final(req, SHA1_BLOCK_SIZE);
  3366. }
  3367. static int _sha256_final(struct ahash_request *req)
  3368. {
  3369. return _sha_final(req, SHA256_BLOCK_SIZE);
  3370. }
  3371. static int _sha_digest(struct ahash_request *req)
  3372. {
  3373. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3374. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3375. struct crypto_priv *cp = sha_ctx->cp;
  3376. int ret = 0;
  3377. if (cp->ce_support.aligned_only) {
  3378. if (_copy_source(req))
  3379. return -ENOMEM;
  3380. }
  3381. /* save the original req structure fields*/
  3382. rctx->src = req->src;
  3383. rctx->nbytes = req->nbytes;
  3384. rctx->first_blk = 1;
  3385. rctx->last_blk = 1;
  3386. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3387. return ret;
  3388. }
  3389. static int _sha1_digest(struct ahash_request *req)
  3390. {
  3391. _sha1_init(req);
  3392. return _sha_digest(req);
  3393. }
  3394. static int _sha256_digest(struct ahash_request *req)
  3395. {
  3396. _sha256_init(req);
  3397. return _sha_digest(req);
  3398. }
  3399. static void _crypto_sha_hmac_ahash_req_complete(
  3400. struct crypto_async_request *req, int err)
  3401. {
  3402. struct completion *ahash_req_complete = req->data;
  3403. if (err == -EINPROGRESS)
  3404. return;
  3405. complete(ahash_req_complete);
  3406. }
  3407. static int _sha_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  3408. unsigned int len)
  3409. {
  3410. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  3411. uint8_t *in_buf;
  3412. int ret = 0;
  3413. struct scatterlist sg = {0};
  3414. struct ahash_request *ahash_req;
  3415. struct completion ahash_req_complete;
  3416. ahash_req = ahash_request_alloc(tfm, GFP_KERNEL);
  3417. if (ahash_req == NULL)
  3418. return -ENOMEM;
  3419. init_completion(&ahash_req_complete);
  3420. ahash_request_set_callback(ahash_req,
  3421. CRYPTO_TFM_REQ_MAY_BACKLOG,
  3422. _crypto_sha_hmac_ahash_req_complete,
  3423. &ahash_req_complete);
  3424. crypto_ahash_clear_flags(tfm, ~0);
  3425. in_buf = kzalloc(len + 64, GFP_KERNEL);
  3426. if (in_buf == NULL) {
  3427. ahash_request_free(ahash_req);
  3428. return -ENOMEM;
  3429. }
  3430. memcpy(in_buf, key, len);
  3431. sg_set_buf(&sg, in_buf, len);
  3432. sg_mark_end(&sg);
  3433. ahash_request_set_crypt(ahash_req, &sg,
  3434. &sha_ctx->authkey[0], len);
  3435. if (sha_ctx->alg == QCE_HASH_SHA1)
  3436. ret = _sha1_digest(ahash_req);
  3437. else
  3438. ret = _sha256_digest(ahash_req);
  3439. if (ret == -EINPROGRESS || ret == -EBUSY) {
  3440. ret =
  3441. wait_for_completion_interruptible(
  3442. &ahash_req_complete);
  3443. reinit_completion(&sha_ctx->ahash_req_complete);
  3444. }
  3445. kzfree(in_buf);
  3446. ahash_request_free(ahash_req);
  3447. return ret;
  3448. }
  3449. static int _sha1_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  3450. unsigned int len)
  3451. {
  3452. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  3453. int ret = 0;
  3454. memset(&sha_ctx->authkey[0], 0, SHA1_BLOCK_SIZE);
  3455. if (len <= SHA1_BLOCK_SIZE) {
  3456. memcpy(&sha_ctx->authkey[0], key, len);
  3457. sha_ctx->authkey_in_len = len;
  3458. } else {
  3459. sha_ctx->alg = QCE_HASH_SHA1;
  3460. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3461. ret = _sha_hmac_setkey(tfm, key, len);
  3462. if (ret)
  3463. pr_err("SHA1 hmac setkey failed\n");
  3464. sha_ctx->authkey_in_len = SHA1_BLOCK_SIZE;
  3465. }
  3466. return ret;
  3467. }
  3468. static int _sha256_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  3469. unsigned int len)
  3470. {
  3471. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  3472. int ret = 0;
  3473. memset(&sha_ctx->authkey[0], 0, SHA256_BLOCK_SIZE);
  3474. if (len <= SHA256_BLOCK_SIZE) {
  3475. memcpy(&sha_ctx->authkey[0], key, len);
  3476. sha_ctx->authkey_in_len = len;
  3477. } else {
  3478. sha_ctx->alg = QCE_HASH_SHA256;
  3479. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3480. ret = _sha_hmac_setkey(tfm, key, len);
  3481. if (ret)
  3482. pr_err("SHA256 hmac setkey failed\n");
  3483. sha_ctx->authkey_in_len = SHA256_BLOCK_SIZE;
  3484. }
  3485. return ret;
  3486. }
  3487. static int _sha_hmac_init_ihash(struct ahash_request *req,
  3488. uint32_t sha_block_size)
  3489. {
  3490. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3491. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3492. int i;
  3493. for (i = 0; i < sha_block_size; i++)
  3494. rctx->trailing_buf[i] = sha_ctx->authkey[i] ^ 0x36;
  3495. rctx->trailing_buf_len = sha_block_size;
  3496. return 0;
  3497. }
  3498. static int _sha1_hmac_init(struct ahash_request *req)
  3499. {
  3500. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3501. struct crypto_priv *cp = sha_ctx->cp;
  3502. struct crypto_stat *pstat;
  3503. int ret = 0;
  3504. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3505. pstat = &_qcrypto_stat;
  3506. pstat->sha1_hmac_digest++;
  3507. _sha_init(req);
  3508. memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
  3509. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3510. SHA1_DIGEST_SIZE);
  3511. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3512. if (cp->ce_support.sha_hmac)
  3513. sha_ctx->alg = QCE_HASH_SHA1_HMAC;
  3514. else {
  3515. sha_ctx->alg = QCE_HASH_SHA1;
  3516. ret = _sha_hmac_init_ihash(req, SHA1_BLOCK_SIZE);
  3517. }
  3518. return ret;
  3519. }
  3520. static int _sha256_hmac_init(struct ahash_request *req)
  3521. {
  3522. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3523. struct crypto_priv *cp = sha_ctx->cp;
  3524. struct crypto_stat *pstat;
  3525. int ret = 0;
  3526. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3527. pstat = &_qcrypto_stat;
  3528. pstat->sha256_hmac_digest++;
  3529. _sha_init(req);
  3530. memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
  3531. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3532. SHA256_DIGEST_SIZE);
  3533. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3534. if (cp->ce_support.sha_hmac)
  3535. sha_ctx->alg = QCE_HASH_SHA256_HMAC;
  3536. else {
  3537. sha_ctx->alg = QCE_HASH_SHA256;
  3538. ret = _sha_hmac_init_ihash(req, SHA256_BLOCK_SIZE);
  3539. }
  3540. return ret;
  3541. }
  3542. static int _sha1_hmac_update(struct ahash_request *req)
  3543. {
  3544. return _sha1_update(req);
  3545. }
  3546. static int _sha256_hmac_update(struct ahash_request *req)
  3547. {
  3548. return _sha256_update(req);
  3549. }
  3550. static int _sha_hmac_outer_hash(struct ahash_request *req,
  3551. uint32_t sha_digest_size, uint32_t sha_block_size)
  3552. {
  3553. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3554. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3555. struct crypto_priv *cp = sha_ctx->cp;
  3556. int i;
  3557. uint8_t *staging;
  3558. uint8_t *p;
  3559. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3560. L1_CACHE_BYTES);
  3561. p = staging;
  3562. for (i = 0; i < sha_block_size; i++)
  3563. *p++ = sha_ctx->authkey[i] ^ 0x5c;
  3564. memcpy(p, &rctx->digest[0], sha_digest_size);
  3565. sg_set_buf(&rctx->sg[0], staging, sha_block_size +
  3566. sha_digest_size);
  3567. sg_mark_end(&rctx->sg[0]);
  3568. /* save the original req structure fields*/
  3569. rctx->src = req->src;
  3570. rctx->nbytes = req->nbytes;
  3571. req->src = &rctx->sg[0];
  3572. req->nbytes = sha_block_size + sha_digest_size;
  3573. _sha_init(req);
  3574. if (sha_ctx->alg == QCE_HASH_SHA1) {
  3575. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3576. SHA1_DIGEST_SIZE);
  3577. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3578. } else {
  3579. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3580. SHA256_DIGEST_SIZE);
  3581. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3582. }
  3583. rctx->last_blk = 1;
  3584. return _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3585. }
  3586. static int _sha_hmac_inner_hash(struct ahash_request *req,
  3587. uint32_t sha_digest_size, uint32_t sha_block_size)
  3588. {
  3589. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3590. struct ahash_request *areq = sha_ctx->ahash_req;
  3591. struct crypto_priv *cp = sha_ctx->cp;
  3592. int ret = 0;
  3593. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3594. uint8_t *staging;
  3595. staging = (uint8_t *)ALIGN(((uintptr_t)rctx->staging_dmabuf),
  3596. L1_CACHE_BYTES);
  3597. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  3598. sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
  3599. sg_mark_end(&rctx->sg[0]);
  3600. ahash_request_set_crypt(areq, &rctx->sg[0], &rctx->digest[0],
  3601. rctx->trailing_buf_len);
  3602. rctx->last_blk = 1;
  3603. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &areq->base);
  3604. if (ret == -EINPROGRESS || ret == -EBUSY) {
  3605. ret =
  3606. wait_for_completion_interruptible(&sha_ctx->ahash_req_complete);
  3607. reinit_completion(&sha_ctx->ahash_req_complete);
  3608. }
  3609. return ret;
  3610. }
  3611. static int _sha1_hmac_final(struct ahash_request *req)
  3612. {
  3613. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3614. struct crypto_priv *cp = sha_ctx->cp;
  3615. int ret = 0;
  3616. if (cp->ce_support.sha_hmac)
  3617. return _sha_final(req, SHA1_BLOCK_SIZE);
  3618. ret = _sha_hmac_inner_hash(req, SHA1_DIGEST_SIZE, SHA1_BLOCK_SIZE);
  3619. if (ret)
  3620. return ret;
  3621. return _sha_hmac_outer_hash(req, SHA1_DIGEST_SIZE, SHA1_BLOCK_SIZE);
  3622. }
  3623. static int _sha256_hmac_final(struct ahash_request *req)
  3624. {
  3625. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3626. struct crypto_priv *cp = sha_ctx->cp;
  3627. int ret = 0;
  3628. if (cp->ce_support.sha_hmac)
  3629. return _sha_final(req, SHA256_BLOCK_SIZE);
  3630. ret = _sha_hmac_inner_hash(req, SHA256_DIGEST_SIZE, SHA256_BLOCK_SIZE);
  3631. if (ret)
  3632. return ret;
  3633. return _sha_hmac_outer_hash(req, SHA256_DIGEST_SIZE, SHA256_BLOCK_SIZE);
  3634. }
  3635. static int _sha1_hmac_digest(struct ahash_request *req)
  3636. {
  3637. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3638. struct crypto_stat *pstat;
  3639. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3640. pstat = &_qcrypto_stat;
  3641. pstat->sha1_hmac_digest++;
  3642. _sha_init(req);
  3643. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3644. SHA1_DIGEST_SIZE);
  3645. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3646. sha_ctx->alg = QCE_HASH_SHA1_HMAC;
  3647. return _sha_digest(req);
  3648. }
  3649. static int _sha256_hmac_digest(struct ahash_request *req)
  3650. {
  3651. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3652. struct crypto_stat *pstat;
  3653. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3654. pstat = &_qcrypto_stat;
  3655. pstat->sha256_hmac_digest++;
  3656. _sha_init(req);
  3657. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3658. SHA256_DIGEST_SIZE);
  3659. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3660. sha_ctx->alg = QCE_HASH_SHA256_HMAC;
  3661. return _sha_digest(req);
  3662. }
  3663. static int _qcrypto_prefix_alg_cra_name(char cra_name[], unsigned int size)
  3664. {
  3665. char new_cra_name[CRYPTO_MAX_ALG_NAME] = "qcom-";
  3666. if (size >= CRYPTO_MAX_ALG_NAME - strlen("qcom-"))
  3667. return -EINVAL;
  3668. strlcat(new_cra_name, cra_name, CRYPTO_MAX_ALG_NAME);
  3669. strlcpy(cra_name, new_cra_name, CRYPTO_MAX_ALG_NAME);
  3670. return 0;
  3671. }
  3672. int qcrypto_cipher_set_device(struct ablkcipher_request *req, unsigned int dev)
  3673. {
  3674. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3675. struct crypto_priv *cp = ctx->cp;
  3676. struct crypto_engine *pengine = NULL;
  3677. pengine = _qrypto_find_pengine_device(cp, dev);
  3678. if (pengine == NULL)
  3679. return -ENODEV;
  3680. ctx->pengine = pengine;
  3681. return 0;
  3682. };
  3683. EXPORT_SYMBOL(qcrypto_cipher_set_device);
  3684. int qcrypto_cipher_set_device_hw(struct skcipher_request *req, u32 dev,
  3685. u32 hw_inst)
  3686. {
  3687. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3688. struct crypto_priv *cp = ctx->cp;
  3689. struct crypto_engine *pengine = NULL;
  3690. pengine = _qrypto_find_pengine_device_hw(cp, dev, hw_inst);
  3691. if (pengine == NULL)
  3692. return -ENODEV;
  3693. ctx->pengine = pengine;
  3694. return 0;
  3695. }
  3696. EXPORT_SYMBOL(qcrypto_cipher_set_device_hw);
  3697. int qcrypto_aead_set_device(struct aead_request *req, unsigned int dev)
  3698. {
  3699. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3700. struct crypto_priv *cp = ctx->cp;
  3701. struct crypto_engine *pengine = NULL;
  3702. pengine = _qrypto_find_pengine_device(cp, dev);
  3703. if (pengine == NULL)
  3704. return -ENODEV;
  3705. ctx->pengine = pengine;
  3706. return 0;
  3707. };
  3708. EXPORT_SYMBOL(qcrypto_aead_set_device);
  3709. int qcrypto_ahash_set_device(struct ahash_request *req, unsigned int dev)
  3710. {
  3711. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3712. struct crypto_priv *cp = ctx->cp;
  3713. struct crypto_engine *pengine = NULL;
  3714. pengine = _qrypto_find_pengine_device(cp, dev);
  3715. if (pengine == NULL)
  3716. return -ENODEV;
  3717. ctx->pengine = pengine;
  3718. return 0;
  3719. };
  3720. EXPORT_SYMBOL(qcrypto_ahash_set_device);
  3721. int qcrypto_cipher_set_flag(struct skcipher_request *req, unsigned int flags)
  3722. {
  3723. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3724. struct crypto_priv *cp = ctx->cp;
  3725. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3726. (cp->platform_support.hw_key_support == false)) {
  3727. pr_err("%s HW key usage not supported\n", __func__);
  3728. return -EINVAL;
  3729. }
  3730. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3731. QCRYPTO_CTX_KEY_MASK) {
  3732. pr_err("%s Cannot set all key flags\n", __func__);
  3733. return -EINVAL;
  3734. }
  3735. ctx->flags |= flags;
  3736. return 0;
  3737. };
  3738. EXPORT_SYMBOL(qcrypto_cipher_set_flag);
  3739. int qcrypto_aead_set_flag(struct aead_request *req, unsigned int flags)
  3740. {
  3741. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3742. struct crypto_priv *cp = ctx->cp;
  3743. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3744. (cp->platform_support.hw_key_support == false)) {
  3745. pr_err("%s HW key usage not supported\n", __func__);
  3746. return -EINVAL;
  3747. }
  3748. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3749. QCRYPTO_CTX_KEY_MASK) {
  3750. pr_err("%s Cannot set all key flags\n", __func__);
  3751. return -EINVAL;
  3752. }
  3753. ctx->flags |= flags;
  3754. return 0;
  3755. };
  3756. EXPORT_SYMBOL(qcrypto_aead_set_flag);
  3757. int qcrypto_ahash_set_flag(struct ahash_request *req, unsigned int flags)
  3758. {
  3759. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3760. struct crypto_priv *cp = ctx->cp;
  3761. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3762. (cp->platform_support.hw_key_support == false)) {
  3763. pr_err("%s HW key usage not supported\n", __func__);
  3764. return -EINVAL;
  3765. }
  3766. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3767. QCRYPTO_CTX_KEY_MASK) {
  3768. pr_err("%s Cannot set all key flags\n", __func__);
  3769. return -EINVAL;
  3770. }
  3771. ctx->flags |= flags;
  3772. return 0;
  3773. };
  3774. EXPORT_SYMBOL(qcrypto_ahash_set_flag);
  3775. int qcrypto_cipher_clear_flag(struct ablkcipher_request *req,
  3776. unsigned int flags)
  3777. {
  3778. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3779. ctx->flags &= ~flags;
  3780. return 0;
  3781. };
  3782. EXPORT_SYMBOL(qcrypto_cipher_clear_flag);
  3783. int qcrypto_aead_clear_flag(struct aead_request *req, unsigned int flags)
  3784. {
  3785. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3786. ctx->flags &= ~flags;
  3787. return 0;
  3788. };
  3789. EXPORT_SYMBOL(qcrypto_aead_clear_flag);
  3790. int qcrypto_ahash_clear_flag(struct ahash_request *req, unsigned int flags)
  3791. {
  3792. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3793. ctx->flags &= ~flags;
  3794. return 0;
  3795. };
  3796. EXPORT_SYMBOL(qcrypto_ahash_clear_flag);
  3797. static struct ahash_alg _qcrypto_ahash_algos[] = {
  3798. {
  3799. .init = _sha1_init,
  3800. .update = _sha1_update,
  3801. .final = _sha1_final,
  3802. .export = _sha1_export,
  3803. .import = _sha1_import,
  3804. .digest = _sha1_digest,
  3805. .halg = {
  3806. .digestsize = SHA1_DIGEST_SIZE,
  3807. .statesize = sizeof(struct sha1_state),
  3808. .base = {
  3809. .cra_name = "sha1",
  3810. .cra_driver_name = "qcrypto-sha1",
  3811. .cra_priority = 300,
  3812. .cra_flags = CRYPTO_ALG_TYPE_AHASH |
  3813. CRYPTO_ALG_ASYNC,
  3814. .cra_blocksize = SHA1_BLOCK_SIZE,
  3815. .cra_ctxsize =
  3816. sizeof(struct qcrypto_sha_ctx),
  3817. .cra_alignmask = 0,
  3818. .cra_type = &crypto_ahash_type,
  3819. .cra_module = THIS_MODULE,
  3820. .cra_init = _qcrypto_ahash_cra_init,
  3821. .cra_exit = _qcrypto_ahash_cra_exit,
  3822. },
  3823. },
  3824. },
  3825. {
  3826. .init = _sha256_init,
  3827. .update = _sha256_update,
  3828. .final = _sha256_final,
  3829. .export = _sha256_export,
  3830. .import = _sha256_import,
  3831. .digest = _sha256_digest,
  3832. .halg = {
  3833. .digestsize = SHA256_DIGEST_SIZE,
  3834. .statesize = sizeof(struct sha256_state),
  3835. .base = {
  3836. .cra_name = "sha256",
  3837. .cra_driver_name = "qcrypto-sha256",
  3838. .cra_priority = 300,
  3839. .cra_flags = CRYPTO_ALG_TYPE_AHASH |
  3840. CRYPTO_ALG_ASYNC,
  3841. .cra_blocksize = SHA256_BLOCK_SIZE,
  3842. .cra_ctxsize =
  3843. sizeof(struct qcrypto_sha_ctx),
  3844. .cra_alignmask = 0,
  3845. .cra_type = &crypto_ahash_type,
  3846. .cra_module = THIS_MODULE,
  3847. .cra_init = _qcrypto_ahash_cra_init,
  3848. .cra_exit = _qcrypto_ahash_cra_exit,
  3849. },
  3850. },
  3851. },
  3852. };
  3853. static struct ahash_alg _qcrypto_sha_hmac_algos[] = {
  3854. {
  3855. .init = _sha1_hmac_init,
  3856. .update = _sha1_hmac_update,
  3857. .final = _sha1_hmac_final,
  3858. .export = _sha1_hmac_export,
  3859. .import = _sha1_hmac_import,
  3860. .digest = _sha1_hmac_digest,
  3861. .setkey = _sha1_hmac_setkey,
  3862. .halg = {
  3863. .digestsize = SHA1_DIGEST_SIZE,
  3864. .statesize = sizeof(struct sha1_state),
  3865. .base = {
  3866. .cra_name = "hmac(sha1)",
  3867. .cra_driver_name = "qcrypto-hmac-sha1",
  3868. .cra_priority = 300,
  3869. .cra_flags = CRYPTO_ALG_TYPE_AHASH |
  3870. CRYPTO_ALG_ASYNC,
  3871. .cra_blocksize = SHA1_BLOCK_SIZE,
  3872. .cra_ctxsize =
  3873. sizeof(struct qcrypto_sha_ctx),
  3874. .cra_alignmask = 0,
  3875. .cra_type = &crypto_ahash_type,
  3876. .cra_module = THIS_MODULE,
  3877. .cra_init = _qcrypto_ahash_hmac_cra_init,
  3878. .cra_exit = _qcrypto_ahash_cra_exit,
  3879. },
  3880. },
  3881. },
  3882. {
  3883. .init = _sha256_hmac_init,
  3884. .update = _sha256_hmac_update,
  3885. .final = _sha256_hmac_final,
  3886. .export = _sha256_hmac_export,
  3887. .import = _sha256_hmac_import,
  3888. .digest = _sha256_hmac_digest,
  3889. .setkey = _sha256_hmac_setkey,
  3890. .halg = {
  3891. .digestsize = SHA256_DIGEST_SIZE,
  3892. .statesize = sizeof(struct sha256_state),
  3893. .base = {
  3894. .cra_name = "hmac(sha256)",
  3895. .cra_driver_name = "qcrypto-hmac-sha256",
  3896. .cra_priority = 300,
  3897. .cra_flags = CRYPTO_ALG_TYPE_AHASH |
  3898. CRYPTO_ALG_ASYNC,
  3899. .cra_blocksize = SHA256_BLOCK_SIZE,
  3900. .cra_ctxsize =
  3901. sizeof(struct qcrypto_sha_ctx),
  3902. .cra_alignmask = 0,
  3903. .cra_type = &crypto_ahash_type,
  3904. .cra_module = THIS_MODULE,
  3905. .cra_init = _qcrypto_ahash_hmac_cra_init,
  3906. .cra_exit = _qcrypto_ahash_cra_exit,
  3907. },
  3908. },
  3909. },
  3910. };
  3911. static struct crypto_alg _qcrypto_ablk_cipher_algos[] = {
  3912. {
  3913. .cra_name = "ecb(aes)",
  3914. .cra_driver_name = "qcrypto-ecb-aes",
  3915. .cra_priority = 300,
  3916. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
  3917. CRYPTO_ALG_NEED_FALLBACK |
  3918. CRYPTO_ALG_ASYNC,
  3919. .cra_blocksize = AES_BLOCK_SIZE,
  3920. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3921. .cra_alignmask = 0,
  3922. .cra_type = &crypto_ablkcipher_type,
  3923. .cra_module = THIS_MODULE,
  3924. .cra_init = _qcrypto_cra_aes_ablkcipher_init,
  3925. .cra_exit = _qcrypto_cra_aes_ablkcipher_exit,
  3926. .cra_u = {
  3927. .ablkcipher = {
  3928. .min_keysize = AES_MIN_KEY_SIZE,
  3929. .max_keysize = AES_MAX_KEY_SIZE,
  3930. .setkey = _qcrypto_setkey_aes,
  3931. .encrypt = _qcrypto_enc_aes_ecb,
  3932. .decrypt = _qcrypto_dec_aes_ecb,
  3933. },
  3934. },
  3935. },
  3936. {
  3937. .cra_name = "cbc(aes)",
  3938. .cra_driver_name = "qcrypto-cbc-aes",
  3939. .cra_priority = 300,
  3940. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
  3941. CRYPTO_ALG_NEED_FALLBACK |
  3942. CRYPTO_ALG_ASYNC,
  3943. .cra_blocksize = AES_BLOCK_SIZE,
  3944. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3945. .cra_alignmask = 0,
  3946. .cra_type = &crypto_ablkcipher_type,
  3947. .cra_module = THIS_MODULE,
  3948. .cra_init = _qcrypto_cra_aes_ablkcipher_init,
  3949. .cra_exit = _qcrypto_cra_aes_ablkcipher_exit,
  3950. .cra_u = {
  3951. .ablkcipher = {
  3952. .ivsize = AES_BLOCK_SIZE,
  3953. .min_keysize = AES_MIN_KEY_SIZE,
  3954. .max_keysize = AES_MAX_KEY_SIZE,
  3955. .setkey = _qcrypto_setkey_aes,
  3956. .encrypt = _qcrypto_enc_aes_cbc,
  3957. .decrypt = _qcrypto_dec_aes_cbc,
  3958. },
  3959. },
  3960. },
  3961. {
  3962. .cra_name = "ctr(aes)",
  3963. .cra_driver_name = "qcrypto-ctr-aes",
  3964. .cra_priority = 300,
  3965. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
  3966. CRYPTO_ALG_NEED_FALLBACK |
  3967. CRYPTO_ALG_ASYNC,
  3968. .cra_blocksize = AES_BLOCK_SIZE,
  3969. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3970. .cra_alignmask = 0,
  3971. .cra_type = &crypto_ablkcipher_type,
  3972. .cra_module = THIS_MODULE,
  3973. .cra_init = _qcrypto_cra_aes_ablkcipher_init,
  3974. .cra_exit = _qcrypto_cra_aes_ablkcipher_exit,
  3975. .cra_u = {
  3976. .ablkcipher = {
  3977. .ivsize = AES_BLOCK_SIZE,
  3978. .min_keysize = AES_MIN_KEY_SIZE,
  3979. .max_keysize = AES_MAX_KEY_SIZE,
  3980. .setkey = _qcrypto_setkey_aes,
  3981. .encrypt = _qcrypto_enc_aes_ctr,
  3982. .decrypt = _qcrypto_dec_aes_ctr,
  3983. },
  3984. },
  3985. },
  3986. {
  3987. .cra_name = "ecb(des)",
  3988. .cra_driver_name = "qcrypto-ecb-des",
  3989. .cra_priority = 300,
  3990. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  3991. .cra_blocksize = DES_BLOCK_SIZE,
  3992. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3993. .cra_alignmask = 0,
  3994. .cra_type = &crypto_ablkcipher_type,
  3995. .cra_module = THIS_MODULE,
  3996. .cra_init = _qcrypto_cra_ablkcipher_init,
  3997. .cra_exit = _qcrypto_cra_ablkcipher_exit,
  3998. .cra_u = {
  3999. .ablkcipher = {
  4000. .min_keysize = DES_KEY_SIZE,
  4001. .max_keysize = DES_KEY_SIZE,
  4002. .setkey = _qcrypto_setkey_des,
  4003. .encrypt = _qcrypto_enc_des_ecb,
  4004. .decrypt = _qcrypto_dec_des_ecb,
  4005. },
  4006. },
  4007. },
  4008. {
  4009. .cra_name = "cbc(des)",
  4010. .cra_driver_name = "qcrypto-cbc-des",
  4011. .cra_priority = 300,
  4012. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  4013. .cra_blocksize = DES_BLOCK_SIZE,
  4014. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4015. .cra_alignmask = 0,
  4016. .cra_type = &crypto_ablkcipher_type,
  4017. .cra_module = THIS_MODULE,
  4018. .cra_init = _qcrypto_cra_ablkcipher_init,
  4019. .cra_exit = _qcrypto_cra_ablkcipher_exit,
  4020. .cra_u = {
  4021. .ablkcipher = {
  4022. .ivsize = DES_BLOCK_SIZE,
  4023. .min_keysize = DES_KEY_SIZE,
  4024. .max_keysize = DES_KEY_SIZE,
  4025. .setkey = _qcrypto_setkey_des,
  4026. .encrypt = _qcrypto_enc_des_cbc,
  4027. .decrypt = _qcrypto_dec_des_cbc,
  4028. },
  4029. },
  4030. },
  4031. {
  4032. .cra_name = "ecb(des3_ede)",
  4033. .cra_driver_name = "qcrypto-ecb-3des",
  4034. .cra_priority = 300,
  4035. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  4036. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4037. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4038. .cra_alignmask = 0,
  4039. .cra_type = &crypto_ablkcipher_type,
  4040. .cra_module = THIS_MODULE,
  4041. .cra_init = _qcrypto_cra_ablkcipher_init,
  4042. .cra_exit = _qcrypto_cra_ablkcipher_exit,
  4043. .cra_u = {
  4044. .ablkcipher = {
  4045. .min_keysize = DES3_EDE_KEY_SIZE,
  4046. .max_keysize = DES3_EDE_KEY_SIZE,
  4047. .setkey = _qcrypto_setkey_3des,
  4048. .encrypt = _qcrypto_enc_3des_ecb,
  4049. .decrypt = _qcrypto_dec_3des_ecb,
  4050. },
  4051. },
  4052. },
  4053. {
  4054. .cra_name = "cbc(des3_ede)",
  4055. .cra_driver_name = "qcrypto-cbc-3des",
  4056. .cra_priority = 300,
  4057. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  4058. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4059. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4060. .cra_alignmask = 0,
  4061. .cra_type = &crypto_ablkcipher_type,
  4062. .cra_module = THIS_MODULE,
  4063. .cra_init = _qcrypto_cra_ablkcipher_init,
  4064. .cra_exit = _qcrypto_cra_ablkcipher_exit,
  4065. .cra_u = {
  4066. .ablkcipher = {
  4067. .ivsize = DES3_EDE_BLOCK_SIZE,
  4068. .min_keysize = DES3_EDE_KEY_SIZE,
  4069. .max_keysize = DES3_EDE_KEY_SIZE,
  4070. .setkey = _qcrypto_setkey_3des,
  4071. .encrypt = _qcrypto_enc_3des_cbc,
  4072. .decrypt = _qcrypto_dec_3des_cbc,
  4073. },
  4074. },
  4075. },
  4076. };
  4077. static struct crypto_alg _qcrypto_ablk_cipher_xts_algo = {
  4078. .cra_name = "xts(aes)",
  4079. .cra_driver_name = "qcrypto-xts-aes",
  4080. .cra_priority = 300,
  4081. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  4082. .cra_blocksize = AES_BLOCK_SIZE,
  4083. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4084. .cra_alignmask = 0,
  4085. .cra_type = &crypto_ablkcipher_type,
  4086. .cra_module = THIS_MODULE,
  4087. .cra_init = _qcrypto_cra_ablkcipher_init,
  4088. .cra_exit = _qcrypto_cra_ablkcipher_exit,
  4089. .cra_u = {
  4090. .ablkcipher = {
  4091. .ivsize = AES_BLOCK_SIZE,
  4092. .min_keysize = AES_MIN_KEY_SIZE,
  4093. .max_keysize = AES_MAX_KEY_SIZE,
  4094. .setkey = _qcrypto_setkey_aes_xts,
  4095. .encrypt = _qcrypto_enc_aes_xts,
  4096. .decrypt = _qcrypto_dec_aes_xts,
  4097. },
  4098. },
  4099. };
  4100. static struct aead_alg _qcrypto_aead_sha1_hmac_algos[] = {
  4101. {
  4102. .base = {
  4103. .cra_name = "authenc(hmac(sha1),cbc(aes))",
  4104. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-aes",
  4105. .cra_priority = 300,
  4106. .cra_flags = CRYPTO_ALG_ASYNC,
  4107. .cra_blocksize = AES_BLOCK_SIZE,
  4108. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4109. .cra_alignmask = 0,
  4110. .cra_module = THIS_MODULE,
  4111. },
  4112. .ivsize = AES_BLOCK_SIZE,
  4113. .maxauthsize = SHA1_DIGEST_SIZE,
  4114. .setkey = _qcrypto_aead_setkey,
  4115. .setauthsize = _qcrypto_aead_setauthsize,
  4116. .encrypt = _qcrypto_aead_encrypt_aes_cbc,
  4117. .decrypt = _qcrypto_aead_decrypt_aes_cbc,
  4118. .init = _qcrypto_cra_aead_aes_sha1_init,
  4119. .exit = _qcrypto_cra_aead_aes_exit,
  4120. },
  4121. {
  4122. .base = {
  4123. .cra_name = "authenc(hmac(sha1),cbc(des))",
  4124. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-des",
  4125. .cra_priority = 300,
  4126. .cra_flags = CRYPTO_ALG_ASYNC,
  4127. .cra_blocksize = DES_BLOCK_SIZE,
  4128. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4129. .cra_alignmask = 0,
  4130. .cra_module = THIS_MODULE,
  4131. },
  4132. .ivsize = DES_BLOCK_SIZE,
  4133. .maxauthsize = SHA1_DIGEST_SIZE,
  4134. .setkey = _qcrypto_aead_setkey,
  4135. .setauthsize = _qcrypto_aead_setauthsize,
  4136. .encrypt = _qcrypto_aead_encrypt_des_cbc,
  4137. .decrypt = _qcrypto_aead_decrypt_des_cbc,
  4138. .init = _qcrypto_cra_aead_sha1_init,
  4139. .exit = _qcrypto_cra_aead_exit,
  4140. },
  4141. {
  4142. .base = {
  4143. .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
  4144. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-3des",
  4145. .cra_priority = 300,
  4146. .cra_flags = CRYPTO_ALG_ASYNC,
  4147. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4148. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4149. .cra_alignmask = 0,
  4150. .cra_module = THIS_MODULE,
  4151. },
  4152. .ivsize = DES3_EDE_BLOCK_SIZE,
  4153. .maxauthsize = SHA1_DIGEST_SIZE,
  4154. .setkey = _qcrypto_aead_setkey,
  4155. .setauthsize = _qcrypto_aead_setauthsize,
  4156. .encrypt = _qcrypto_aead_encrypt_3des_cbc,
  4157. .decrypt = _qcrypto_aead_decrypt_3des_cbc,
  4158. .init = _qcrypto_cra_aead_sha1_init,
  4159. .exit = _qcrypto_cra_aead_exit,
  4160. },
  4161. };
  4162. static struct aead_alg _qcrypto_aead_sha256_hmac_algos[] = {
  4163. {
  4164. .base = {
  4165. .cra_name = "authenc(hmac(sha256),cbc(aes))",
  4166. .cra_driver_name = "qcrypto-aead-hmac-sha256-cbc-aes",
  4167. .cra_priority = 300,
  4168. .cra_flags = CRYPTO_ALG_ASYNC,
  4169. .cra_blocksize = AES_BLOCK_SIZE,
  4170. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4171. .cra_alignmask = 0,
  4172. .cra_module = THIS_MODULE,
  4173. },
  4174. .ivsize = AES_BLOCK_SIZE,
  4175. .maxauthsize = SHA256_DIGEST_SIZE,
  4176. .setkey = _qcrypto_aead_setkey,
  4177. .setauthsize = _qcrypto_aead_setauthsize,
  4178. .encrypt = _qcrypto_aead_encrypt_aes_cbc,
  4179. .decrypt = _qcrypto_aead_decrypt_aes_cbc,
  4180. .init = _qcrypto_cra_aead_aes_sha256_init,
  4181. .exit = _qcrypto_cra_aead_aes_exit,
  4182. },
  4183. {
  4184. .base = {
  4185. .cra_name = "authenc(hmac(sha256),cbc(des))",
  4186. .cra_driver_name = "qcrypto-aead-hmac-sha256-cbc-des",
  4187. .cra_priority = 300,
  4188. .cra_flags = CRYPTO_ALG_ASYNC,
  4189. .cra_blocksize = DES_BLOCK_SIZE,
  4190. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4191. .cra_alignmask = 0,
  4192. .cra_module = THIS_MODULE,
  4193. },
  4194. .ivsize = DES_BLOCK_SIZE,
  4195. .maxauthsize = SHA256_DIGEST_SIZE,
  4196. .setkey = _qcrypto_aead_setkey,
  4197. .setauthsize = _qcrypto_aead_setauthsize,
  4198. .encrypt = _qcrypto_aead_encrypt_des_cbc,
  4199. .decrypt = _qcrypto_aead_decrypt_des_cbc,
  4200. .init = _qcrypto_cra_aead_sha256_init,
  4201. .exit = _qcrypto_cra_aead_exit,
  4202. },
  4203. {
  4204. .base = {
  4205. .cra_name = "authenc(hmac(sha256),cbc(des3_ede))",
  4206. .cra_driver_name = "qcrypto-aead-hmac-sha256-cbc-3des",
  4207. .cra_priority = 300,
  4208. .cra_flags = CRYPTO_ALG_ASYNC,
  4209. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  4210. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4211. .cra_alignmask = 0,
  4212. .cra_module = THIS_MODULE,
  4213. },
  4214. .ivsize = DES3_EDE_BLOCK_SIZE,
  4215. .maxauthsize = SHA256_DIGEST_SIZE,
  4216. .setkey = _qcrypto_aead_setkey,
  4217. .setauthsize = _qcrypto_aead_setauthsize,
  4218. .encrypt = _qcrypto_aead_encrypt_3des_cbc,
  4219. .decrypt = _qcrypto_aead_decrypt_3des_cbc,
  4220. .init = _qcrypto_cra_aead_sha256_init,
  4221. .exit = _qcrypto_cra_aead_exit,
  4222. },
  4223. };
  4224. static struct aead_alg _qcrypto_aead_ccm_algo = {
  4225. .base = {
  4226. .cra_name = "ccm(aes)",
  4227. .cra_driver_name = "qcrypto-aes-ccm",
  4228. .cra_priority = 300,
  4229. .cra_flags = CRYPTO_ALG_ASYNC,
  4230. .cra_blocksize = AES_BLOCK_SIZE,
  4231. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4232. .cra_alignmask = 0,
  4233. .cra_module = THIS_MODULE,
  4234. },
  4235. .ivsize = AES_BLOCK_SIZE,
  4236. .maxauthsize = AES_BLOCK_SIZE,
  4237. .setkey = _qcrypto_aead_ccm_setkey,
  4238. .setauthsize = _qcrypto_aead_ccm_setauthsize,
  4239. .encrypt = _qcrypto_aead_encrypt_aes_ccm,
  4240. .decrypt = _qcrypto_aead_decrypt_aes_ccm,
  4241. .init = _qcrypto_cra_aead_ccm_init,
  4242. .exit = _qcrypto_cra_aead_exit,
  4243. };
  4244. static struct aead_alg _qcrypto_aead_rfc4309_ccm_algo = {
  4245. .base = {
  4246. .cra_name = "rfc4309(ccm(aes))",
  4247. .cra_driver_name = "qcrypto-rfc4309-aes-ccm",
  4248. .cra_priority = 300,
  4249. .cra_flags = CRYPTO_ALG_ASYNC,
  4250. .cra_blocksize = 1,
  4251. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  4252. .cra_alignmask = 0,
  4253. .cra_module = THIS_MODULE,
  4254. },
  4255. .ivsize = 8,
  4256. .maxauthsize = 16,
  4257. .setkey = _qcrypto_aead_rfc4309_ccm_setkey,
  4258. .setauthsize = _qcrypto_aead_rfc4309_ccm_setauthsize,
  4259. .encrypt = _qcrypto_aead_rfc4309_enc_aes_ccm,
  4260. .decrypt = _qcrypto_aead_rfc4309_dec_aes_ccm,
  4261. .init = _qcrypto_cra_aead_rfc4309_ccm_init,
  4262. .exit = _qcrypto_cra_aead_exit,
  4263. };
  4264. static int _qcrypto_probe(struct platform_device *pdev)
  4265. {
  4266. int rc = 0;
  4267. void *handle;
  4268. struct crypto_priv *cp = &qcrypto_dev;
  4269. int i;
  4270. struct msm_ce_hw_support *platform_support;
  4271. struct crypto_engine *pengine;
  4272. unsigned long flags;
  4273. struct qcrypto_req_control *pqcrypto_req_control = NULL;
  4274. pengine = kzalloc(sizeof(*pengine), GFP_KERNEL);
  4275. if (!pengine)
  4276. return -ENOMEM;
  4277. cp->platform_support.bus_scale_table = (struct msm_bus_scale_pdata *)
  4278. msm_bus_cl_get_pdata(pdev);
  4279. if (!cp->platform_support.bus_scale_table) {
  4280. dev_err(&pdev->dev, "bus_scale_table is NULL\n");
  4281. pengine->bw_state = BUS_HAS_BANDWIDTH;
  4282. } else {
  4283. pengine->bus_scale_handle = msm_bus_scale_register_client(
  4284. (struct msm_bus_scale_pdata *)
  4285. cp->platform_support.bus_scale_table);
  4286. if (!pengine->bus_scale_handle) {
  4287. dev_err(&pdev->dev, "failed to get bus scale handle\n");
  4288. rc = -ENOMEM;
  4289. goto exit_kzfree;
  4290. }
  4291. pengine->bw_state = BUS_NO_BANDWIDTH;
  4292. }
  4293. rc = msm_bus_scale_client_update_request(pengine->bus_scale_handle, 1);
  4294. if (rc) {
  4295. dev_err(&pdev->dev, "failed to set high bandwidth\n");
  4296. goto exit_kzfree;
  4297. }
  4298. handle = qce_open(pdev, &rc);
  4299. if (handle == NULL) {
  4300. rc = -ENODEV;
  4301. goto exit_free_pdata;
  4302. }
  4303. rc = msm_bus_scale_client_update_request(pengine->bus_scale_handle, 0);
  4304. if (rc) {
  4305. dev_err(&pdev->dev, "failed to set low bandwidth\n");
  4306. goto exit_qce_close;
  4307. }
  4308. platform_set_drvdata(pdev, pengine);
  4309. pengine->qce = handle;
  4310. pengine->pcp = cp;
  4311. pengine->pdev = pdev;
  4312. pengine->signature = 0xdeadbeef;
  4313. init_timer(&(pengine->bw_reaper_timer));
  4314. INIT_WORK(&pengine->bw_reaper_ws, qcrypto_bw_reaper_work);
  4315. pengine->bw_reaper_timer.function =
  4316. qcrypto_bw_reaper_timer_callback;
  4317. INIT_WORK(&pengine->bw_allocate_ws, qcrypto_bw_allocate_work);
  4318. pengine->high_bw_req = false;
  4319. pengine->active_seq = 0;
  4320. pengine->last_active_seq = 0;
  4321. pengine->check_flag = false;
  4322. pengine->max_req_used = 0;
  4323. pengine->issue_req = false;
  4324. crypto_init_queue(&pengine->req_queue, MSM_QCRYPTO_REQ_QUEUE_LENGTH);
  4325. mutex_lock(&cp->engine_lock);
  4326. cp->total_units++;
  4327. pengine->unit = cp->total_units;
  4328. spin_lock_irqsave(&cp->lock, flags);
  4329. pengine->first_engine = list_empty(&cp->engine_list);
  4330. if (pengine->first_engine)
  4331. cp->first_engine = pengine;
  4332. list_add_tail(&pengine->elist, &cp->engine_list);
  4333. cp->next_engine = pengine;
  4334. spin_unlock_irqrestore(&cp->lock, flags);
  4335. qce_hw_support(pengine->qce, &cp->ce_support);
  4336. pengine->ce_hw_instance = cp->ce_support.ce_hw_instance;
  4337. pengine->max_req = cp->ce_support.max_request;
  4338. pqcrypto_req_control = kzalloc(sizeof(struct qcrypto_req_control) *
  4339. pengine->max_req, GFP_KERNEL);
  4340. if (pqcrypto_req_control == NULL) {
  4341. rc = -ENOMEM;
  4342. goto exit_unlock_mutex;
  4343. }
  4344. qcrypto_init_req_control(pengine, pqcrypto_req_control);
  4345. if (cp->ce_support.bam) {
  4346. cp->platform_support.ce_shared = cp->ce_support.is_shared;
  4347. cp->platform_support.shared_ce_resource = 0;
  4348. cp->platform_support.hw_key_support = cp->ce_support.hw_key;
  4349. cp->platform_support.sha_hmac = 1;
  4350. pengine->ce_device = cp->ce_support.ce_device;
  4351. } else {
  4352. platform_support =
  4353. (struct msm_ce_hw_support *)pdev->dev.platform_data;
  4354. cp->platform_support.ce_shared = platform_support->ce_shared;
  4355. cp->platform_support.shared_ce_resource =
  4356. platform_support->shared_ce_resource;
  4357. cp->platform_support.hw_key_support =
  4358. platform_support->hw_key_support;
  4359. cp->platform_support.sha_hmac = platform_support->sha_hmac;
  4360. }
  4361. if (cp->total_units != 1)
  4362. goto exit_unlock_mutex;
  4363. /* register crypto cipher algorithms the device supports */
  4364. for (i = 0; i < ARRAY_SIZE(_qcrypto_ablk_cipher_algos); i++) {
  4365. struct qcrypto_alg *q_alg;
  4366. q_alg = _qcrypto_cipher_alg_alloc(cp,
  4367. &_qcrypto_ablk_cipher_algos[i]);
  4368. if (IS_ERR(q_alg)) {
  4369. rc = PTR_ERR(q_alg);
  4370. goto err;
  4371. }
  4372. if (cp->ce_support.use_sw_aes_cbc_ecb_ctr_algo) {
  4373. rc = _qcrypto_prefix_alg_cra_name(
  4374. q_alg->cipher_alg.cra_name,
  4375. strlen(q_alg->cipher_alg.cra_name));
  4376. if (rc) {
  4377. dev_err(&pdev->dev,
  4378. "The algorithm name %s is too long.\n",
  4379. q_alg->cipher_alg.cra_name);
  4380. kfree(q_alg);
  4381. goto err;
  4382. }
  4383. }
  4384. rc = crypto_register_alg(&q_alg->cipher_alg);
  4385. if (rc) {
  4386. dev_err(&pdev->dev, "%s alg registration failed\n",
  4387. q_alg->cipher_alg.cra_driver_name);
  4388. kzfree(q_alg);
  4389. } else {
  4390. list_add_tail(&q_alg->entry, &cp->alg_list);
  4391. dev_info(&pdev->dev, "%s\n",
  4392. q_alg->cipher_alg.cra_driver_name);
  4393. }
  4394. }
  4395. /* register crypto cipher algorithms the device supports */
  4396. if (cp->ce_support.aes_xts) {
  4397. struct qcrypto_alg *q_alg;
  4398. q_alg = _qcrypto_cipher_alg_alloc(cp,
  4399. &_qcrypto_ablk_cipher_xts_algo);
  4400. if (IS_ERR(q_alg)) {
  4401. rc = PTR_ERR(q_alg);
  4402. goto err;
  4403. }
  4404. if (cp->ce_support.use_sw_aes_xts_algo) {
  4405. rc = _qcrypto_prefix_alg_cra_name(
  4406. q_alg->cipher_alg.cra_name,
  4407. strlen(q_alg->cipher_alg.cra_name));
  4408. if (rc) {
  4409. dev_err(&pdev->dev,
  4410. "The algorithm name %s is too long.\n",
  4411. q_alg->cipher_alg.cra_name);
  4412. kfree(q_alg);
  4413. goto err;
  4414. }
  4415. }
  4416. rc = crypto_register_alg(&q_alg->cipher_alg);
  4417. if (rc) {
  4418. dev_err(&pdev->dev, "%s alg registration failed\n",
  4419. q_alg->cipher_alg.cra_driver_name);
  4420. kzfree(q_alg);
  4421. } else {
  4422. list_add_tail(&q_alg->entry, &cp->alg_list);
  4423. dev_info(&pdev->dev, "%s\n",
  4424. q_alg->cipher_alg.cra_driver_name);
  4425. }
  4426. }
  4427. /*
  4428. * Register crypto hash (sha1 and sha256) algorithms the
  4429. * device supports
  4430. */
  4431. for (i = 0; i < ARRAY_SIZE(_qcrypto_ahash_algos); i++) {
  4432. struct qcrypto_alg *q_alg = NULL;
  4433. q_alg = _qcrypto_sha_alg_alloc(cp, &_qcrypto_ahash_algos[i]);
  4434. if (IS_ERR(q_alg)) {
  4435. rc = PTR_ERR(q_alg);
  4436. goto err;
  4437. }
  4438. if (cp->ce_support.use_sw_ahash_algo) {
  4439. rc = _qcrypto_prefix_alg_cra_name(
  4440. q_alg->sha_alg.halg.base.cra_name,
  4441. strlen(q_alg->sha_alg.halg.base.cra_name));
  4442. if (rc) {
  4443. dev_err(&pdev->dev,
  4444. "The algorithm name %s is too long.\n",
  4445. q_alg->sha_alg.halg.base.cra_name);
  4446. kfree(q_alg);
  4447. goto err;
  4448. }
  4449. }
  4450. rc = crypto_register_ahash(&q_alg->sha_alg);
  4451. if (rc) {
  4452. dev_err(&pdev->dev, "%s alg registration failed\n",
  4453. q_alg->sha_alg.halg.base.cra_driver_name);
  4454. kzfree(q_alg);
  4455. } else {
  4456. list_add_tail(&q_alg->entry, &cp->alg_list);
  4457. dev_info(&pdev->dev, "%s\n",
  4458. q_alg->sha_alg.halg.base.cra_driver_name);
  4459. }
  4460. }
  4461. /* register crypto aead (hmac-sha1) algorithms the device supports */
  4462. if (cp->ce_support.sha1_hmac_20 || cp->ce_support.sha1_hmac
  4463. || cp->ce_support.sha_hmac) {
  4464. for (i = 0; i < ARRAY_SIZE(_qcrypto_aead_sha1_hmac_algos);
  4465. i++) {
  4466. struct qcrypto_alg *q_alg;
  4467. q_alg = _qcrypto_aead_alg_alloc(cp,
  4468. &_qcrypto_aead_sha1_hmac_algos[i]);
  4469. if (IS_ERR(q_alg)) {
  4470. rc = PTR_ERR(q_alg);
  4471. goto err;
  4472. }
  4473. if (cp->ce_support.use_sw_aead_algo) {
  4474. rc = _qcrypto_prefix_alg_cra_name(
  4475. q_alg->aead_alg.base.cra_name,
  4476. strlen(q_alg->aead_alg.base.cra_name));
  4477. if (rc) {
  4478. dev_err(&pdev->dev,
  4479. "The algorithm name %s is too long.\n",
  4480. q_alg->aead_alg.base.cra_name);
  4481. kfree(q_alg);
  4482. goto err;
  4483. }
  4484. }
  4485. rc = crypto_register_aead(&q_alg->aead_alg);
  4486. if (rc) {
  4487. dev_err(&pdev->dev,
  4488. "%s alg registration failed\n",
  4489. q_alg->aead_alg.base.cra_driver_name);
  4490. kfree(q_alg);
  4491. } else {
  4492. list_add_tail(&q_alg->entry, &cp->alg_list);
  4493. dev_info(&pdev->dev, "%s\n",
  4494. q_alg->aead_alg.base.cra_driver_name);
  4495. }
  4496. }
  4497. }
  4498. /* register crypto aead (hmac-sha256) algorithms the device supports */
  4499. if (cp->ce_support.sha_hmac) {
  4500. for (i = 0; i < ARRAY_SIZE(_qcrypto_aead_sha256_hmac_algos);
  4501. i++) {
  4502. struct qcrypto_alg *q_alg;
  4503. q_alg = _qcrypto_aead_alg_alloc(cp,
  4504. &_qcrypto_aead_sha256_hmac_algos[i]);
  4505. if (IS_ERR(q_alg)) {
  4506. rc = PTR_ERR(q_alg);
  4507. goto err;
  4508. }
  4509. if (cp->ce_support.use_sw_aead_algo) {
  4510. rc = _qcrypto_prefix_alg_cra_name(
  4511. q_alg->aead_alg.base.cra_name,
  4512. strlen(q_alg->aead_alg.base.cra_name));
  4513. if (rc) {
  4514. dev_err(&pdev->dev,
  4515. "The algorithm name %s is too long.\n",
  4516. q_alg->aead_alg.base.cra_name);
  4517. kfree(q_alg);
  4518. goto err;
  4519. }
  4520. }
  4521. rc = crypto_register_aead(&q_alg->aead_alg);
  4522. if (rc) {
  4523. dev_err(&pdev->dev,
  4524. "%s alg registration failed\n",
  4525. q_alg->aead_alg.base.cra_driver_name);
  4526. kfree(q_alg);
  4527. } else {
  4528. list_add_tail(&q_alg->entry, &cp->alg_list);
  4529. dev_info(&pdev->dev, "%s\n",
  4530. q_alg->aead_alg.base.cra_driver_name);
  4531. }
  4532. }
  4533. }
  4534. if ((cp->ce_support.sha_hmac) || (cp->platform_support.sha_hmac)) {
  4535. /* register crypto hmac algorithms the device supports */
  4536. for (i = 0; i < ARRAY_SIZE(_qcrypto_sha_hmac_algos); i++) {
  4537. struct qcrypto_alg *q_alg = NULL;
  4538. q_alg = _qcrypto_sha_alg_alloc(cp,
  4539. &_qcrypto_sha_hmac_algos[i]);
  4540. if (IS_ERR(q_alg)) {
  4541. rc = PTR_ERR(q_alg);
  4542. goto err;
  4543. }
  4544. if (cp->ce_support.use_sw_hmac_algo) {
  4545. rc = _qcrypto_prefix_alg_cra_name(
  4546. q_alg->sha_alg.halg.base.cra_name,
  4547. strlen(
  4548. q_alg->sha_alg.halg.base.cra_name));
  4549. if (rc) {
  4550. dev_err(&pdev->dev,
  4551. "The algorithm name %s is too long.\n",
  4552. q_alg->sha_alg.halg.base.cra_name);
  4553. kfree(q_alg);
  4554. goto err;
  4555. }
  4556. }
  4557. rc = crypto_register_ahash(&q_alg->sha_alg);
  4558. if (rc) {
  4559. dev_err(&pdev->dev,
  4560. "%s alg registration failed\n",
  4561. q_alg->sha_alg.halg.base.cra_driver_name);
  4562. kzfree(q_alg);
  4563. } else {
  4564. list_add_tail(&q_alg->entry, &cp->alg_list);
  4565. dev_info(&pdev->dev, "%s\n",
  4566. q_alg->sha_alg.halg.base.cra_driver_name);
  4567. }
  4568. }
  4569. }
  4570. /*
  4571. * Register crypto cipher (aes-ccm) algorithms the
  4572. * device supports
  4573. */
  4574. if (cp->ce_support.aes_ccm) {
  4575. struct qcrypto_alg *q_alg;
  4576. q_alg = _qcrypto_aead_alg_alloc(cp, &_qcrypto_aead_ccm_algo);
  4577. if (IS_ERR(q_alg)) {
  4578. rc = PTR_ERR(q_alg);
  4579. goto err;
  4580. }
  4581. if (cp->ce_support.use_sw_aes_ccm_algo) {
  4582. rc = _qcrypto_prefix_alg_cra_name(
  4583. q_alg->aead_alg.base.cra_name,
  4584. strlen(q_alg->aead_alg.base.cra_name));
  4585. if (rc) {
  4586. dev_err(&pdev->dev,
  4587. "The algorithm name %s is too long.\n",
  4588. q_alg->aead_alg.base.cra_name);
  4589. kfree(q_alg);
  4590. goto err;
  4591. }
  4592. }
  4593. rc = crypto_register_aead(&q_alg->aead_alg);
  4594. if (rc) {
  4595. dev_err(&pdev->dev, "%s alg registration failed\n",
  4596. q_alg->aead_alg.base.cra_driver_name);
  4597. kzfree(q_alg);
  4598. } else {
  4599. list_add_tail(&q_alg->entry, &cp->alg_list);
  4600. dev_info(&pdev->dev, "%s\n",
  4601. q_alg->aead_alg.base.cra_driver_name);
  4602. }
  4603. q_alg = _qcrypto_aead_alg_alloc(cp,
  4604. &_qcrypto_aead_rfc4309_ccm_algo);
  4605. if (IS_ERR(q_alg)) {
  4606. rc = PTR_ERR(q_alg);
  4607. goto err;
  4608. }
  4609. if (cp->ce_support.use_sw_aes_ccm_algo) {
  4610. rc = _qcrypto_prefix_alg_cra_name(
  4611. q_alg->aead_alg.base.cra_name,
  4612. strlen(q_alg->aead_alg.base.cra_name));
  4613. if (rc) {
  4614. dev_err(&pdev->dev,
  4615. "The algorithm name %s is too long.\n",
  4616. q_alg->aead_alg.base.cra_name);
  4617. kfree(q_alg);
  4618. goto err;
  4619. }
  4620. }
  4621. rc = crypto_register_aead(&q_alg->aead_alg);
  4622. if (rc) {
  4623. dev_err(&pdev->dev, "%s alg registration failed\n",
  4624. q_alg->aead_alg.base.cra_driver_name);
  4625. kfree(q_alg);
  4626. } else {
  4627. list_add_tail(&q_alg->entry, &cp->alg_list);
  4628. dev_info(&pdev->dev, "%s\n",
  4629. q_alg->aead_alg.base.cra_driver_name);
  4630. }
  4631. }
  4632. mutex_unlock(&cp->engine_lock);
  4633. return 0;
  4634. err:
  4635. _qcrypto_remove_engine(pengine);
  4636. kzfree(pqcrypto_req_control);
  4637. exit_unlock_mutex:
  4638. mutex_unlock(&cp->engine_lock);
  4639. exit_qce_close:
  4640. if (pengine->qce)
  4641. qce_close(pengine->qce);
  4642. exit_free_pdata:
  4643. msm_bus_scale_client_update_request(pengine->bus_scale_handle, 0);
  4644. platform_set_drvdata(pdev, NULL);
  4645. exit_kzfree:
  4646. kzfree(pengine);
  4647. return rc;
  4648. };
  4649. static int _qcrypto_engine_in_use(struct crypto_engine *pengine)
  4650. {
  4651. struct crypto_priv *cp = pengine->pcp;
  4652. if ((atomic_read(&pengine->req_count) > 0) || pengine->req_queue.qlen
  4653. || cp->req_queue.qlen)
  4654. return 1;
  4655. return 0;
  4656. }
  4657. static void _qcrypto_do_suspending(struct crypto_engine *pengine)
  4658. {
  4659. struct crypto_priv *cp = pengine->pcp;
  4660. if (cp->platform_support.bus_scale_table == NULL)
  4661. return;
  4662. del_timer_sync(&pengine->bw_reaper_timer);
  4663. qcrypto_ce_set_bus(pengine, false);
  4664. }
  4665. static int _qcrypto_suspend(struct platform_device *pdev, pm_message_t state)
  4666. {
  4667. int ret = 0;
  4668. struct crypto_engine *pengine;
  4669. struct crypto_priv *cp;
  4670. unsigned long flags;
  4671. pengine = platform_get_drvdata(pdev);
  4672. if (!pengine)
  4673. return -EINVAL;
  4674. /*
  4675. * Check if this platform supports clock management in suspend/resume
  4676. * If not, just simply return 0.
  4677. */
  4678. cp = pengine->pcp;
  4679. if (!cp->ce_support.clk_mgmt_sus_res)
  4680. return 0;
  4681. spin_lock_irqsave(&cp->lock, flags);
  4682. switch (pengine->bw_state) {
  4683. case BUS_NO_BANDWIDTH:
  4684. if (pengine->high_bw_req == false)
  4685. pengine->bw_state = BUS_SUSPENDED;
  4686. else
  4687. ret = -EBUSY;
  4688. break;
  4689. case BUS_HAS_BANDWIDTH:
  4690. if (_qcrypto_engine_in_use(pengine)) {
  4691. ret = -EBUSY;
  4692. } else {
  4693. pengine->bw_state = BUS_SUSPENDING;
  4694. spin_unlock_irqrestore(&cp->lock, flags);
  4695. _qcrypto_do_suspending(pengine);
  4696. spin_lock_irqsave(&cp->lock, flags);
  4697. pengine->bw_state = BUS_SUSPENDED;
  4698. }
  4699. break;
  4700. case BUS_BANDWIDTH_RELEASING:
  4701. case BUS_BANDWIDTH_ALLOCATING:
  4702. case BUS_SUSPENDED:
  4703. case BUS_SUSPENDING:
  4704. default:
  4705. ret = -EBUSY;
  4706. break;
  4707. }
  4708. spin_unlock_irqrestore(&cp->lock, flags);
  4709. if (ret)
  4710. return ret;
  4711. if (qce_pm_table.suspend) {
  4712. qcrypto_ce_set_bus(pengine, true);
  4713. qce_pm_table.suspend(pengine->qce);
  4714. qcrypto_ce_set_bus(pengine, false);
  4715. }
  4716. return 0;
  4717. }
  4718. static int _qcrypto_resume(struct platform_device *pdev)
  4719. {
  4720. struct crypto_engine *pengine;
  4721. struct crypto_priv *cp;
  4722. unsigned long flags;
  4723. int ret = 0;
  4724. pengine = platform_get_drvdata(pdev);
  4725. if (!pengine)
  4726. return -EINVAL;
  4727. cp = pengine->pcp;
  4728. if (!cp->ce_support.clk_mgmt_sus_res)
  4729. return 0;
  4730. spin_lock_irqsave(&cp->lock, flags);
  4731. if (pengine->bw_state == BUS_SUSPENDED) {
  4732. spin_unlock_irqrestore(&cp->lock, flags);
  4733. if (qce_pm_table.resume) {
  4734. qcrypto_ce_set_bus(pengine, true);
  4735. qce_pm_table.resume(pengine->qce);
  4736. qcrypto_ce_set_bus(pengine, false);
  4737. }
  4738. spin_lock_irqsave(&cp->lock, flags);
  4739. pengine->bw_state = BUS_NO_BANDWIDTH;
  4740. pengine->active_seq++;
  4741. pengine->check_flag = false;
  4742. if (cp->req_queue.qlen || pengine->req_queue.qlen) {
  4743. if (pengine->high_bw_req == false) {
  4744. qcrypto_ce_bw_allocate_req(pengine);
  4745. pengine->high_bw_req = true;
  4746. }
  4747. }
  4748. } else
  4749. ret = -EBUSY;
  4750. spin_unlock_irqrestore(&cp->lock, flags);
  4751. return ret;
  4752. }
  4753. static const struct of_device_id qcrypto_match[] = {
  4754. { .compatible = "qcom,qcrypto",
  4755. },
  4756. {}
  4757. };
  4758. static struct platform_driver __qcrypto = {
  4759. .probe = _qcrypto_probe,
  4760. .remove = _qcrypto_remove,
  4761. .suspend = _qcrypto_suspend,
  4762. .resume = _qcrypto_resume,
  4763. .driver = {
  4764. .owner = THIS_MODULE,
  4765. .name = "qcrypto",
  4766. .of_match_table = qcrypto_match,
  4767. },
  4768. };
  4769. static int _debug_qcrypto;
  4770. static int _debug_stats_open(struct inode *inode, struct file *file)
  4771. {
  4772. file->private_data = inode->i_private;
  4773. return 0;
  4774. }
  4775. static ssize_t _debug_stats_read(struct file *file, char __user *buf,
  4776. size_t count, loff_t *ppos)
  4777. {
  4778. int rc = -EINVAL;
  4779. int qcrypto = *((int *) file->private_data);
  4780. int len;
  4781. len = _disp_stats(qcrypto);
  4782. if (len <= count)
  4783. rc = simple_read_from_buffer((void __user *) buf, len,
  4784. ppos, (void *) _debug_read_buf, len);
  4785. return rc;
  4786. }
  4787. static ssize_t _debug_stats_write(struct file *file, const char __user *buf,
  4788. size_t count, loff_t *ppos)
  4789. {
  4790. unsigned long flags;
  4791. struct crypto_priv *cp = &qcrypto_dev;
  4792. struct crypto_engine *pe;
  4793. int i;
  4794. memset((char *)&_qcrypto_stat, 0, sizeof(struct crypto_stat));
  4795. spin_lock_irqsave(&cp->lock, flags);
  4796. list_for_each_entry(pe, &cp->engine_list, elist) {
  4797. pe->total_req = 0;
  4798. pe->err_req = 0;
  4799. qce_clear_driver_stats(pe->qce);
  4800. pe->max_req_used = 0;
  4801. }
  4802. cp->max_qlen = 0;
  4803. cp->resp_start = 0;
  4804. cp->resp_stop = 0;
  4805. cp->no_avail = 0;
  4806. cp->max_resp_qlen = 0;
  4807. cp->queue_work_eng3 = 0;
  4808. cp->queue_work_not_eng3 = 0;
  4809. cp->queue_work_not_eng3_nz = 0;
  4810. cp->max_reorder_cnt = 0;
  4811. for (i = 0; i < MAX_SMP_CPU + 1; i++)
  4812. cp->cpu_req[i] = 0;
  4813. spin_unlock_irqrestore(&cp->lock, flags);
  4814. return count;
  4815. }
  4816. static const struct file_operations _debug_stats_ops = {
  4817. .open = _debug_stats_open,
  4818. .read = _debug_stats_read,
  4819. .write = _debug_stats_write,
  4820. };
  4821. static int _qcrypto_debug_init(void)
  4822. {
  4823. int rc;
  4824. char name[DEBUG_MAX_FNAME];
  4825. struct dentry *dent;
  4826. _debug_dent = debugfs_create_dir("qcrypto", NULL);
  4827. if (IS_ERR(_debug_dent)) {
  4828. pr_err("qcrypto debugfs_create_dir fail, error %ld\n",
  4829. PTR_ERR(_debug_dent));
  4830. return PTR_ERR(_debug_dent);
  4831. }
  4832. snprintf(name, DEBUG_MAX_FNAME-1, "stats-%d", 1);
  4833. _debug_qcrypto = 0;
  4834. dent = debugfs_create_file(name, 0644, _debug_dent,
  4835. &_debug_qcrypto, &_debug_stats_ops);
  4836. if (dent == NULL) {
  4837. pr_err("qcrypto debugfs_create_file fail, error %ld\n",
  4838. PTR_ERR(dent));
  4839. rc = PTR_ERR(dent);
  4840. goto err;
  4841. }
  4842. return 0;
  4843. err:
  4844. debugfs_remove_recursive(_debug_dent);
  4845. return rc;
  4846. }
  4847. static int __init _qcrypto_init(void)
  4848. {
  4849. int rc;
  4850. struct crypto_priv *pcp = &qcrypto_dev;
  4851. rc = _qcrypto_debug_init();
  4852. if (rc)
  4853. return rc;
  4854. INIT_LIST_HEAD(&pcp->alg_list);
  4855. INIT_LIST_HEAD(&pcp->engine_list);
  4856. init_llist_head(&pcp->ordered_resp_list);
  4857. spin_lock_init(&pcp->lock);
  4858. mutex_init(&pcp->engine_lock);
  4859. pcp->resp_wq = alloc_workqueue("qcrypto_seq_response_wq",
  4860. WQ_MEM_RECLAIM | WQ_HIGHPRI | WQ_CPU_INTENSIVE, 1);
  4861. if (!pcp->resp_wq) {
  4862. pr_err("Error allocating workqueue\n");
  4863. return -ENOMEM;
  4864. }
  4865. INIT_WORK(&pcp->resp_work, seq_response);
  4866. pcp->total_units = 0;
  4867. pcp->platform_support.bus_scale_table = NULL;
  4868. pcp->next_engine = NULL;
  4869. pcp->scheduled_eng = NULL;
  4870. pcp->ce_req_proc_sts = IN_PROGRESS;
  4871. crypto_init_queue(&pcp->req_queue, MSM_QCRYPTO_REQ_QUEUE_LENGTH);
  4872. return platform_driver_register(&__qcrypto);
  4873. }
  4874. static void __exit _qcrypto_exit(void)
  4875. {
  4876. pr_debug("%s Unregister QCRYPTO\n", __func__);
  4877. debugfs_remove_recursive(_debug_dent);
  4878. platform_driver_unregister(&__qcrypto);
  4879. }
  4880. module_init(_qcrypto_init);
  4881. module_exit(_qcrypto_exit);
  4882. MODULE_LICENSE("GPL v2");
  4883. MODULE_DESCRIPTION("QTI Crypto driver");