f71805f.c 48 KB

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  1. /*
  2. * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O
  3. * chips integrated hardware monitoring features
  4. * Copyright (C) 2005-2006 Jean Delvare <[email protected]>
  5. *
  6. * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
  7. * complete hardware monitoring features: voltage, fan and temperature
  8. * sensors, and manual and automatic fan speed control.
  9. *
  10. * The F71872F/FG is almost the same, with two more voltages monitored,
  11. * and 6 VID inputs.
  12. *
  13. * The F71806F/FG is essentially the same as the F71872F/FG. It even has
  14. * the same chip ID, so the driver can't differentiate between.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  29. */
  30. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/slab.h>
  34. #include <linux/jiffies.h>
  35. #include <linux/platform_device.h>
  36. #include <linux/hwmon.h>
  37. #include <linux/hwmon-sysfs.h>
  38. #include <linux/err.h>
  39. #include <linux/mutex.h>
  40. #include <linux/sysfs.h>
  41. #include <linux/ioport.h>
  42. #include <linux/acpi.h>
  43. #include <linux/io.h>
  44. static unsigned short force_id;
  45. module_param(force_id, ushort, 0);
  46. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  47. static struct platform_device *pdev;
  48. #define DRVNAME "f71805f"
  49. enum kinds { f71805f, f71872f };
  50. /*
  51. * Super-I/O constants and functions
  52. */
  53. #define F71805F_LD_HWM 0x04
  54. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  55. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  56. #define SIO_REG_DEVREV 0x22 /* Device revision */
  57. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  58. #define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */
  59. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  60. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  61. #define SIO_FINTEK_ID 0x1934
  62. #define SIO_F71805F_ID 0x0406
  63. #define SIO_F71872F_ID 0x0341
  64. static inline int
  65. superio_inb(int base, int reg)
  66. {
  67. outb(reg, base);
  68. return inb(base + 1);
  69. }
  70. static int
  71. superio_inw(int base, int reg)
  72. {
  73. int val;
  74. outb(reg++, base);
  75. val = inb(base + 1) << 8;
  76. outb(reg, base);
  77. val |= inb(base + 1);
  78. return val;
  79. }
  80. static inline void
  81. superio_select(int base, int ld)
  82. {
  83. outb(SIO_REG_LDSEL, base);
  84. outb(ld, base + 1);
  85. }
  86. static inline int
  87. superio_enter(int base)
  88. {
  89. if (!request_muxed_region(base, 2, DRVNAME))
  90. return -EBUSY;
  91. outb(0x87, base);
  92. outb(0x87, base);
  93. return 0;
  94. }
  95. static inline void
  96. superio_exit(int base)
  97. {
  98. outb(0xaa, base);
  99. release_region(base, 2);
  100. }
  101. /*
  102. * ISA constants
  103. */
  104. #define REGION_LENGTH 8
  105. #define ADDR_REG_OFFSET 5
  106. #define DATA_REG_OFFSET 6
  107. /*
  108. * Registers
  109. */
  110. /* in nr from 0 to 10 (8-bit values) */
  111. #define F71805F_REG_IN(nr) (0x10 + (nr))
  112. #define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E)
  113. #define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F)
  114. /* fan nr from 0 to 2 (12-bit values, two registers) */
  115. #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
  116. #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
  117. #define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr))
  118. #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
  119. #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr))
  120. #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
  121. /* temp nr from 0 to 2 (8-bit values) */
  122. #define F71805F_REG_TEMP(nr) (0x1B + (nr))
  123. #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
  124. #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
  125. #define F71805F_REG_TEMP_MODE 0x01
  126. /* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */
  127. /* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */
  128. #define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \
  129. (0xA0 + 0x10 * (pwmnr) + (2 - (apnr)))
  130. #define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \
  131. (0xA4 + 0x10 * (pwmnr) + \
  132. 2 * (2 - (apnr)))
  133. #define F71805F_REG_START 0x00
  134. /* status nr from 0 to 2 */
  135. #define F71805F_REG_STATUS(nr) (0x36 + (nr))
  136. /* individual register bits */
  137. #define FAN_CTRL_DC_MODE 0x10
  138. #define FAN_CTRL_LATCH_FULL 0x08
  139. #define FAN_CTRL_MODE_MASK 0x03
  140. #define FAN_CTRL_MODE_SPEED 0x00
  141. #define FAN_CTRL_MODE_TEMPERATURE 0x01
  142. #define FAN_CTRL_MODE_MANUAL 0x02
  143. /*
  144. * Data structures and manipulation thereof
  145. */
  146. struct f71805f_auto_point {
  147. u8 temp[3];
  148. u16 fan[3];
  149. };
  150. struct f71805f_data {
  151. unsigned short addr;
  152. const char *name;
  153. struct device *hwmon_dev;
  154. struct mutex update_lock;
  155. char valid; /* !=0 if following fields are valid */
  156. unsigned long last_updated; /* In jiffies */
  157. unsigned long last_limits; /* In jiffies */
  158. /* Register values */
  159. u8 in[11];
  160. u8 in_high[11];
  161. u8 in_low[11];
  162. u16 has_in;
  163. u16 fan[3];
  164. u16 fan_low[3];
  165. u16 fan_target[3];
  166. u8 fan_ctrl[3];
  167. u8 pwm[3];
  168. u8 pwm_freq[3];
  169. u8 temp[3];
  170. u8 temp_high[3];
  171. u8 temp_hyst[3];
  172. u8 temp_mode;
  173. unsigned long alarms;
  174. struct f71805f_auto_point auto_points[3];
  175. };
  176. struct f71805f_sio_data {
  177. enum kinds kind;
  178. u8 fnsel1;
  179. };
  180. static inline long in_from_reg(u8 reg)
  181. {
  182. return reg * 8;
  183. }
  184. /* The 2 least significant bits are not used */
  185. static inline u8 in_to_reg(long val)
  186. {
  187. if (val <= 0)
  188. return 0;
  189. if (val >= 2016)
  190. return 0xfc;
  191. return ((val + 16) / 32) << 2;
  192. }
  193. /* in0 is downscaled by a factor 2 internally */
  194. static inline long in0_from_reg(u8 reg)
  195. {
  196. return reg * 16;
  197. }
  198. static inline u8 in0_to_reg(long val)
  199. {
  200. if (val <= 0)
  201. return 0;
  202. if (val >= 4032)
  203. return 0xfc;
  204. return ((val + 32) / 64) << 2;
  205. }
  206. /* The 4 most significant bits are not used */
  207. static inline long fan_from_reg(u16 reg)
  208. {
  209. reg &= 0xfff;
  210. if (!reg || reg == 0xfff)
  211. return 0;
  212. return 1500000 / reg;
  213. }
  214. static inline u16 fan_to_reg(long rpm)
  215. {
  216. /*
  217. * If the low limit is set below what the chip can measure,
  218. * store the largest possible 12-bit value in the registers,
  219. * so that no alarm will ever trigger.
  220. */
  221. if (rpm < 367)
  222. return 0xfff;
  223. return 1500000 / rpm;
  224. }
  225. static inline unsigned long pwm_freq_from_reg(u8 reg)
  226. {
  227. unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
  228. reg &= 0x7f;
  229. if (reg == 0)
  230. reg++;
  231. return clock / (reg << 8);
  232. }
  233. static inline u8 pwm_freq_to_reg(unsigned long val)
  234. {
  235. if (val >= 187500) /* The highest we can do */
  236. return 0x80;
  237. if (val >= 1475) /* Use 48 MHz clock */
  238. return 0x80 | (48000000UL / (val << 8));
  239. if (val < 31) /* The lowest we can do */
  240. return 0x7f;
  241. else /* Use 1 MHz clock */
  242. return 1000000UL / (val << 8);
  243. }
  244. static inline int pwm_mode_from_reg(u8 reg)
  245. {
  246. return !(reg & FAN_CTRL_DC_MODE);
  247. }
  248. static inline long temp_from_reg(u8 reg)
  249. {
  250. return reg * 1000;
  251. }
  252. static inline u8 temp_to_reg(long val)
  253. {
  254. if (val <= 0)
  255. return 0;
  256. if (val >= 1000 * 0xff)
  257. return 0xff;
  258. return (val + 500) / 1000;
  259. }
  260. /*
  261. * Device I/O access
  262. */
  263. /* Must be called with data->update_lock held, except during initialization */
  264. static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
  265. {
  266. outb(reg, data->addr + ADDR_REG_OFFSET);
  267. return inb(data->addr + DATA_REG_OFFSET);
  268. }
  269. /* Must be called with data->update_lock held, except during initialization */
  270. static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
  271. {
  272. outb(reg, data->addr + ADDR_REG_OFFSET);
  273. outb(val, data->addr + DATA_REG_OFFSET);
  274. }
  275. /*
  276. * It is important to read the MSB first, because doing so latches the
  277. * value of the LSB, so we are sure both bytes belong to the same value.
  278. * Must be called with data->update_lock held, except during initialization
  279. */
  280. static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
  281. {
  282. u16 val;
  283. outb(reg, data->addr + ADDR_REG_OFFSET);
  284. val = inb(data->addr + DATA_REG_OFFSET) << 8;
  285. outb(++reg, data->addr + ADDR_REG_OFFSET);
  286. val |= inb(data->addr + DATA_REG_OFFSET);
  287. return val;
  288. }
  289. /* Must be called with data->update_lock held, except during initialization */
  290. static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
  291. {
  292. outb(reg, data->addr + ADDR_REG_OFFSET);
  293. outb(val >> 8, data->addr + DATA_REG_OFFSET);
  294. outb(++reg, data->addr + ADDR_REG_OFFSET);
  295. outb(val & 0xff, data->addr + DATA_REG_OFFSET);
  296. }
  297. static struct f71805f_data *f71805f_update_device(struct device *dev)
  298. {
  299. struct f71805f_data *data = dev_get_drvdata(dev);
  300. int nr, apnr;
  301. mutex_lock(&data->update_lock);
  302. /* Limit registers cache is refreshed after 60 seconds */
  303. if (time_after(jiffies, data->last_updated + 60 * HZ)
  304. || !data->valid) {
  305. for (nr = 0; nr < 11; nr++) {
  306. if (!(data->has_in & (1 << nr)))
  307. continue;
  308. data->in_high[nr] = f71805f_read8(data,
  309. F71805F_REG_IN_HIGH(nr));
  310. data->in_low[nr] = f71805f_read8(data,
  311. F71805F_REG_IN_LOW(nr));
  312. }
  313. for (nr = 0; nr < 3; nr++) {
  314. data->fan_low[nr] = f71805f_read16(data,
  315. F71805F_REG_FAN_LOW(nr));
  316. data->fan_target[nr] = f71805f_read16(data,
  317. F71805F_REG_FAN_TARGET(nr));
  318. data->pwm_freq[nr] = f71805f_read8(data,
  319. F71805F_REG_PWM_FREQ(nr));
  320. }
  321. for (nr = 0; nr < 3; nr++) {
  322. data->temp_high[nr] = f71805f_read8(data,
  323. F71805F_REG_TEMP_HIGH(nr));
  324. data->temp_hyst[nr] = f71805f_read8(data,
  325. F71805F_REG_TEMP_HYST(nr));
  326. }
  327. data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
  328. for (nr = 0; nr < 3; nr++) {
  329. for (apnr = 0; apnr < 3; apnr++) {
  330. data->auto_points[nr].temp[apnr] =
  331. f71805f_read8(data,
  332. F71805F_REG_PWM_AUTO_POINT_TEMP(nr,
  333. apnr));
  334. data->auto_points[nr].fan[apnr] =
  335. f71805f_read16(data,
  336. F71805F_REG_PWM_AUTO_POINT_FAN(nr,
  337. apnr));
  338. }
  339. }
  340. data->last_limits = jiffies;
  341. }
  342. /* Measurement registers cache is refreshed after 1 second */
  343. if (time_after(jiffies, data->last_updated + HZ)
  344. || !data->valid) {
  345. for (nr = 0; nr < 11; nr++) {
  346. if (!(data->has_in & (1 << nr)))
  347. continue;
  348. data->in[nr] = f71805f_read8(data,
  349. F71805F_REG_IN(nr));
  350. }
  351. for (nr = 0; nr < 3; nr++) {
  352. data->fan[nr] = f71805f_read16(data,
  353. F71805F_REG_FAN(nr));
  354. data->fan_ctrl[nr] = f71805f_read8(data,
  355. F71805F_REG_FAN_CTRL(nr));
  356. data->pwm[nr] = f71805f_read8(data,
  357. F71805F_REG_PWM_DUTY(nr));
  358. }
  359. for (nr = 0; nr < 3; nr++) {
  360. data->temp[nr] = f71805f_read8(data,
  361. F71805F_REG_TEMP(nr));
  362. }
  363. data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
  364. + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
  365. + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
  366. data->last_updated = jiffies;
  367. data->valid = 1;
  368. }
  369. mutex_unlock(&data->update_lock);
  370. return data;
  371. }
  372. /*
  373. * Sysfs interface
  374. */
  375. static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
  376. char *buf)
  377. {
  378. struct f71805f_data *data = f71805f_update_device(dev);
  379. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  380. int nr = attr->index;
  381. return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr]));
  382. }
  383. static ssize_t show_in0_max(struct device *dev, struct device_attribute
  384. *devattr, char *buf)
  385. {
  386. struct f71805f_data *data = f71805f_update_device(dev);
  387. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  388. int nr = attr->index;
  389. return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr]));
  390. }
  391. static ssize_t show_in0_min(struct device *dev, struct device_attribute
  392. *devattr, char *buf)
  393. {
  394. struct f71805f_data *data = f71805f_update_device(dev);
  395. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  396. int nr = attr->index;
  397. return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr]));
  398. }
  399. static ssize_t set_in0_max(struct device *dev, struct device_attribute
  400. *devattr, const char *buf, size_t count)
  401. {
  402. struct f71805f_data *data = dev_get_drvdata(dev);
  403. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  404. int nr = attr->index;
  405. long val;
  406. int err;
  407. err = kstrtol(buf, 10, &val);
  408. if (err)
  409. return err;
  410. mutex_lock(&data->update_lock);
  411. data->in_high[nr] = in0_to_reg(val);
  412. f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
  413. mutex_unlock(&data->update_lock);
  414. return count;
  415. }
  416. static ssize_t set_in0_min(struct device *dev, struct device_attribute
  417. *devattr, const char *buf, size_t count)
  418. {
  419. struct f71805f_data *data = dev_get_drvdata(dev);
  420. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  421. int nr = attr->index;
  422. long val;
  423. int err;
  424. err = kstrtol(buf, 10, &val);
  425. if (err)
  426. return err;
  427. mutex_lock(&data->update_lock);
  428. data->in_low[nr] = in0_to_reg(val);
  429. f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
  430. mutex_unlock(&data->update_lock);
  431. return count;
  432. }
  433. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  434. char *buf)
  435. {
  436. struct f71805f_data *data = f71805f_update_device(dev);
  437. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  438. int nr = attr->index;
  439. return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
  440. }
  441. static ssize_t show_in_max(struct device *dev, struct device_attribute
  442. *devattr, char *buf)
  443. {
  444. struct f71805f_data *data = f71805f_update_device(dev);
  445. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  446. int nr = attr->index;
  447. return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
  448. }
  449. static ssize_t show_in_min(struct device *dev, struct device_attribute
  450. *devattr, char *buf)
  451. {
  452. struct f71805f_data *data = f71805f_update_device(dev);
  453. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  454. int nr = attr->index;
  455. return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
  456. }
  457. static ssize_t set_in_max(struct device *dev, struct device_attribute
  458. *devattr, const char *buf, size_t count)
  459. {
  460. struct f71805f_data *data = dev_get_drvdata(dev);
  461. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  462. int nr = attr->index;
  463. long val;
  464. int err;
  465. err = kstrtol(buf, 10, &val);
  466. if (err)
  467. return err;
  468. mutex_lock(&data->update_lock);
  469. data->in_high[nr] = in_to_reg(val);
  470. f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
  471. mutex_unlock(&data->update_lock);
  472. return count;
  473. }
  474. static ssize_t set_in_min(struct device *dev, struct device_attribute
  475. *devattr, const char *buf, size_t count)
  476. {
  477. struct f71805f_data *data = dev_get_drvdata(dev);
  478. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  479. int nr = attr->index;
  480. long val;
  481. int err;
  482. err = kstrtol(buf, 10, &val);
  483. if (err)
  484. return err;
  485. mutex_lock(&data->update_lock);
  486. data->in_low[nr] = in_to_reg(val);
  487. f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
  488. mutex_unlock(&data->update_lock);
  489. return count;
  490. }
  491. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  492. char *buf)
  493. {
  494. struct f71805f_data *data = f71805f_update_device(dev);
  495. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  496. int nr = attr->index;
  497. return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
  498. }
  499. static ssize_t show_fan_min(struct device *dev, struct device_attribute
  500. *devattr, char *buf)
  501. {
  502. struct f71805f_data *data = f71805f_update_device(dev);
  503. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  504. int nr = attr->index;
  505. return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
  506. }
  507. static ssize_t show_fan_target(struct device *dev, struct device_attribute
  508. *devattr, char *buf)
  509. {
  510. struct f71805f_data *data = f71805f_update_device(dev);
  511. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  512. int nr = attr->index;
  513. return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr]));
  514. }
  515. static ssize_t set_fan_min(struct device *dev, struct device_attribute
  516. *devattr, const char *buf, size_t count)
  517. {
  518. struct f71805f_data *data = dev_get_drvdata(dev);
  519. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  520. int nr = attr->index;
  521. long val;
  522. int err;
  523. err = kstrtol(buf, 10, &val);
  524. if (err)
  525. return err;
  526. mutex_lock(&data->update_lock);
  527. data->fan_low[nr] = fan_to_reg(val);
  528. f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
  529. mutex_unlock(&data->update_lock);
  530. return count;
  531. }
  532. static ssize_t set_fan_target(struct device *dev, struct device_attribute
  533. *devattr, const char *buf, size_t count)
  534. {
  535. struct f71805f_data *data = dev_get_drvdata(dev);
  536. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  537. int nr = attr->index;
  538. long val;
  539. int err;
  540. err = kstrtol(buf, 10, &val);
  541. if (err)
  542. return err;
  543. mutex_lock(&data->update_lock);
  544. data->fan_target[nr] = fan_to_reg(val);
  545. f71805f_write16(data, F71805F_REG_FAN_TARGET(nr),
  546. data->fan_target[nr]);
  547. mutex_unlock(&data->update_lock);
  548. return count;
  549. }
  550. static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
  551. char *buf)
  552. {
  553. struct f71805f_data *data = f71805f_update_device(dev);
  554. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  555. int nr = attr->index;
  556. return sprintf(buf, "%d\n", (int)data->pwm[nr]);
  557. }
  558. static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
  559. *devattr, char *buf)
  560. {
  561. struct f71805f_data *data = f71805f_update_device(dev);
  562. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  563. int nr = attr->index;
  564. int mode;
  565. switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
  566. case FAN_CTRL_MODE_SPEED:
  567. mode = 3;
  568. break;
  569. case FAN_CTRL_MODE_TEMPERATURE:
  570. mode = 2;
  571. break;
  572. default: /* MANUAL */
  573. mode = 1;
  574. }
  575. return sprintf(buf, "%d\n", mode);
  576. }
  577. static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
  578. *devattr, char *buf)
  579. {
  580. struct f71805f_data *data = f71805f_update_device(dev);
  581. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  582. int nr = attr->index;
  583. return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
  584. }
  585. static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
  586. *devattr, char *buf)
  587. {
  588. struct f71805f_data *data = f71805f_update_device(dev);
  589. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  590. int nr = attr->index;
  591. return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
  592. }
  593. static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
  594. const char *buf, size_t count)
  595. {
  596. struct f71805f_data *data = dev_get_drvdata(dev);
  597. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  598. int nr = attr->index;
  599. unsigned long val;
  600. int err;
  601. err = kstrtoul(buf, 10, &val);
  602. if (err)
  603. return err;
  604. if (val > 255)
  605. return -EINVAL;
  606. mutex_lock(&data->update_lock);
  607. data->pwm[nr] = val;
  608. f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
  609. mutex_unlock(&data->update_lock);
  610. return count;
  611. }
  612. static struct attribute *f71805f_attr_pwm[];
  613. static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
  614. *devattr, const char *buf, size_t count)
  615. {
  616. struct f71805f_data *data = dev_get_drvdata(dev);
  617. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  618. int nr = attr->index;
  619. u8 reg;
  620. unsigned long val;
  621. int err;
  622. err = kstrtoul(buf, 10, &val);
  623. if (err)
  624. return err;
  625. if (val < 1 || val > 3)
  626. return -EINVAL;
  627. if (val > 1) { /* Automatic mode, user can't set PWM value */
  628. if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
  629. S_IRUGO))
  630. dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
  631. }
  632. mutex_lock(&data->update_lock);
  633. reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
  634. & ~FAN_CTRL_MODE_MASK;
  635. switch (val) {
  636. case 1:
  637. reg |= FAN_CTRL_MODE_MANUAL;
  638. break;
  639. case 2:
  640. reg |= FAN_CTRL_MODE_TEMPERATURE;
  641. break;
  642. case 3:
  643. reg |= FAN_CTRL_MODE_SPEED;
  644. break;
  645. }
  646. data->fan_ctrl[nr] = reg;
  647. f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
  648. mutex_unlock(&data->update_lock);
  649. if (val == 1) { /* Manual mode, user can set PWM value */
  650. if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
  651. S_IRUGO | S_IWUSR))
  652. dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
  653. }
  654. return count;
  655. }
  656. static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
  657. *devattr, const char *buf, size_t count)
  658. {
  659. struct f71805f_data *data = dev_get_drvdata(dev);
  660. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  661. int nr = attr->index;
  662. unsigned long val;
  663. int err;
  664. err = kstrtoul(buf, 10, &val);
  665. if (err)
  666. return err;
  667. mutex_lock(&data->update_lock);
  668. data->pwm_freq[nr] = pwm_freq_to_reg(val);
  669. f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
  670. mutex_unlock(&data->update_lock);
  671. return count;
  672. }
  673. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  674. struct device_attribute *devattr,
  675. char *buf)
  676. {
  677. struct f71805f_data *data = dev_get_drvdata(dev);
  678. struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
  679. int pwmnr = attr->nr;
  680. int apnr = attr->index;
  681. return sprintf(buf, "%ld\n",
  682. temp_from_reg(data->auto_points[pwmnr].temp[apnr]));
  683. }
  684. static ssize_t set_pwm_auto_point_temp(struct device *dev,
  685. struct device_attribute *devattr,
  686. const char *buf, size_t count)
  687. {
  688. struct f71805f_data *data = dev_get_drvdata(dev);
  689. struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
  690. int pwmnr = attr->nr;
  691. int apnr = attr->index;
  692. unsigned long val;
  693. int err;
  694. err = kstrtoul(buf, 10, &val);
  695. if (err)
  696. return err;
  697. mutex_lock(&data->update_lock);
  698. data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val);
  699. f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr),
  700. data->auto_points[pwmnr].temp[apnr]);
  701. mutex_unlock(&data->update_lock);
  702. return count;
  703. }
  704. static ssize_t show_pwm_auto_point_fan(struct device *dev,
  705. struct device_attribute *devattr,
  706. char *buf)
  707. {
  708. struct f71805f_data *data = dev_get_drvdata(dev);
  709. struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
  710. int pwmnr = attr->nr;
  711. int apnr = attr->index;
  712. return sprintf(buf, "%ld\n",
  713. fan_from_reg(data->auto_points[pwmnr].fan[apnr]));
  714. }
  715. static ssize_t set_pwm_auto_point_fan(struct device *dev,
  716. struct device_attribute *devattr,
  717. const char *buf, size_t count)
  718. {
  719. struct f71805f_data *data = dev_get_drvdata(dev);
  720. struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
  721. int pwmnr = attr->nr;
  722. int apnr = attr->index;
  723. unsigned long val;
  724. int err;
  725. err = kstrtoul(buf, 10, &val);
  726. if (err)
  727. return err;
  728. mutex_lock(&data->update_lock);
  729. data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val);
  730. f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr),
  731. data->auto_points[pwmnr].fan[apnr]);
  732. mutex_unlock(&data->update_lock);
  733. return count;
  734. }
  735. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  736. char *buf)
  737. {
  738. struct f71805f_data *data = f71805f_update_device(dev);
  739. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  740. int nr = attr->index;
  741. return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
  742. }
  743. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  744. *devattr, char *buf)
  745. {
  746. struct f71805f_data *data = f71805f_update_device(dev);
  747. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  748. int nr = attr->index;
  749. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
  750. }
  751. static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
  752. *devattr, char *buf)
  753. {
  754. struct f71805f_data *data = f71805f_update_device(dev);
  755. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  756. int nr = attr->index;
  757. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
  758. }
  759. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  760. *devattr, char *buf)
  761. {
  762. struct f71805f_data *data = f71805f_update_device(dev);
  763. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  764. int nr = attr->index;
  765. /* 3 is diode, 4 is thermistor */
  766. return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
  767. }
  768. static ssize_t set_temp_max(struct device *dev, struct device_attribute
  769. *devattr, const char *buf, size_t count)
  770. {
  771. struct f71805f_data *data = dev_get_drvdata(dev);
  772. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  773. int nr = attr->index;
  774. long val;
  775. int err;
  776. err = kstrtol(buf, 10, &val);
  777. if (err)
  778. return err;
  779. mutex_lock(&data->update_lock);
  780. data->temp_high[nr] = temp_to_reg(val);
  781. f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
  782. mutex_unlock(&data->update_lock);
  783. return count;
  784. }
  785. static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
  786. *devattr, const char *buf, size_t count)
  787. {
  788. struct f71805f_data *data = dev_get_drvdata(dev);
  789. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  790. int nr = attr->index;
  791. long val;
  792. int err;
  793. err = kstrtol(buf, 10, &val);
  794. if (err)
  795. return err;
  796. mutex_lock(&data->update_lock);
  797. data->temp_hyst[nr] = temp_to_reg(val);
  798. f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
  799. mutex_unlock(&data->update_lock);
  800. return count;
  801. }
  802. static ssize_t show_alarms_in(struct device *dev, struct device_attribute
  803. *devattr, char *buf)
  804. {
  805. struct f71805f_data *data = f71805f_update_device(dev);
  806. return sprintf(buf, "%lu\n", data->alarms & 0x7ff);
  807. }
  808. static ssize_t show_alarms_fan(struct device *dev, struct device_attribute
  809. *devattr, char *buf)
  810. {
  811. struct f71805f_data *data = f71805f_update_device(dev);
  812. return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
  813. }
  814. static ssize_t show_alarms_temp(struct device *dev, struct device_attribute
  815. *devattr, char *buf)
  816. {
  817. struct f71805f_data *data = f71805f_update_device(dev);
  818. return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
  819. }
  820. static ssize_t show_alarm(struct device *dev, struct device_attribute
  821. *devattr, char *buf)
  822. {
  823. struct f71805f_data *data = f71805f_update_device(dev);
  824. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  825. int bitnr = attr->index;
  826. return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
  827. }
  828. static ssize_t show_name(struct device *dev, struct device_attribute
  829. *devattr, char *buf)
  830. {
  831. struct f71805f_data *data = dev_get_drvdata(dev);
  832. return sprintf(buf, "%s\n", data->name);
  833. }
  834. static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0);
  835. static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
  836. show_in0_max, set_in0_max, 0);
  837. static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
  838. show_in0_min, set_in0_min, 0);
  839. static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
  840. static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
  841. show_in_max, set_in_max, 1);
  842. static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
  843. show_in_min, set_in_min, 1);
  844. static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
  845. static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
  846. show_in_max, set_in_max, 2);
  847. static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
  848. show_in_min, set_in_min, 2);
  849. static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
  850. static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
  851. show_in_max, set_in_max, 3);
  852. static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
  853. show_in_min, set_in_min, 3);
  854. static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
  855. static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
  856. show_in_max, set_in_max, 4);
  857. static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
  858. show_in_min, set_in_min, 4);
  859. static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
  860. static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
  861. show_in_max, set_in_max, 5);
  862. static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
  863. show_in_min, set_in_min, 5);
  864. static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
  865. static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
  866. show_in_max, set_in_max, 6);
  867. static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
  868. show_in_min, set_in_min, 6);
  869. static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
  870. static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
  871. show_in_max, set_in_max, 7);
  872. static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
  873. show_in_min, set_in_min, 7);
  874. static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
  875. static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
  876. show_in_max, set_in_max, 8);
  877. static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
  878. show_in_min, set_in_min, 8);
  879. static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9);
  880. static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR,
  881. show_in0_max, set_in0_max, 9);
  882. static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR,
  883. show_in0_min, set_in0_min, 9);
  884. static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10);
  885. static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR,
  886. show_in0_max, set_in0_max, 10);
  887. static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR,
  888. show_in0_min, set_in0_min, 10);
  889. static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
  890. static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
  891. show_fan_min, set_fan_min, 0);
  892. static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR,
  893. show_fan_target, set_fan_target, 0);
  894. static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
  895. static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
  896. show_fan_min, set_fan_min, 1);
  897. static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR,
  898. show_fan_target, set_fan_target, 1);
  899. static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
  900. static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
  901. show_fan_min, set_fan_min, 2);
  902. static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR,
  903. show_fan_target, set_fan_target, 2);
  904. static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
  905. static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
  906. show_temp_max, set_temp_max, 0);
  907. static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
  908. show_temp_hyst, set_temp_hyst, 0);
  909. static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
  910. static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
  911. static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
  912. show_temp_max, set_temp_max, 1);
  913. static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
  914. show_temp_hyst, set_temp_hyst, 1);
  915. static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
  916. static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
  917. static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
  918. show_temp_max, set_temp_max, 2);
  919. static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
  920. show_temp_hyst, set_temp_hyst, 2);
  921. static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
  922. /*
  923. * pwm (value) files are created read-only, write permission is
  924. * then added or removed dynamically as needed
  925. */
  926. static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
  927. static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
  928. show_pwm_enable, set_pwm_enable, 0);
  929. static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
  930. show_pwm_freq, set_pwm_freq, 0);
  931. static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
  932. static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
  933. static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
  934. show_pwm_enable, set_pwm_enable, 1);
  935. static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
  936. show_pwm_freq, set_pwm_freq, 1);
  937. static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
  938. static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
  939. static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
  940. show_pwm_enable, set_pwm_enable, 2);
  941. static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
  942. show_pwm_freq, set_pwm_freq, 2);
  943. static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
  944. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
  945. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  946. 0, 0);
  947. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR,
  948. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  949. 0, 0);
  950. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
  951. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  952. 0, 1);
  953. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR,
  954. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  955. 0, 1);
  956. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
  957. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  958. 0, 2);
  959. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR,
  960. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  961. 0, 2);
  962. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
  963. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  964. 1, 0);
  965. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR,
  966. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  967. 1, 0);
  968. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
  969. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  970. 1, 1);
  971. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR,
  972. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  973. 1, 1);
  974. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
  975. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  976. 1, 2);
  977. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR,
  978. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  979. 1, 2);
  980. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
  981. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  982. 2, 0);
  983. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR,
  984. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  985. 2, 0);
  986. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
  987. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  988. 2, 1);
  989. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR,
  990. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  991. 2, 1);
  992. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
  993. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  994. 2, 2);
  995. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR,
  996. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  997. 2, 2);
  998. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
  999. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
  1000. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
  1001. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
  1002. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
  1003. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
  1004. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
  1005. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
  1006. static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
  1007. static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
  1008. static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
  1009. static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
  1010. static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
  1011. static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
  1012. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
  1013. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
  1014. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
  1015. static DEVICE_ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL);
  1016. static DEVICE_ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL);
  1017. static DEVICE_ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL);
  1018. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  1019. static struct attribute *f71805f_attributes[] = {
  1020. &sensor_dev_attr_in0_input.dev_attr.attr,
  1021. &sensor_dev_attr_in0_max.dev_attr.attr,
  1022. &sensor_dev_attr_in0_min.dev_attr.attr,
  1023. &sensor_dev_attr_in1_input.dev_attr.attr,
  1024. &sensor_dev_attr_in1_max.dev_attr.attr,
  1025. &sensor_dev_attr_in1_min.dev_attr.attr,
  1026. &sensor_dev_attr_in2_input.dev_attr.attr,
  1027. &sensor_dev_attr_in2_max.dev_attr.attr,
  1028. &sensor_dev_attr_in2_min.dev_attr.attr,
  1029. &sensor_dev_attr_in3_input.dev_attr.attr,
  1030. &sensor_dev_attr_in3_max.dev_attr.attr,
  1031. &sensor_dev_attr_in3_min.dev_attr.attr,
  1032. &sensor_dev_attr_in5_input.dev_attr.attr,
  1033. &sensor_dev_attr_in5_max.dev_attr.attr,
  1034. &sensor_dev_attr_in5_min.dev_attr.attr,
  1035. &sensor_dev_attr_in6_input.dev_attr.attr,
  1036. &sensor_dev_attr_in6_max.dev_attr.attr,
  1037. &sensor_dev_attr_in6_min.dev_attr.attr,
  1038. &sensor_dev_attr_in7_input.dev_attr.attr,
  1039. &sensor_dev_attr_in7_max.dev_attr.attr,
  1040. &sensor_dev_attr_in7_min.dev_attr.attr,
  1041. &sensor_dev_attr_fan1_input.dev_attr.attr,
  1042. &sensor_dev_attr_fan1_min.dev_attr.attr,
  1043. &sensor_dev_attr_fan1_alarm.dev_attr.attr,
  1044. &sensor_dev_attr_fan1_target.dev_attr.attr,
  1045. &sensor_dev_attr_fan2_input.dev_attr.attr,
  1046. &sensor_dev_attr_fan2_min.dev_attr.attr,
  1047. &sensor_dev_attr_fan2_alarm.dev_attr.attr,
  1048. &sensor_dev_attr_fan2_target.dev_attr.attr,
  1049. &sensor_dev_attr_fan3_input.dev_attr.attr,
  1050. &sensor_dev_attr_fan3_min.dev_attr.attr,
  1051. &sensor_dev_attr_fan3_alarm.dev_attr.attr,
  1052. &sensor_dev_attr_fan3_target.dev_attr.attr,
  1053. &sensor_dev_attr_pwm1.dev_attr.attr,
  1054. &sensor_dev_attr_pwm1_enable.dev_attr.attr,
  1055. &sensor_dev_attr_pwm1_mode.dev_attr.attr,
  1056. &sensor_dev_attr_pwm2.dev_attr.attr,
  1057. &sensor_dev_attr_pwm2_enable.dev_attr.attr,
  1058. &sensor_dev_attr_pwm2_mode.dev_attr.attr,
  1059. &sensor_dev_attr_pwm3.dev_attr.attr,
  1060. &sensor_dev_attr_pwm3_enable.dev_attr.attr,
  1061. &sensor_dev_attr_pwm3_mode.dev_attr.attr,
  1062. &sensor_dev_attr_temp1_input.dev_attr.attr,
  1063. &sensor_dev_attr_temp1_max.dev_attr.attr,
  1064. &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
  1065. &sensor_dev_attr_temp1_type.dev_attr.attr,
  1066. &sensor_dev_attr_temp2_input.dev_attr.attr,
  1067. &sensor_dev_attr_temp2_max.dev_attr.attr,
  1068. &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
  1069. &sensor_dev_attr_temp2_type.dev_attr.attr,
  1070. &sensor_dev_attr_temp3_input.dev_attr.attr,
  1071. &sensor_dev_attr_temp3_max.dev_attr.attr,
  1072. &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
  1073. &sensor_dev_attr_temp3_type.dev_attr.attr,
  1074. &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
  1075. &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr,
  1076. &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
  1077. &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr,
  1078. &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
  1079. &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr,
  1080. &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
  1081. &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr,
  1082. &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
  1083. &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr,
  1084. &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
  1085. &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr,
  1086. &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
  1087. &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr,
  1088. &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
  1089. &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr,
  1090. &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
  1091. &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr,
  1092. &sensor_dev_attr_in0_alarm.dev_attr.attr,
  1093. &sensor_dev_attr_in1_alarm.dev_attr.attr,
  1094. &sensor_dev_attr_in2_alarm.dev_attr.attr,
  1095. &sensor_dev_attr_in3_alarm.dev_attr.attr,
  1096. &sensor_dev_attr_in5_alarm.dev_attr.attr,
  1097. &sensor_dev_attr_in6_alarm.dev_attr.attr,
  1098. &sensor_dev_attr_in7_alarm.dev_attr.attr,
  1099. &dev_attr_alarms_in.attr,
  1100. &sensor_dev_attr_temp1_alarm.dev_attr.attr,
  1101. &sensor_dev_attr_temp2_alarm.dev_attr.attr,
  1102. &sensor_dev_attr_temp3_alarm.dev_attr.attr,
  1103. &dev_attr_alarms_temp.attr,
  1104. &dev_attr_alarms_fan.attr,
  1105. &dev_attr_name.attr,
  1106. NULL
  1107. };
  1108. static const struct attribute_group f71805f_group = {
  1109. .attrs = f71805f_attributes,
  1110. };
  1111. static struct attribute *f71805f_attributes_optin[4][5] = {
  1112. {
  1113. &sensor_dev_attr_in4_input.dev_attr.attr,
  1114. &sensor_dev_attr_in4_max.dev_attr.attr,
  1115. &sensor_dev_attr_in4_min.dev_attr.attr,
  1116. &sensor_dev_attr_in4_alarm.dev_attr.attr,
  1117. NULL
  1118. }, {
  1119. &sensor_dev_attr_in8_input.dev_attr.attr,
  1120. &sensor_dev_attr_in8_max.dev_attr.attr,
  1121. &sensor_dev_attr_in8_min.dev_attr.attr,
  1122. &sensor_dev_attr_in8_alarm.dev_attr.attr,
  1123. NULL
  1124. }, {
  1125. &sensor_dev_attr_in9_input.dev_attr.attr,
  1126. &sensor_dev_attr_in9_max.dev_attr.attr,
  1127. &sensor_dev_attr_in9_min.dev_attr.attr,
  1128. &sensor_dev_attr_in9_alarm.dev_attr.attr,
  1129. NULL
  1130. }, {
  1131. &sensor_dev_attr_in10_input.dev_attr.attr,
  1132. &sensor_dev_attr_in10_max.dev_attr.attr,
  1133. &sensor_dev_attr_in10_min.dev_attr.attr,
  1134. &sensor_dev_attr_in10_alarm.dev_attr.attr,
  1135. NULL
  1136. }
  1137. };
  1138. static const struct attribute_group f71805f_group_optin[4] = {
  1139. { .attrs = f71805f_attributes_optin[0] },
  1140. { .attrs = f71805f_attributes_optin[1] },
  1141. { .attrs = f71805f_attributes_optin[2] },
  1142. { .attrs = f71805f_attributes_optin[3] },
  1143. };
  1144. /*
  1145. * We don't include pwm_freq files in the arrays above, because they must be
  1146. * created conditionally (only if pwm_mode is 1 == PWM)
  1147. */
  1148. static struct attribute *f71805f_attributes_pwm_freq[] = {
  1149. &sensor_dev_attr_pwm1_freq.dev_attr.attr,
  1150. &sensor_dev_attr_pwm2_freq.dev_attr.attr,
  1151. &sensor_dev_attr_pwm3_freq.dev_attr.attr,
  1152. NULL
  1153. };
  1154. static const struct attribute_group f71805f_group_pwm_freq = {
  1155. .attrs = f71805f_attributes_pwm_freq,
  1156. };
  1157. /* We also need an indexed access to pwmN files to toggle writability */
  1158. static struct attribute *f71805f_attr_pwm[] = {
  1159. &sensor_dev_attr_pwm1.dev_attr.attr,
  1160. &sensor_dev_attr_pwm2.dev_attr.attr,
  1161. &sensor_dev_attr_pwm3.dev_attr.attr,
  1162. };
  1163. /*
  1164. * Device registration and initialization
  1165. */
  1166. static void f71805f_init_device(struct f71805f_data *data)
  1167. {
  1168. u8 reg;
  1169. int i;
  1170. reg = f71805f_read8(data, F71805F_REG_START);
  1171. if ((reg & 0x41) != 0x01) {
  1172. pr_debug("Starting monitoring operations\n");
  1173. f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
  1174. }
  1175. /*
  1176. * Fan monitoring can be disabled. If it is, we won't be polling
  1177. * the register values, and won't create the related sysfs files.
  1178. */
  1179. for (i = 0; i < 3; i++) {
  1180. data->fan_ctrl[i] = f71805f_read8(data,
  1181. F71805F_REG_FAN_CTRL(i));
  1182. /*
  1183. * Clear latch full bit, else "speed mode" fan speed control
  1184. * doesn't work
  1185. */
  1186. if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) {
  1187. data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL;
  1188. f71805f_write8(data, F71805F_REG_FAN_CTRL(i),
  1189. data->fan_ctrl[i]);
  1190. }
  1191. }
  1192. }
  1193. static int f71805f_probe(struct platform_device *pdev)
  1194. {
  1195. struct f71805f_sio_data *sio_data = dev_get_platdata(&pdev->dev);
  1196. struct f71805f_data *data;
  1197. struct resource *res;
  1198. int i, err;
  1199. static const char * const names[] = {
  1200. "f71805f",
  1201. "f71872f",
  1202. };
  1203. data = devm_kzalloc(&pdev->dev, sizeof(struct f71805f_data),
  1204. GFP_KERNEL);
  1205. if (!data)
  1206. return -ENOMEM;
  1207. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1208. if (!devm_request_region(&pdev->dev, res->start + ADDR_REG_OFFSET, 2,
  1209. DRVNAME)) {
  1210. dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n",
  1211. (unsigned long)(res->start + ADDR_REG_OFFSET),
  1212. (unsigned long)(res->start + ADDR_REG_OFFSET + 1));
  1213. return -EBUSY;
  1214. }
  1215. data->addr = res->start;
  1216. data->name = names[sio_data->kind];
  1217. mutex_init(&data->update_lock);
  1218. platform_set_drvdata(pdev, data);
  1219. /* Some voltage inputs depend on chip model and configuration */
  1220. switch (sio_data->kind) {
  1221. case f71805f:
  1222. data->has_in = 0x1ff;
  1223. break;
  1224. case f71872f:
  1225. data->has_in = 0x6ef;
  1226. if (sio_data->fnsel1 & 0x01)
  1227. data->has_in |= (1 << 4); /* in4 */
  1228. if (sio_data->fnsel1 & 0x02)
  1229. data->has_in |= (1 << 8); /* in8 */
  1230. break;
  1231. }
  1232. /* Initialize the F71805F chip */
  1233. f71805f_init_device(data);
  1234. /* Register sysfs interface files */
  1235. err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group);
  1236. if (err)
  1237. return err;
  1238. if (data->has_in & (1 << 4)) { /* in4 */
  1239. err = sysfs_create_group(&pdev->dev.kobj,
  1240. &f71805f_group_optin[0]);
  1241. if (err)
  1242. goto exit_remove_files;
  1243. }
  1244. if (data->has_in & (1 << 8)) { /* in8 */
  1245. err = sysfs_create_group(&pdev->dev.kobj,
  1246. &f71805f_group_optin[1]);
  1247. if (err)
  1248. goto exit_remove_files;
  1249. }
  1250. if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */
  1251. err = sysfs_create_group(&pdev->dev.kobj,
  1252. &f71805f_group_optin[2]);
  1253. if (err)
  1254. goto exit_remove_files;
  1255. }
  1256. if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */
  1257. err = sysfs_create_group(&pdev->dev.kobj,
  1258. &f71805f_group_optin[3]);
  1259. if (err)
  1260. goto exit_remove_files;
  1261. }
  1262. for (i = 0; i < 3; i++) {
  1263. /* If control mode is PWM, create pwm_freq file */
  1264. if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
  1265. err = sysfs_create_file(&pdev->dev.kobj,
  1266. f71805f_attributes_pwm_freq[i]);
  1267. if (err)
  1268. goto exit_remove_files;
  1269. }
  1270. /* If PWM is in manual mode, add write permission */
  1271. if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
  1272. err = sysfs_chmod_file(&pdev->dev.kobj,
  1273. f71805f_attr_pwm[i],
  1274. S_IRUGO | S_IWUSR);
  1275. if (err) {
  1276. dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
  1277. i + 1);
  1278. goto exit_remove_files;
  1279. }
  1280. }
  1281. }
  1282. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  1283. if (IS_ERR(data->hwmon_dev)) {
  1284. err = PTR_ERR(data->hwmon_dev);
  1285. dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
  1286. goto exit_remove_files;
  1287. }
  1288. return 0;
  1289. exit_remove_files:
  1290. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
  1291. for (i = 0; i < 4; i++)
  1292. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
  1293. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
  1294. return err;
  1295. }
  1296. static int f71805f_remove(struct platform_device *pdev)
  1297. {
  1298. struct f71805f_data *data = platform_get_drvdata(pdev);
  1299. int i;
  1300. hwmon_device_unregister(data->hwmon_dev);
  1301. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
  1302. for (i = 0; i < 4; i++)
  1303. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
  1304. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
  1305. return 0;
  1306. }
  1307. static struct platform_driver f71805f_driver = {
  1308. .driver = {
  1309. .name = DRVNAME,
  1310. },
  1311. .probe = f71805f_probe,
  1312. .remove = f71805f_remove,
  1313. };
  1314. static int __init f71805f_device_add(unsigned short address,
  1315. const struct f71805f_sio_data *sio_data)
  1316. {
  1317. struct resource res = {
  1318. .start = address,
  1319. .end = address + REGION_LENGTH - 1,
  1320. .flags = IORESOURCE_IO,
  1321. };
  1322. int err;
  1323. pdev = platform_device_alloc(DRVNAME, address);
  1324. if (!pdev) {
  1325. err = -ENOMEM;
  1326. pr_err("Device allocation failed\n");
  1327. goto exit;
  1328. }
  1329. res.name = pdev->name;
  1330. err = acpi_check_resource_conflict(&res);
  1331. if (err)
  1332. goto exit_device_put;
  1333. err = platform_device_add_resources(pdev, &res, 1);
  1334. if (err) {
  1335. pr_err("Device resource addition failed (%d)\n", err);
  1336. goto exit_device_put;
  1337. }
  1338. err = platform_device_add_data(pdev, sio_data,
  1339. sizeof(struct f71805f_sio_data));
  1340. if (err) {
  1341. pr_err("Platform data allocation failed\n");
  1342. goto exit_device_put;
  1343. }
  1344. err = platform_device_add(pdev);
  1345. if (err) {
  1346. pr_err("Device addition failed (%d)\n", err);
  1347. goto exit_device_put;
  1348. }
  1349. return 0;
  1350. exit_device_put:
  1351. platform_device_put(pdev);
  1352. exit:
  1353. return err;
  1354. }
  1355. static int __init f71805f_find(int sioaddr, unsigned short *address,
  1356. struct f71805f_sio_data *sio_data)
  1357. {
  1358. int err;
  1359. u16 devid;
  1360. static const char * const names[] = {
  1361. "F71805F/FG",
  1362. "F71872F/FG or F71806F/FG",
  1363. };
  1364. err = superio_enter(sioaddr);
  1365. if (err)
  1366. return err;
  1367. err = -ENODEV;
  1368. devid = superio_inw(sioaddr, SIO_REG_MANID);
  1369. if (devid != SIO_FINTEK_ID)
  1370. goto exit;
  1371. devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
  1372. switch (devid) {
  1373. case SIO_F71805F_ID:
  1374. sio_data->kind = f71805f;
  1375. break;
  1376. case SIO_F71872F_ID:
  1377. sio_data->kind = f71872f;
  1378. sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1);
  1379. break;
  1380. default:
  1381. pr_info("Unsupported Fintek device, skipping\n");
  1382. goto exit;
  1383. }
  1384. superio_select(sioaddr, F71805F_LD_HWM);
  1385. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  1386. pr_warn("Device not activated, skipping\n");
  1387. goto exit;
  1388. }
  1389. *address = superio_inw(sioaddr, SIO_REG_ADDR);
  1390. if (*address == 0) {
  1391. pr_warn("Base address not set, skipping\n");
  1392. goto exit;
  1393. }
  1394. *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
  1395. err = 0;
  1396. pr_info("Found %s chip at %#x, revision %u\n",
  1397. names[sio_data->kind], *address,
  1398. superio_inb(sioaddr, SIO_REG_DEVREV));
  1399. exit:
  1400. superio_exit(sioaddr);
  1401. return err;
  1402. }
  1403. static int __init f71805f_init(void)
  1404. {
  1405. int err;
  1406. unsigned short address;
  1407. struct f71805f_sio_data sio_data;
  1408. if (f71805f_find(0x2e, &address, &sio_data)
  1409. && f71805f_find(0x4e, &address, &sio_data))
  1410. return -ENODEV;
  1411. err = platform_driver_register(&f71805f_driver);
  1412. if (err)
  1413. goto exit;
  1414. /* Sets global pdev as a side effect */
  1415. err = f71805f_device_add(address, &sio_data);
  1416. if (err)
  1417. goto exit_driver;
  1418. return 0;
  1419. exit_driver:
  1420. platform_driver_unregister(&f71805f_driver);
  1421. exit:
  1422. return err;
  1423. }
  1424. static void __exit f71805f_exit(void)
  1425. {
  1426. platform_device_unregister(pdev);
  1427. platform_driver_unregister(&f71805f_driver);
  1428. }
  1429. MODULE_AUTHOR("Jean Delvare <[email protected]>");
  1430. MODULE_LICENSE("GPL");
  1431. MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver");
  1432. module_init(f71805f_init);
  1433. module_exit(f71805f_exit);