leds-qpnp-wled.c 77 KB

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  1. /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/kernel.h>
  15. #include <linux/regmap.h>
  16. #include <linux/errno.h>
  17. #include <linux/leds.h>
  18. #include <linux/slab.h>
  19. #include <linux/of_device.h>
  20. #include <linux/of_address.h>
  21. #include <linux/spmi.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/err.h>
  26. #include <linux/delay.h>
  27. #include <linux/leds-qpnp-wled.h>
  28. #include <linux/qpnp/qpnp-revid.h>
  29. /* base addresses */
  30. #define QPNP_WLED_CTRL_BASE "qpnp-wled-ctrl-base"
  31. #define QPNP_WLED_SINK_BASE "qpnp-wled-sink-base"
  32. /* ctrl registers */
  33. #define QPNP_WLED_FAULT_STATUS(b) (b + 0x08)
  34. #define QPNP_WLED_INT_RT_STS(b) (b + 0x10)
  35. #define QPNP_WLED_EXT_PIN_CTL(b) (b + 0x45)
  36. #define QPNP_WLED_EN_REG(b) (b + 0x46)
  37. #define QPNP_WLED_FDBK_OP_REG(b) (b + 0x48)
  38. #define QPNP_WLED_VREF_REG(b) (b + 0x49)
  39. #define QPNP_WLED_BOOST_DUTY_REG(b) (b + 0x4B)
  40. #define QPNP_WLED_SWITCH_FREQ_REG(b) (b + 0x4C)
  41. #define QPNP_WLED_OVP_REG(b) (b + 0x4D)
  42. #define QPNP_WLED_ILIM_REG(b) (b + 0x4E)
  43. #define QPNP_WLED_AMOLED_VOUT_REG(b) (b + 0x4F)
  44. #define QPNP_WLED_SOFTSTART_RAMP_DLY(b) (b + 0x53)
  45. #define QPNP_WLED_VLOOP_COMP_RES_REG(b) (b + 0x55)
  46. #define QPNP_WLED_VLOOP_COMP_GM_REG(b) (b + 0x56)
  47. #define QPNP_WLED_EN_PSM_REG(b) (b + 0x5A)
  48. #define QPNP_WLED_PSM_CTRL_REG(b) (b + 0x5B)
  49. #define QPNP_WLED_LCD_AUTO_PFM_REG(b) (b + 0x5C)
  50. #define QPNP_WLED_SC_PRO_REG(b) (b + 0x5E)
  51. #define QPNP_WLED_SWIRE_AVDD_REG(b) (b + 0x5F)
  52. #define QPNP_WLED_CTRL_SPARE_REG(b) (b + 0xDF)
  53. #define QPNP_WLED_TEST1_REG(b) (b + 0xE2)
  54. #define QPNP_WLED_TEST4_REG(b) (b + 0xE5)
  55. #define QPNP_WLED_REF_7P7_TRIM_REG(b) (b + 0xF2)
  56. #define QPNP_WLED_7P7_TRIM_MASK GENMASK(3, 0)
  57. #define QPNP_WLED_EN_MASK 0x7F
  58. #define QPNP_WLED_EN_SHIFT 7
  59. #define QPNP_WLED_FDBK_OP_MASK 0xF8
  60. #define QPNP_WLED_VREF_MASK GENMASK(3, 0)
  61. #define QPNP_WLED_VLOOP_COMP_RES_MASK 0xF0
  62. #define QPNP_WLED_VLOOP_COMP_RES_OVERWRITE 0x80
  63. #define QPNP_WLED_LOOP_COMP_RES_STEP_KOHM 20
  64. #define QPNP_WLED_LOOP_COMP_RES_MIN_KOHM 20
  65. #define QPNP_WLED_LOOP_COMP_RES_MAX_KOHM 320
  66. #define QPNP_WLED_VLOOP_COMP_GM_MASK GENMASK(3, 0)
  67. #define QPNP_WLED_VLOOP_COMP_GM_OVERWRITE 0x80
  68. #define QPNP_WLED_VLOOP_COMP_AUTO_GM_EN BIT(6)
  69. #define QPNP_WLED_VLOOP_COMP_AUTO_GM_THRESH_MASK GENMASK(5, 4)
  70. #define QPNP_WLED_VLOOP_COMP_AUTO_GM_THRESH_SHIFT 4
  71. #define QPNP_WLED_LOOP_EA_GM_DFLT_AMOLED_PMI8994 0x03
  72. #define QPNP_WLED_LOOP_GM_DFLT_AMOLED_PMI8998 0x09
  73. #define QPNP_WLED_LOOP_GM_DFLT_WLED 0x09
  74. #define QPNP_WLED_LOOP_EA_GM_MIN 0x0
  75. #define QPNP_WLED_LOOP_EA_GM_MAX 0xF
  76. #define QPNP_WLED_LOOP_AUTO_GM_THRESH_MAX 3
  77. #define QPNP_WLED_LOOP_AUTO_GM_DFLT_THRESH 1
  78. #define QPNP_WLED_VREF_PSM_MASK 0xF8
  79. #define QPNP_WLED_VREF_PSM_STEP_MV 50
  80. #define QPNP_WLED_VREF_PSM_MIN_MV 400
  81. #define QPNP_WLED_VREF_PSM_MAX_MV 750
  82. #define QPNP_WLED_VREF_PSM_DFLT_AMOLED_MV 450
  83. #define QPNP_WLED_PSM_OVERWRITE_BIT BIT(7)
  84. #define QPNP_WLED_LCD_AUTO_PFM_DFLT_THRESH 1
  85. #define QPNP_WLED_LCD_AUTO_PFM_THRESH_MAX 0xF
  86. #define QPNP_WLED_LCD_AUTO_PFM_EN_SHIFT 7
  87. #define QPNP_WLED_LCD_AUTO_PFM_EN_BIT BIT(7)
  88. #define QPNP_WLED_LCD_AUTO_PFM_THRESH_MASK GENMASK(3, 0)
  89. #define QPNP_WLED_EN_PSM_BIT BIT(7)
  90. #define QPNP_WLED_EXT_PIN_CTL_BIT BIT(7)
  91. #define QPNP_WLED_ILIM_MASK GENMASK(2, 0)
  92. #define QPNP_WLED_ILIM_OVERWRITE BIT(7)
  93. #define PMI8994_WLED_ILIM_MIN_MA 105
  94. #define PMI8994_WLED_ILIM_MAX_MA 1980
  95. #define PMI8994_WLED_DFLT_ILIM_MA 980
  96. #define PMI8994_AMOLED_DFLT_ILIM_MA 385
  97. #define PMI8998_WLED_ILIM_MAX_MA 1500
  98. #define PMI8998_WLED_DFLT_ILIM_MA 970
  99. #define PMI8998_AMOLED_DFLT_ILIM_MA 620
  100. #define QPNP_WLED_BOOST_DUTY_MASK 0xFC
  101. #define QPNP_WLED_BOOST_DUTY_STEP_NS 52
  102. #define QPNP_WLED_BOOST_DUTY_MIN_NS 26
  103. #define QPNP_WLED_BOOST_DUTY_MAX_NS 156
  104. #define QPNP_WLED_DEF_BOOST_DUTY_NS 104
  105. #define QPNP_WLED_SWITCH_FREQ_MASK GENMASK(3, 0)
  106. #define QPNP_WLED_SWITCH_FREQ_OVERWRITE BIT(7)
  107. #define QPNP_WLED_OVP_MASK GENMASK(1, 0)
  108. #define QPNP_WLED_TEST4_EN_DEB_BYPASS_ILIM_BIT BIT(6)
  109. #define QPNP_WLED_TEST4_EN_SH_FOR_SS_BIT BIT(5)
  110. #define QPNP_WLED_TEST4_EN_CLAMP_BIT BIT(4)
  111. #define QPNP_WLED_TEST4_EN_SOFT_START_BIT BIT(1)
  112. #define QPNP_WLED_TEST4_EN_VREF_UP \
  113. (QPNP_WLED_TEST4_EN_SH_FOR_SS_BIT | \
  114. QPNP_WLED_TEST4_EN_CLAMP_BIT | \
  115. QPNP_WLED_TEST4_EN_SOFT_START_BIT)
  116. #define QPNP_WLED_TEST4_EN_IIND_UP 0x1
  117. #define QPNP_WLED_ILIM_FAULT_BIT BIT(0)
  118. #define QPNP_WLED_OVP_FAULT_BIT BIT(1)
  119. #define QPNP_WLED_SC_FAULT_BIT BIT(2)
  120. #define QPNP_WLED_OVP_FLT_RT_STS_BIT BIT(1)
  121. /* QPNP_WLED_SOFTSTART_RAMP_DLY */
  122. #define SOFTSTART_OVERWRITE_BIT BIT(7)
  123. #define SOFTSTART_RAMP_DELAY_MASK GENMASK(2, 0)
  124. /* sink registers */
  125. #define QPNP_WLED_CURR_SINK_REG(b) (b + 0x46)
  126. #define QPNP_WLED_SYNC_REG(b) (b + 0x47)
  127. #define QPNP_WLED_MOD_REG(b) (b + 0x4A)
  128. #define QPNP_WLED_HYB_THRES_REG(b) (b + 0x4B)
  129. #define QPNP_WLED_MOD_EN_REG(b, n) (b + 0x50 + (n * 0x10))
  130. #define QPNP_WLED_SYNC_DLY_REG(b, n) (QPNP_WLED_MOD_EN_REG(b, n) + 0x01)
  131. #define QPNP_WLED_FS_CURR_REG(b, n) (QPNP_WLED_MOD_EN_REG(b, n) + 0x02)
  132. #define QPNP_WLED_CABC_REG(b, n) (QPNP_WLED_MOD_EN_REG(b, n) + 0x06)
  133. #define QPNP_WLED_BRIGHT_LSB_REG(b, n) (QPNP_WLED_MOD_EN_REG(b, n) + 0x07)
  134. #define QPNP_WLED_BRIGHT_MSB_REG(b, n) (QPNP_WLED_MOD_EN_REG(b, n) + 0x08)
  135. #define QPNP_WLED_SINK_TEST5_REG(b) (b + 0xE6)
  136. #define QPNP_WLED_MOD_FREQ_1200_KHZ 1200
  137. #define QPNP_WLED_MOD_FREQ_2400_KHZ 2400
  138. #define QPNP_WLED_MOD_FREQ_9600_KHZ 9600
  139. #define QPNP_WLED_MOD_FREQ_19200_KHZ 19200
  140. #define QPNP_WLED_MOD_FREQ_MASK 0x3F
  141. #define QPNP_WLED_MOD_FREQ_SHIFT 6
  142. #define QPNP_WLED_ACC_CLK_FREQ_MASK 0xE7
  143. #define QPNP_WLED_ACC_CLK_FREQ_SHIFT 3
  144. #define QPNP_WLED_PHASE_STAG_MASK 0xDF
  145. #define QPNP_WLED_PHASE_STAG_SHIFT 5
  146. #define QPNP_WLED_DIM_RES_MASK 0xFD
  147. #define QPNP_WLED_DIM_RES_SHIFT 1
  148. #define QPNP_WLED_DIM_HYB_MASK 0xFB
  149. #define QPNP_WLED_DIM_HYB_SHIFT 2
  150. #define QPNP_WLED_DIM_ANA_MASK 0xFE
  151. #define QPNP_WLED_HYB_THRES_MASK 0xF8
  152. #define QPNP_WLED_HYB_THRES_MIN 78
  153. #define QPNP_WLED_DEF_HYB_THRES 625
  154. #define QPNP_WLED_HYB_THRES_MAX 10000
  155. #define QPNP_WLED_MOD_EN_MASK 0x7F
  156. #define QPNP_WLED_MOD_EN_SHFT 7
  157. #define QPNP_WLED_MOD_EN 1
  158. #define QPNP_WLED_GATE_DRV_MASK 0xFE
  159. #define QPNP_WLED_SYNC_DLY_MASK GENMASK(2, 0)
  160. #define QPNP_WLED_SYNC_DLY_MIN_US 0
  161. #define QPNP_WLED_SYNC_DLY_MAX_US 1400
  162. #define QPNP_WLED_SYNC_DLY_STEP_US 200
  163. #define QPNP_WLED_DEF_SYNC_DLY_US 400
  164. #define QPNP_WLED_FS_CURR_MASK GENMASK(3, 0)
  165. #define QPNP_WLED_FS_CURR_MIN_UA 0
  166. #define QPNP_WLED_FS_CURR_MAX_UA 30000
  167. #define QPNP_WLED_FS_CURR_STEP_UA 2500
  168. #define QPNP_WLED_CABC_MASK 0x80
  169. #define QPNP_WLED_CABC_SHIFT 7
  170. #define QPNP_WLED_CURR_SINK_SHIFT 4
  171. #define QPNP_WLED_CURR_SINK_MASK GENMASK(7, 4)
  172. #define QPNP_WLED_BRIGHT_LSB_MASK 0xFF
  173. #define QPNP_WLED_BRIGHT_MSB_SHIFT 8
  174. #define QPNP_WLED_BRIGHT_MSB_MASK 0x0F
  175. #define QPNP_WLED_SYNC 0x0F
  176. #define QPNP_WLED_SYNC_RESET 0x00
  177. #define QPNP_WLED_SINK_TEST5_HYB 0x14
  178. #define QPNP_WLED_SINK_TEST5_DIG 0x1E
  179. #define QPNP_WLED_SINK_TEST5_HVG_PULL_STR_BIT BIT(3)
  180. #define QPNP_WLED_SWITCH_FREQ_800_KHZ_CODE 0x0B
  181. #define QPNP_WLED_SWITCH_FREQ_1600_KHZ_CODE 0x05
  182. #define QPNP_WLED_DISP_SEL_REG(b) (b + 0x44)
  183. #define QPNP_WLED_MODULE_RDY_REG(b) (b + 0x45)
  184. #define QPNP_WLED_MODULE_EN_REG(b) (b + 0x46)
  185. #define QPNP_WLED_MODULE_RDY_MASK 0x7F
  186. #define QPNP_WLED_MODULE_RDY_SHIFT 7
  187. #define QPNP_WLED_MODULE_EN_MASK BIT(7)
  188. #define QPNP_WLED_MODULE_EN_SHIFT 7
  189. #define QPNP_WLED_DISP_SEL_MASK 0x7F
  190. #define QPNP_WLED_DISP_SEL_SHIFT 7
  191. #define QPNP_WLED_EN_SC_DEB_CYCLES_MASK 0x79
  192. #define QPNP_WLED_EN_DEB_CYCLES_MASK 0xF9
  193. #define QPNP_WLED_EN_SC_SHIFT 7
  194. #define QPNP_WLED_SC_PRO_EN_DSCHGR 0x8
  195. #define QPNP_WLED_SC_DEB_CYCLES_MIN 2
  196. #define QPNP_WLED_SC_DEB_CYCLES_MAX 16
  197. #define QPNP_WLED_SC_DEB_CYCLES_SUB 2
  198. #define QPNP_WLED_SC_DEB_CYCLES_DFLT 4
  199. #define QPNP_WLED_EXT_FET_DTEST2 0x09
  200. #define QPNP_WLED_SEC_ACCESS_REG(b) (b + 0xD0)
  201. #define QPNP_WLED_SEC_UNLOCK 0xA5
  202. #define NUM_DDIC_CODES 256
  203. #define QPNP_WLED_MAX_STRINGS 4
  204. #define QPNP_PM660_WLED_MAX_STRINGS 3
  205. #define WLED_MAX_LEVEL_4095 4095
  206. #define QPNP_WLED_RAMP_DLY_MS 20
  207. #define QPNP_WLED_TRIGGER_NONE "none"
  208. #define QPNP_WLED_STR_SIZE 20
  209. #define QPNP_WLED_MIN_MSLEEP 20
  210. #define QPNP_WLED_SC_DLY_MS 20
  211. #define QPNP_WLED_SOFT_START_DLY_US 10000
  212. #define NUM_SUPPORTED_AVDD_VOLTAGES 6
  213. #define QPNP_WLED_DFLT_AVDD_MV 7600
  214. #define QPNP_WLED_AVDD_MIN_MV 5650
  215. #define QPNP_WLED_AVDD_MAX_MV 7900
  216. #define QPNP_WLED_AVDD_STEP_MV 150
  217. #define QPNP_WLED_AVDD_MIN_TRIM_VAL 0x0
  218. #define QPNP_WLED_AVDD_MAX_TRIM_VAL 0xF
  219. #define QPNP_WLED_AVDD_SEL_SPMI_BIT BIT(7)
  220. #define QPNP_WLED_AVDD_SET_BIT BIT(4)
  221. #define NUM_SUPPORTED_OVP_THRESHOLDS 4
  222. #define NUM_SUPPORTED_ILIM_THRESHOLDS 8
  223. #define QPNP_WLED_AVDD_MV_TO_REG(val) \
  224. ((val - QPNP_WLED_AVDD_MIN_MV) / QPNP_WLED_AVDD_STEP_MV)
  225. /* output feedback mode */
  226. enum qpnp_wled_fdbk_op {
  227. QPNP_WLED_FDBK_AUTO,
  228. QPNP_WLED_FDBK_WLED1,
  229. QPNP_WLED_FDBK_WLED2,
  230. QPNP_WLED_FDBK_WLED3,
  231. QPNP_WLED_FDBK_WLED4,
  232. };
  233. /* dimming modes */
  234. enum qpnp_wled_dim_mode {
  235. QPNP_WLED_DIM_ANALOG,
  236. QPNP_WLED_DIM_DIGITAL,
  237. QPNP_WLED_DIM_HYBRID,
  238. };
  239. /* wled ctrl debug registers */
  240. static u8 qpnp_wled_ctrl_dbg_regs[] = {
  241. 0x44, 0x46, 0x48, 0x49, 0x4b, 0x4c, 0x4d, 0x4e, 0x50, 0x51, 0x52, 0x53,
  242. 0x54, 0x55, 0x56, 0x57, 0x58, 0x5a, 0x5b, 0x5d, 0x5e, 0xe2
  243. };
  244. /* wled sink debug registers */
  245. static u8 qpnp_wled_sink_dbg_regs[] = {
  246. 0x46, 0x47, 0x48, 0x4a, 0x4b,
  247. 0x50, 0x51, 0x52, 0x53, 0x56, 0x57, 0x58,
  248. 0x60, 0x61, 0x62, 0x63, 0x66, 0x67, 0x68,
  249. 0x70, 0x71, 0x72, 0x73, 0x76, 0x77, 0x78,
  250. 0x80, 0x81, 0x82, 0x83, 0x86, 0x87, 0x88,
  251. 0xe6,
  252. };
  253. static int qpnp_wled_avdd_target_voltages[NUM_SUPPORTED_AVDD_VOLTAGES] = {
  254. 7900, 7600, 7300, 6400, 6100, 5800,
  255. };
  256. static u8 qpnp_wled_ovp_reg_settings[NUM_SUPPORTED_AVDD_VOLTAGES] = {
  257. 0x0, 0x0, 0x1, 0x2, 0x2, 0x3,
  258. };
  259. static int qpnp_wled_avdd_trim_adjustments[NUM_SUPPORTED_AVDD_VOLTAGES] = {
  260. 3, 0, -2, 7, 3, 3,
  261. };
  262. static int qpnp_wled_ovp_thresholds_pmi8994[NUM_SUPPORTED_OVP_THRESHOLDS] = {
  263. 31000, 29500, 19400, 17800,
  264. };
  265. static int qpnp_wled_ovp_thresholds_pmi8998[NUM_SUPPORTED_OVP_THRESHOLDS] = {
  266. 31100, 29600, 19600, 18100,
  267. };
  268. static int qpnp_wled_ilim_settings_pmi8994[NUM_SUPPORTED_ILIM_THRESHOLDS] = {
  269. 105, 385, 660, 980, 1150, 1420, 1700, 1980,
  270. };
  271. static int qpnp_wled_ilim_settings_pmi8998[NUM_SUPPORTED_ILIM_THRESHOLDS] = {
  272. 105, 280, 450, 620, 970, 1150, 1300, 1500,
  273. };
  274. struct wled_vref_setting {
  275. u32 min_uv;
  276. u32 max_uv;
  277. u32 step_uv;
  278. u32 default_uv;
  279. };
  280. static struct wled_vref_setting vref_setting_pmi8994 = {
  281. 300000, 675000, 25000, 350000,
  282. };
  283. static struct wled_vref_setting vref_setting_pmi8998 = {
  284. 60000, 397500, 22500, 127500,
  285. };
  286. /**
  287. * qpnp_wled - wed data structure
  288. * @ cdev - led class device
  289. * @ pdev - platform device
  290. * @ work - worker for led operation
  291. * @ wq - workqueue for setting brightness level
  292. * @ lock - mutex lock for exclusive access
  293. * @ fdbk_op - output feedback mode
  294. * @ dim_mode - dimming mode
  295. * @ ovp_irq - over voltage protection irq
  296. * @ sc_irq - short circuit irq
  297. * @ sc_cnt - short circuit irq count
  298. * @ avdd_target_voltage_mv - target voltage for AVDD module in mV
  299. * @ ctrl_base - base address for wled ctrl
  300. * @ sink_base - base address for wled sink
  301. * @ mod_freq_khz - modulator frequency in KHZ
  302. * @ hyb_thres - threshold for hybrid dimming
  303. * @ sync_dly_us - sync delay in us
  304. * @ vref_uv - ref voltage in uv
  305. * @ vref_psm_mv - ref psm voltage in mv
  306. * @ loop_comp_res_kohm - control to select the compensation resistor
  307. * @ loop_ea_gm - control to select the gm for the gm stage in control loop
  308. * @ sc_deb_cycles - debounce time for short circuit detection
  309. * @ switch_freq_khz - switching frequency in KHZ
  310. * @ ovp_mv - over voltage protection in mv
  311. * @ ilim_ma - current limiter in ma
  312. * @ boost_duty_ns - boost duty cycle in ns
  313. * @ fs_curr_ua - full scale current in ua
  314. * @ ramp_ms - delay between ramp steps in ms
  315. * @ ramp_step - ramp step size
  316. * @ cons_sync_write_delay_us - delay between two consecutive writes to SYNC
  317. * @ auto_calibration_ovp_count - OVP fault irq count to run auto calibration
  318. * @ max_strings - Number of strings supported in WLED peripheral
  319. * @ prev_level - Previous brightness level
  320. * @ brt_map_table - Brightness map table
  321. * @ strings - supported list of strings
  322. * @ num_strings - number of strings
  323. * @ loop_auto_gm_thresh - the clamping level for auto gm
  324. * @ lcd_auto_pfm_thresh - the threshold for lcd auto pfm mode
  325. * @ loop_auto_gm_en - select if auto gm is enabled
  326. * @ lcd_auto_pfm_en - select if auto pfm is enabled in lcd mode
  327. * @ lcd_psm_ctrl - select if psm needs to be controlled in lcd mode
  328. * @ avdd_mode_spmi - enable avdd programming via spmi
  329. * @ en_9b_dim_res - enable or disable 9bit dimming
  330. * @ en_phase_stag - enable or disable phase staggering
  331. * @ en_cabc - enable or disable cabc
  332. * @ disp_type_amoled - type of display: LCD/AMOLED
  333. * @ en_ext_pfet_sc_pro - enable sc protection on external pfet
  334. * @ prev_state - previous state of WLED
  335. * @ stepper_en - Flag to enable stepper algorithm
  336. * @ ovp_irq_disabled - OVP interrupt disable status
  337. * @ auto_calib_enabled - Flag to enable auto calibration feature
  338. * @ auto_calib_done - Flag to indicate auto calibration is done
  339. * @ module_dis_perm - Flat to keep module permanently disabled
  340. * @ start_ovp_fault_time - Time when the OVP fault first occurred
  341. */
  342. struct qpnp_wled {
  343. struct led_classdev cdev;
  344. struct platform_device *pdev;
  345. struct regmap *regmap;
  346. struct pmic_revid_data *pmic_rev_id;
  347. struct work_struct work;
  348. struct workqueue_struct *wq;
  349. struct mutex lock;
  350. struct mutex bus_lock;
  351. enum qpnp_wled_fdbk_op fdbk_op;
  352. enum qpnp_wled_dim_mode dim_mode;
  353. int ovp_irq;
  354. int sc_irq;
  355. u32 sc_cnt;
  356. u32 avdd_target_voltage_mv;
  357. u16 ctrl_base;
  358. u16 sink_base;
  359. u16 mod_freq_khz;
  360. u16 hyb_thres;
  361. u16 sync_dly_us;
  362. u32 vref_uv;
  363. u16 vref_psm_mv;
  364. u16 loop_comp_res_kohm;
  365. u16 loop_ea_gm;
  366. u16 sc_deb_cycles;
  367. u16 switch_freq_khz;
  368. u16 ovp_mv;
  369. u16 ilim_ma;
  370. u16 boost_duty_ns;
  371. u16 fs_curr_ua;
  372. u16 ramp_ms;
  373. u16 ramp_step;
  374. u16 cons_sync_write_delay_us;
  375. u16 auto_calibration_ovp_count;
  376. u16 max_strings;
  377. u16 prev_level;
  378. u16 *brt_map_table;
  379. u8 strings[QPNP_WLED_MAX_STRINGS];
  380. u8 num_strings;
  381. u8 loop_auto_gm_thresh;
  382. u8 lcd_auto_pfm_thresh;
  383. bool loop_auto_gm_en;
  384. bool lcd_auto_pfm_en;
  385. bool lcd_psm_ctrl;
  386. bool avdd_mode_spmi;
  387. bool en_9b_dim_res;
  388. bool en_phase_stag;
  389. bool en_cabc;
  390. bool disp_type_amoled;
  391. bool en_ext_pfet_sc_pro;
  392. bool prev_state;
  393. bool stepper_en;
  394. bool ovp_irq_disabled;
  395. bool secure_mode;
  396. bool auto_calib_enabled;
  397. bool auto_calib_done;
  398. bool module_dis_perm;
  399. ktime_t start_ovp_fault_time;
  400. };
  401. static int qpnp_wled_step_delay_us = 52000;
  402. module_param_named(
  403. total_step_delay_us, qpnp_wled_step_delay_us, int, 0600
  404. );
  405. static int qpnp_wled_step_size_threshold = 3;
  406. module_param_named(
  407. step_size_threshold, qpnp_wled_step_size_threshold, int, 0600
  408. );
  409. static int qpnp_wled_step_delay_gain = 2;
  410. module_param_named(
  411. step_delay_gain, qpnp_wled_step_delay_gain, int, 0600
  412. );
  413. /* helper to read a pmic register */
  414. static int qpnp_wled_read_reg(struct qpnp_wled *wled, u16 addr, u8 *data)
  415. {
  416. int rc;
  417. uint val;
  418. rc = regmap_read(wled->regmap, addr, &val);
  419. if (rc < 0) {
  420. dev_err(&wled->pdev->dev,
  421. "Error reading address: %x(%d)\n", addr, rc);
  422. return rc;
  423. }
  424. *data = (u8)val;
  425. return 0;
  426. }
  427. /* helper to write a pmic register */
  428. static int qpnp_wled_write_reg(struct qpnp_wled *wled, u16 addr, u8 data)
  429. {
  430. int rc;
  431. mutex_lock(&wled->bus_lock);
  432. rc = regmap_write(wled->regmap, addr, data);
  433. if (rc < 0) {
  434. dev_err(&wled->pdev->dev, "Error writing address: %x(%d)\n",
  435. addr, rc);
  436. goto out;
  437. }
  438. dev_dbg(&wled->pdev->dev, "wrote: WLED_0x%x = 0x%x\n", addr, data);
  439. out:
  440. mutex_unlock(&wled->bus_lock);
  441. return rc;
  442. }
  443. static int qpnp_wled_masked_write_reg(struct qpnp_wled *wled, u16 addr,
  444. u8 mask, u8 data)
  445. {
  446. int rc;
  447. mutex_lock(&wled->bus_lock);
  448. rc = regmap_update_bits(wled->regmap, addr, mask, data);
  449. if (rc < 0) {
  450. dev_err(&wled->pdev->dev, "Error writing address: %x(%d)\n",
  451. addr, rc);
  452. goto out;
  453. }
  454. dev_dbg(&wled->pdev->dev, "wrote: WLED_0x%x = 0x%x\n", addr, data);
  455. out:
  456. mutex_unlock(&wled->bus_lock);
  457. return rc;
  458. }
  459. static int qpnp_wled_sec_write_reg(struct qpnp_wled *wled, u16 addr, u8 data)
  460. {
  461. int rc;
  462. u8 reg = QPNP_WLED_SEC_UNLOCK;
  463. u16 base_addr = addr & 0xFF00;
  464. mutex_lock(&wled->bus_lock);
  465. rc = regmap_write(wled->regmap, QPNP_WLED_SEC_ACCESS_REG(base_addr),
  466. reg);
  467. if (rc < 0) {
  468. dev_err(&wled->pdev->dev, "Error writing address: %x(%d)\n",
  469. QPNP_WLED_SEC_ACCESS_REG(base_addr), rc);
  470. goto out;
  471. }
  472. rc = regmap_write(wled->regmap, addr, data);
  473. if (rc < 0) {
  474. dev_err(&wled->pdev->dev, "Error writing address: %x(%d)\n",
  475. addr, rc);
  476. goto out;
  477. }
  478. dev_dbg(&wled->pdev->dev, "wrote: WLED_0x%x = 0x%x\n", addr, data);
  479. out:
  480. mutex_unlock(&wled->bus_lock);
  481. return rc;
  482. }
  483. static int qpnp_wled_swire_avdd_config(struct qpnp_wled *wled)
  484. {
  485. int rc;
  486. u8 val;
  487. if (wled->pmic_rev_id->pmic_subtype != PMI8998_SUBTYPE &&
  488. wled->pmic_rev_id->pmic_subtype != PM660L_SUBTYPE)
  489. return 0;
  490. if (!wled->disp_type_amoled || wled->avdd_mode_spmi)
  491. return 0;
  492. val = QPNP_WLED_AVDD_MV_TO_REG(wled->avdd_target_voltage_mv);
  493. rc = qpnp_wled_write_reg(wled,
  494. QPNP_WLED_SWIRE_AVDD_REG(wled->ctrl_base), val);
  495. return rc;
  496. }
  497. static int qpnp_wled_sync_reg_toggle(struct qpnp_wled *wled)
  498. {
  499. int rc;
  500. u8 reg;
  501. /* sync */
  502. reg = QPNP_WLED_SYNC;
  503. rc = qpnp_wled_write_reg(wled, QPNP_WLED_SYNC_REG(wled->sink_base),
  504. reg);
  505. if (rc < 0)
  506. return rc;
  507. if (wled->cons_sync_write_delay_us)
  508. usleep_range(wled->cons_sync_write_delay_us,
  509. wled->cons_sync_write_delay_us + 1);
  510. reg = QPNP_WLED_SYNC_RESET;
  511. rc = qpnp_wled_write_reg(wled, QPNP_WLED_SYNC_REG(wled->sink_base),
  512. reg);
  513. if (rc < 0)
  514. return rc;
  515. return 0;
  516. }
  517. /* set wled to a level of brightness */
  518. static int qpnp_wled_set_level(struct qpnp_wled *wled, int level)
  519. {
  520. int i, rc;
  521. u8 reg;
  522. u16 low_limit = WLED_MAX_LEVEL_4095 * 4 / 1000;
  523. /* WLED's lower limit of operation is 0.4% */
  524. if (level > 0 && level < low_limit)
  525. level = low_limit;
  526. /* set brightness registers */
  527. for (i = 0; i < wled->max_strings; i++) {
  528. reg = level & QPNP_WLED_BRIGHT_LSB_MASK;
  529. rc = qpnp_wled_write_reg(wled,
  530. QPNP_WLED_BRIGHT_LSB_REG(wled->sink_base,
  531. wled->strings[i]), reg);
  532. if (rc < 0)
  533. return rc;
  534. reg = level >> QPNP_WLED_BRIGHT_MSB_SHIFT;
  535. reg = reg & QPNP_WLED_BRIGHT_MSB_MASK;
  536. rc = qpnp_wled_write_reg(wled,
  537. QPNP_WLED_BRIGHT_MSB_REG(wled->sink_base,
  538. wled->strings[i]), reg);
  539. if (rc < 0)
  540. return rc;
  541. }
  542. rc = qpnp_wled_sync_reg_toggle(wled);
  543. if (rc < 0) {
  544. dev_err(&wled->pdev->dev, "Failed to toggle sync reg %d\n", rc);
  545. return rc;
  546. }
  547. pr_debug("level:%d\n", level);
  548. return 0;
  549. }
  550. static int qpnp_wled_set_map_level(struct qpnp_wled *wled, int level)
  551. {
  552. int rc, i;
  553. if (level < wled->prev_level) {
  554. for (i = wled->prev_level; i >= level; i--) {
  555. rc = qpnp_wled_set_level(wled, wled->brt_map_table[i]);
  556. if (rc < 0) {
  557. pr_err("set brightness level failed, rc:%d\n",
  558. rc);
  559. return rc;
  560. }
  561. }
  562. } else if (level > wled->prev_level) {
  563. for (i = wled->prev_level; i <= level; i++) {
  564. rc = qpnp_wled_set_level(wled, wled->brt_map_table[i]);
  565. if (rc < 0) {
  566. pr_err("set brightness level failed, rc:%d\n",
  567. rc);
  568. return rc;
  569. }
  570. }
  571. }
  572. return 0;
  573. }
  574. static int qpnp_wled_set_step_level(struct qpnp_wled *wled, int new_level)
  575. {
  576. int rc, i, num_steps, delay_us;
  577. u16 level, start_level, end_level, step_size;
  578. bool level_inc = false;
  579. level = wled->prev_level;
  580. start_level = wled->brt_map_table[level];
  581. end_level = wled->brt_map_table[new_level];
  582. level_inc = (new_level > level);
  583. num_steps = abs(start_level - end_level);
  584. if (!num_steps)
  585. return 0;
  586. delay_us = qpnp_wled_step_delay_us / num_steps;
  587. pr_debug("level goes from [%d %d] num_steps: %d, delay: %d\n",
  588. start_level, end_level, num_steps, delay_us);
  589. if (delay_us < 500) {
  590. step_size = 1000 / delay_us;
  591. num_steps = num_steps / step_size;
  592. delay_us = 1000;
  593. } else {
  594. if (num_steps < qpnp_wled_step_size_threshold)
  595. delay_us *= qpnp_wled_step_delay_gain;
  596. step_size = 1;
  597. }
  598. i = start_level;
  599. while (num_steps--) {
  600. if (level_inc)
  601. i += step_size;
  602. else
  603. i -= step_size;
  604. rc = qpnp_wled_set_level(wled, i);
  605. if (rc < 0)
  606. return rc;
  607. if (delay_us > 0) {
  608. if (delay_us < 20000)
  609. usleep_range(delay_us, delay_us + 1);
  610. else
  611. msleep(delay_us / USEC_PER_MSEC);
  612. }
  613. }
  614. if (i != end_level) {
  615. i = end_level;
  616. rc = qpnp_wled_set_level(wled, i);
  617. if (rc < 0)
  618. return rc;
  619. }
  620. return 0;
  621. }
  622. static int qpnp_wled_psm_config(struct qpnp_wled *wled, bool enable)
  623. {
  624. int rc;
  625. if (!wled->lcd_psm_ctrl)
  626. return 0;
  627. rc = qpnp_wled_masked_write_reg(wled,
  628. QPNP_WLED_EN_PSM_REG(wled->ctrl_base),
  629. QPNP_WLED_EN_PSM_BIT,
  630. enable ? QPNP_WLED_EN_PSM_BIT : 0);
  631. if (rc < 0)
  632. return rc;
  633. rc = qpnp_wled_masked_write_reg(wled,
  634. QPNP_WLED_PSM_CTRL_REG(wled->ctrl_base),
  635. QPNP_WLED_PSM_OVERWRITE_BIT,
  636. enable ? QPNP_WLED_PSM_OVERWRITE_BIT : 0);
  637. if (rc < 0)
  638. return rc;
  639. return 0;
  640. }
  641. static int qpnp_wled_module_en(struct qpnp_wled *wled,
  642. u16 base_addr, bool state)
  643. {
  644. int rc;
  645. if (wled->module_dis_perm)
  646. return 0;
  647. rc = qpnp_wled_masked_write_reg(wled,
  648. QPNP_WLED_MODULE_EN_REG(base_addr),
  649. QPNP_WLED_MODULE_EN_MASK,
  650. state << QPNP_WLED_MODULE_EN_SHIFT);
  651. if (rc < 0)
  652. return rc;
  653. /*
  654. * Wait for at least 10ms before enabling OVP fault interrupt after
  655. * enabling the module so that soft start is completed. Also, this
  656. * delay can be used to control PSM during enable when required. Keep
  657. * OVP interrupt disabled when the module is disabled.
  658. */
  659. if (state) {
  660. usleep_range(QPNP_WLED_SOFT_START_DLY_US,
  661. QPNP_WLED_SOFT_START_DLY_US + 1000);
  662. rc = qpnp_wled_psm_config(wled, false);
  663. if (rc < 0)
  664. return rc;
  665. if (wled->ovp_irq > 0 && wled->ovp_irq_disabled) {
  666. enable_irq(wled->ovp_irq);
  667. wled->ovp_irq_disabled = false;
  668. }
  669. } else {
  670. if (wled->ovp_irq > 0 && !wled->ovp_irq_disabled) {
  671. disable_irq(wled->ovp_irq);
  672. wled->ovp_irq_disabled = true;
  673. }
  674. rc = qpnp_wled_psm_config(wled, true);
  675. if (rc < 0)
  676. return rc;
  677. }
  678. return 0;
  679. }
  680. /* sysfs store function for ramp */
  681. static ssize_t qpnp_wled_ramp_store(struct device *dev,
  682. struct device_attribute *attr, const char *buf, size_t count)
  683. {
  684. struct qpnp_wled *wled = dev_get_drvdata(dev);
  685. int i, rc;
  686. mutex_lock(&wled->lock);
  687. if (!wled->cdev.brightness) {
  688. rc = qpnp_wled_module_en(wled, wled->ctrl_base, true);
  689. if (rc) {
  690. dev_err(&wled->pdev->dev, "wled enable failed\n");
  691. goto unlock_mutex;
  692. }
  693. }
  694. /* ramp up */
  695. for (i = 0; i <= wled->cdev.max_brightness;) {
  696. rc = qpnp_wled_set_level(wled, i);
  697. if (rc) {
  698. dev_err(&wled->pdev->dev, "wled set level failed\n");
  699. goto restore_brightness;
  700. }
  701. if (wled->ramp_ms < QPNP_WLED_MIN_MSLEEP)
  702. usleep_range(wled->ramp_ms * USEC_PER_MSEC,
  703. wled->ramp_ms * USEC_PER_MSEC);
  704. else
  705. msleep(wled->ramp_ms);
  706. if (i == wled->cdev.max_brightness)
  707. break;
  708. i += wled->ramp_step;
  709. if (i > wled->cdev.max_brightness)
  710. i = wled->cdev.max_brightness;
  711. }
  712. /* ramp down */
  713. for (i = wled->cdev.max_brightness; i >= 0;) {
  714. rc = qpnp_wled_set_level(wled, i);
  715. if (rc) {
  716. dev_err(&wled->pdev->dev, "wled set level failed\n");
  717. goto restore_brightness;
  718. }
  719. if (wled->ramp_ms < QPNP_WLED_MIN_MSLEEP)
  720. usleep_range(wled->ramp_ms * USEC_PER_MSEC,
  721. wled->ramp_ms * USEC_PER_MSEC);
  722. else
  723. msleep(wled->ramp_ms);
  724. if (i == 0)
  725. break;
  726. i -= wled->ramp_step;
  727. if (i < 0)
  728. i = 0;
  729. }
  730. dev_info(&wled->pdev->dev, "wled ramp complete\n");
  731. restore_brightness:
  732. /* restore the old brightness */
  733. qpnp_wled_set_level(wled, wled->cdev.brightness);
  734. if (!wled->cdev.brightness) {
  735. rc = qpnp_wled_module_en(wled, wled->ctrl_base, false);
  736. if (rc)
  737. dev_err(&wled->pdev->dev, "wled enable failed\n");
  738. }
  739. unlock_mutex:
  740. mutex_unlock(&wled->lock);
  741. return count;
  742. }
  743. static int qpnp_wled_dump_regs(struct qpnp_wled *wled, u16 base_addr,
  744. u8 dbg_regs[], u8 size, char *label,
  745. int count, char *buf)
  746. {
  747. int i, rc;
  748. u8 reg;
  749. for (i = 0; i < size; i++) {
  750. rc = qpnp_wled_read_reg(wled, base_addr + dbg_regs[i], &reg);
  751. if (rc < 0)
  752. return rc;
  753. count += snprintf(buf + count, PAGE_SIZE - count,
  754. "%s: REG_0x%x = 0x%x\n", label,
  755. base_addr + dbg_regs[i], reg);
  756. if (count >= PAGE_SIZE)
  757. return PAGE_SIZE - 1;
  758. }
  759. return count;
  760. }
  761. /* sysfs show function for debug registers */
  762. static ssize_t qpnp_wled_dump_regs_show(struct device *dev,
  763. struct device_attribute *attr, char *buf)
  764. {
  765. struct qpnp_wled *wled = dev_get_drvdata(dev);
  766. int count = 0;
  767. count = qpnp_wled_dump_regs(wled, wled->ctrl_base,
  768. qpnp_wled_ctrl_dbg_regs,
  769. ARRAY_SIZE(qpnp_wled_ctrl_dbg_regs),
  770. "wled_ctrl", count, buf);
  771. if (count < 0 || count == PAGE_SIZE - 1)
  772. return count;
  773. count = qpnp_wled_dump_regs(wled, wled->sink_base,
  774. qpnp_wled_sink_dbg_regs,
  775. ARRAY_SIZE(qpnp_wled_sink_dbg_regs),
  776. "wled_sink", count, buf);
  777. if (count < 0 || count == PAGE_SIZE - 1)
  778. return count;
  779. return count;
  780. }
  781. /* sysfs show function for ramp delay in each step */
  782. static ssize_t qpnp_wled_ramp_ms_show(struct device *dev,
  783. struct device_attribute *attr, char *buf)
  784. {
  785. struct qpnp_wled *wled = dev_get_drvdata(dev);
  786. return snprintf(buf, PAGE_SIZE, "%d\n", wled->ramp_ms);
  787. }
  788. /* sysfs store function for ramp delay in each step */
  789. static ssize_t qpnp_wled_ramp_ms_store(struct device *dev,
  790. struct device_attribute *attr, const char *buf, size_t count)
  791. {
  792. struct qpnp_wled *wled = dev_get_drvdata(dev);
  793. int data, rc;
  794. rc = kstrtoint(buf, 10, &data);
  795. if (rc)
  796. return rc;
  797. wled->ramp_ms = data;
  798. return count;
  799. }
  800. /* sysfs show function for ramp step */
  801. static ssize_t qpnp_wled_ramp_step_show(struct device *dev,
  802. struct device_attribute *attr, char *buf)
  803. {
  804. struct qpnp_wled *wled = dev_get_drvdata(dev);
  805. return snprintf(buf, PAGE_SIZE, "%d\n", wled->ramp_step);
  806. }
  807. /* sysfs store function for ramp step */
  808. static ssize_t qpnp_wled_ramp_step_store(struct device *dev,
  809. struct device_attribute *attr, const char *buf, size_t count)
  810. {
  811. struct qpnp_wled *wled = dev_get_drvdata(dev);
  812. int data, rc;
  813. rc = kstrtoint(buf, 10, &data);
  814. if (rc)
  815. return rc;
  816. wled->ramp_step = data;
  817. return count;
  818. }
  819. /* sysfs function for irqs enable/disable */
  820. static ssize_t qpnp_wled_irq_control(struct device *dev,
  821. struct device_attribute *attr,
  822. const char *buf, size_t count)
  823. {
  824. struct qpnp_wled *wled = dev_get_drvdata(dev);
  825. int val, rc;
  826. rc = kstrtouint(buf, 0, &val);
  827. if (rc < 0)
  828. return rc;
  829. if (val != 0 && val != 1)
  830. return count;
  831. mutex_lock(&wled->lock);
  832. /* Disable irqs */
  833. if (val == 1 && !wled->secure_mode) {
  834. if (wled->ovp_irq > 0)
  835. disable_irq(wled->ovp_irq);
  836. if (wled->sc_irq > 0)
  837. disable_irq(wled->sc_irq);
  838. wled->secure_mode = true;
  839. } else if (val == 0 && wled->secure_mode) {
  840. if (wled->ovp_irq > 0)
  841. enable_irq(wled->ovp_irq);
  842. if (wled->sc_irq > 0)
  843. enable_irq(wled->sc_irq);
  844. wled->secure_mode = false;
  845. }
  846. mutex_unlock(&wled->lock);
  847. return count;
  848. }
  849. /* sysfs show function for dim mode */
  850. static ssize_t qpnp_wled_dim_mode_show(struct device *dev,
  851. struct device_attribute *attr, char *buf)
  852. {
  853. struct qpnp_wled *wled = dev_get_drvdata(dev);
  854. char *str;
  855. if (wled->dim_mode == QPNP_WLED_DIM_ANALOG)
  856. str = "analog";
  857. else if (wled->dim_mode == QPNP_WLED_DIM_DIGITAL)
  858. str = "digital";
  859. else
  860. str = "hybrid";
  861. return snprintf(buf, PAGE_SIZE, "%s\n", str);
  862. }
  863. /* sysfs store function for dim mode*/
  864. static ssize_t qpnp_wled_dim_mode_store(struct device *dev,
  865. struct device_attribute *attr, const char *buf, size_t count)
  866. {
  867. struct qpnp_wled *wled = dev_get_drvdata(dev);
  868. char str[QPNP_WLED_STR_SIZE + 1];
  869. int rc, temp;
  870. u8 reg;
  871. if (snprintf(str, QPNP_WLED_STR_SIZE, "%s", buf) > QPNP_WLED_STR_SIZE)
  872. return -EINVAL;
  873. if (strcmp(str, "analog") == 0)
  874. temp = QPNP_WLED_DIM_ANALOG;
  875. else if (strcmp(str, "digital") == 0)
  876. temp = QPNP_WLED_DIM_DIGITAL;
  877. else
  878. temp = QPNP_WLED_DIM_HYBRID;
  879. if (temp == wled->dim_mode)
  880. return count;
  881. rc = qpnp_wled_read_reg(wled, QPNP_WLED_MOD_REG(wled->sink_base), &reg);
  882. if (rc < 0)
  883. return rc;
  884. if (temp == QPNP_WLED_DIM_HYBRID) {
  885. reg &= QPNP_WLED_DIM_HYB_MASK;
  886. reg |= (1 << QPNP_WLED_DIM_HYB_SHIFT);
  887. } else {
  888. reg &= QPNP_WLED_DIM_HYB_MASK;
  889. reg |= (0 << QPNP_WLED_DIM_HYB_SHIFT);
  890. reg &= QPNP_WLED_DIM_ANA_MASK;
  891. reg |= temp;
  892. }
  893. rc = qpnp_wled_write_reg(wled, QPNP_WLED_MOD_REG(wled->sink_base), reg);
  894. if (rc)
  895. return rc;
  896. wled->dim_mode = temp;
  897. return count;
  898. }
  899. /* sysfs show function for full scale current in ua*/
  900. static ssize_t qpnp_wled_fs_curr_ua_show(struct device *dev,
  901. struct device_attribute *attr, char *buf)
  902. {
  903. struct qpnp_wled *wled = dev_get_drvdata(dev);
  904. return snprintf(buf, PAGE_SIZE, "%d\n", wled->fs_curr_ua);
  905. }
  906. /* sysfs store function for full scale current in ua*/
  907. static ssize_t qpnp_wled_fs_curr_ua_store(struct device *dev,
  908. struct device_attribute *attr, const char *buf, size_t count)
  909. {
  910. struct qpnp_wled *wled = dev_get_drvdata(dev);
  911. int data, i, rc;
  912. u8 reg;
  913. rc = kstrtoint(buf, 10, &data);
  914. if (rc)
  915. return rc;
  916. for (i = 0; i < wled->max_strings; i++) {
  917. if (data < QPNP_WLED_FS_CURR_MIN_UA)
  918. data = QPNP_WLED_FS_CURR_MIN_UA;
  919. else if (data > QPNP_WLED_FS_CURR_MAX_UA)
  920. data = QPNP_WLED_FS_CURR_MAX_UA;
  921. reg = data / QPNP_WLED_FS_CURR_STEP_UA;
  922. rc = qpnp_wled_masked_write_reg(wled,
  923. QPNP_WLED_FS_CURR_REG(wled->sink_base, i),
  924. QPNP_WLED_FS_CURR_MASK, reg);
  925. if (rc < 0)
  926. return rc;
  927. }
  928. wled->fs_curr_ua = data;
  929. rc = qpnp_wled_sync_reg_toggle(wled);
  930. if (rc < 0) {
  931. dev_err(&wled->pdev->dev, "Failed to toggle sync reg %d\n", rc);
  932. return rc;
  933. }
  934. return count;
  935. }
  936. /* sysfs attributes exported by wled */
  937. static struct device_attribute qpnp_wled_attrs[] = {
  938. __ATTR(dump_regs, 0664, qpnp_wled_dump_regs_show, NULL),
  939. __ATTR(dim_mode, 0664, qpnp_wled_dim_mode_show,
  940. qpnp_wled_dim_mode_store),
  941. __ATTR(fs_curr_ua, 0664, qpnp_wled_fs_curr_ua_show,
  942. qpnp_wled_fs_curr_ua_store),
  943. __ATTR(start_ramp, 0664, NULL, qpnp_wled_ramp_store),
  944. __ATTR(ramp_ms, 0664, qpnp_wled_ramp_ms_show, qpnp_wled_ramp_ms_store),
  945. __ATTR(ramp_step, 0664, qpnp_wled_ramp_step_show,
  946. qpnp_wled_ramp_step_store),
  947. __ATTR(secure_mode, 0664, NULL, qpnp_wled_irq_control),
  948. };
  949. /* worker for setting wled brightness */
  950. static void qpnp_wled_work(struct work_struct *work)
  951. {
  952. struct qpnp_wled *wled;
  953. int level, level_255, rc;
  954. wled = container_of(work, struct qpnp_wled, work);
  955. mutex_lock(&wled->lock);
  956. if (wled->secure_mode) {
  957. pr_debug("Can not set brightness in secure_mode\n ");
  958. goto unlock_mutex;
  959. }
  960. level = wled->cdev.brightness;
  961. if (wled->brt_map_table) {
  962. /*
  963. * Change the 12 bit level to 8 bit level and use the mapped
  964. * values for 12 bit level from brightness map table.
  965. */
  966. level_255 = DIV_ROUND_CLOSEST(level, 16);
  967. if (level_255 > 255)
  968. level_255 = 255;
  969. pr_debug("level: %d level_255: %d\n", level, level_255);
  970. if (wled->stepper_en)
  971. rc = qpnp_wled_set_step_level(wled, level_255);
  972. else
  973. rc = qpnp_wled_set_map_level(wled, level_255);
  974. if (rc) {
  975. dev_err(&wled->pdev->dev, "wled set level failed\n");
  976. goto unlock_mutex;
  977. }
  978. wled->prev_level = level_255;
  979. } else if (level) {
  980. rc = qpnp_wled_set_level(wled, level);
  981. if (rc) {
  982. dev_err(&wled->pdev->dev, "wled set level failed\n");
  983. goto unlock_mutex;
  984. }
  985. }
  986. if (!!level != wled->prev_state) {
  987. if (!!level) {
  988. /*
  989. * For AMOLED display in pmi8998, SWIRE_AVDD_DEFAULT has
  990. * to be reconfigured every time the module is enabled.
  991. */
  992. rc = qpnp_wled_swire_avdd_config(wled);
  993. if (rc < 0) {
  994. pr_err("Write to SWIRE_AVDD_DEFAULT register failed rc:%d\n",
  995. rc);
  996. goto unlock_mutex;
  997. }
  998. }
  999. rc = qpnp_wled_module_en(wled, wled->ctrl_base, !!level);
  1000. if (rc) {
  1001. dev_err(&wled->pdev->dev, "wled %sable failed\n",
  1002. level ? "en" : "dis");
  1003. goto unlock_mutex;
  1004. }
  1005. }
  1006. wled->prev_state = !!level;
  1007. unlock_mutex:
  1008. mutex_unlock(&wled->lock);
  1009. }
  1010. /* get api registered with led classdev for wled brightness */
  1011. static enum led_brightness qpnp_wled_get(struct led_classdev *led_cdev)
  1012. {
  1013. struct qpnp_wled *wled;
  1014. wled = container_of(led_cdev, struct qpnp_wled, cdev);
  1015. return wled->cdev.brightness;
  1016. }
  1017. /* set api registered with led classdev for wled brightness */
  1018. static void qpnp_wled_set(struct led_classdev *led_cdev,
  1019. enum led_brightness level)
  1020. {
  1021. struct qpnp_wled *wled;
  1022. wled = container_of(led_cdev, struct qpnp_wled, cdev);
  1023. if (level < LED_OFF)
  1024. level = LED_OFF;
  1025. else if (level > wled->cdev.max_brightness)
  1026. level = wled->cdev.max_brightness;
  1027. wled->cdev.brightness = level;
  1028. queue_work(wled->wq, &wled->work);
  1029. }
  1030. static int qpnp_wled_set_disp(struct qpnp_wled *wled, u16 base_addr)
  1031. {
  1032. int rc;
  1033. u8 reg;
  1034. /* display type */
  1035. rc = qpnp_wled_read_reg(wled, QPNP_WLED_DISP_SEL_REG(base_addr), &reg);
  1036. if (rc < 0)
  1037. return rc;
  1038. reg &= QPNP_WLED_DISP_SEL_MASK;
  1039. reg |= (wled->disp_type_amoled << QPNP_WLED_DISP_SEL_SHIFT);
  1040. rc = qpnp_wled_sec_write_reg(wled, QPNP_WLED_DISP_SEL_REG(base_addr),
  1041. reg);
  1042. if (rc)
  1043. return rc;
  1044. if (wled->disp_type_amoled) {
  1045. /* Configure the PSM CTRL register for AMOLED */
  1046. if (wled->vref_psm_mv < QPNP_WLED_VREF_PSM_MIN_MV)
  1047. wled->vref_psm_mv = QPNP_WLED_VREF_PSM_MIN_MV;
  1048. else if (wled->vref_psm_mv > QPNP_WLED_VREF_PSM_MAX_MV)
  1049. wled->vref_psm_mv = QPNP_WLED_VREF_PSM_MAX_MV;
  1050. rc = qpnp_wled_read_reg(wled,
  1051. QPNP_WLED_PSM_CTRL_REG(wled->ctrl_base), &reg);
  1052. if (rc < 0)
  1053. return rc;
  1054. reg &= QPNP_WLED_VREF_PSM_MASK;
  1055. reg |= ((wled->vref_psm_mv - QPNP_WLED_VREF_PSM_MIN_MV)/
  1056. QPNP_WLED_VREF_PSM_STEP_MV);
  1057. reg |= QPNP_WLED_PSM_OVERWRITE_BIT;
  1058. rc = qpnp_wled_write_reg(wled,
  1059. QPNP_WLED_PSM_CTRL_REG(wled->ctrl_base), reg);
  1060. if (rc)
  1061. return rc;
  1062. /* Configure the VLOOP COMP RES register for AMOLED */
  1063. if (wled->loop_comp_res_kohm < QPNP_WLED_LOOP_COMP_RES_MIN_KOHM)
  1064. wled->loop_comp_res_kohm =
  1065. QPNP_WLED_LOOP_COMP_RES_MIN_KOHM;
  1066. else if (wled->loop_comp_res_kohm >
  1067. QPNP_WLED_LOOP_COMP_RES_MAX_KOHM)
  1068. wled->loop_comp_res_kohm =
  1069. QPNP_WLED_LOOP_COMP_RES_MAX_KOHM;
  1070. rc = qpnp_wled_read_reg(wled,
  1071. QPNP_WLED_VLOOP_COMP_RES_REG(wled->ctrl_base),
  1072. &reg);
  1073. if (rc < 0)
  1074. return rc;
  1075. reg &= QPNP_WLED_VLOOP_COMP_RES_MASK;
  1076. reg |= ((wled->loop_comp_res_kohm -
  1077. QPNP_WLED_LOOP_COMP_RES_MIN_KOHM)/
  1078. QPNP_WLED_LOOP_COMP_RES_STEP_KOHM);
  1079. reg |= QPNP_WLED_VLOOP_COMP_RES_OVERWRITE;
  1080. rc = qpnp_wled_write_reg(wled,
  1081. QPNP_WLED_VLOOP_COMP_RES_REG(wled->ctrl_base),
  1082. reg);
  1083. if (rc)
  1084. return rc;
  1085. /* Configure the CTRL TEST4 register for AMOLED */
  1086. rc = qpnp_wled_read_reg(wled,
  1087. QPNP_WLED_TEST4_REG(wled->ctrl_base), &reg);
  1088. if (rc < 0)
  1089. return rc;
  1090. reg |= QPNP_WLED_TEST4_EN_IIND_UP;
  1091. rc = qpnp_wled_sec_write_reg(wled,
  1092. QPNP_WLED_TEST4_REG(base_addr), reg);
  1093. if (rc)
  1094. return rc;
  1095. } else {
  1096. /*
  1097. * enable VREF_UP to avoid false ovp on low brightness for LCD
  1098. */
  1099. reg = QPNP_WLED_TEST4_EN_VREF_UP
  1100. | QPNP_WLED_TEST4_EN_DEB_BYPASS_ILIM_BIT;
  1101. rc = qpnp_wled_sec_write_reg(wled,
  1102. QPNP_WLED_TEST4_REG(base_addr), reg);
  1103. if (rc)
  1104. return rc;
  1105. }
  1106. return 0;
  1107. }
  1108. #define AUTO_CALIB_BRIGHTNESS 200
  1109. static int wled_auto_calibrate(struct qpnp_wled *wled)
  1110. {
  1111. int rc = 0, i;
  1112. u8 reg = 0, sink_config = 0, sink_test = 0, sink_valid = 0, int_sts;
  1113. /* read configured sink configuration */
  1114. rc = qpnp_wled_read_reg(wled,
  1115. QPNP_WLED_CURR_SINK_REG(wled->sink_base), &sink_config);
  1116. if (rc < 0) {
  1117. pr_err("Failed to read SINK configuration rc=%d\n", rc);
  1118. goto failed_calib;
  1119. }
  1120. /* disable the module before starting calibration */
  1121. rc = qpnp_wled_masked_write_reg(wled,
  1122. QPNP_WLED_MODULE_EN_REG(wled->ctrl_base),
  1123. QPNP_WLED_MODULE_EN_MASK, 0);
  1124. if (rc < 0) {
  1125. pr_err("Failed to disable WLED module rc=%d\n", rc);
  1126. goto failed_calib;
  1127. }
  1128. /* set low brightness across all sinks */
  1129. rc = qpnp_wled_set_level(wled, AUTO_CALIB_BRIGHTNESS);
  1130. if (rc < 0) {
  1131. pr_err("Failed to set brightness for calibration rc=%d\n", rc);
  1132. goto failed_calib;
  1133. }
  1134. if (wled->en_cabc) {
  1135. for (i = 0; i < wled->max_strings; i++) {
  1136. reg = 0;
  1137. rc = qpnp_wled_masked_write_reg(wled,
  1138. QPNP_WLED_CABC_REG(wled->sink_base, i),
  1139. QPNP_WLED_CABC_MASK, reg);
  1140. if (rc < 0)
  1141. goto failed_calib;
  1142. }
  1143. }
  1144. /* disable all sinks */
  1145. rc = qpnp_wled_write_reg(wled,
  1146. QPNP_WLED_CURR_SINK_REG(wled->sink_base), 0);
  1147. if (rc < 0) {
  1148. pr_err("Failed to disable all sinks rc=%d\n", rc);
  1149. goto failed_calib;
  1150. }
  1151. /* iterate through the strings one by one */
  1152. for (i = 0; i < wled->max_strings; i++) {
  1153. sink_test = 1 << (QPNP_WLED_CURR_SINK_SHIFT + i);
  1154. /* Enable feedback control */
  1155. rc = qpnp_wled_write_reg(wled,
  1156. QPNP_WLED_FDBK_OP_REG(wled->ctrl_base),
  1157. i + 1);
  1158. if (rc < 0) {
  1159. pr_err("Failed to enable feedback for SINK %d rc = %d\n",
  1160. i + 1, rc);
  1161. goto failed_calib;
  1162. }
  1163. /* enable the sink */
  1164. rc = qpnp_wled_write_reg(wled,
  1165. QPNP_WLED_CURR_SINK_REG(wled->sink_base), sink_test);
  1166. if (rc < 0) {
  1167. pr_err("Failed to configure SINK %d rc=%d\n",
  1168. i + 1, rc);
  1169. goto failed_calib;
  1170. }
  1171. /* Enable the module */
  1172. rc = qpnp_wled_masked_write_reg(wled,
  1173. QPNP_WLED_MODULE_EN_REG(wled->ctrl_base),
  1174. QPNP_WLED_MODULE_EN_MASK, QPNP_WLED_MODULE_EN_MASK);
  1175. if (rc < 0) {
  1176. pr_err("Failed to enable WLED module rc=%d\n", rc);
  1177. goto failed_calib;
  1178. }
  1179. /* delay for WLED soft-start */
  1180. usleep_range(QPNP_WLED_SOFT_START_DLY_US,
  1181. QPNP_WLED_SOFT_START_DLY_US + 1000);
  1182. rc = qpnp_wled_read_reg(wled,
  1183. QPNP_WLED_INT_RT_STS(wled->ctrl_base), &int_sts);
  1184. if (rc < 0) {
  1185. pr_err("Error in reading WLED_INT_RT_STS rc=%d\n", rc);
  1186. goto failed_calib;
  1187. }
  1188. if (int_sts & QPNP_WLED_OVP_FAULT_BIT)
  1189. pr_debug("WLED OVP fault detected with SINK %d\n",
  1190. i + 1);
  1191. else
  1192. sink_valid |= sink_test;
  1193. /* Disable the module */
  1194. rc = qpnp_wled_masked_write_reg(wled,
  1195. QPNP_WLED_MODULE_EN_REG(wled->ctrl_base),
  1196. QPNP_WLED_MODULE_EN_MASK, 0);
  1197. if (rc < 0) {
  1198. pr_err("Failed to disable WLED module rc=%d\n", rc);
  1199. goto failed_calib;
  1200. }
  1201. }
  1202. if (sink_valid == sink_config) {
  1203. pr_debug("WLED auto-calibration complete, default sink-config=%x OK!\n",
  1204. sink_config);
  1205. } else {
  1206. pr_warn("Invalid WLED default sink config=%x changing it to=%x\n",
  1207. sink_config, sink_valid);
  1208. sink_config = sink_valid;
  1209. }
  1210. if (!sink_config) {
  1211. pr_warn("No valid WLED sinks found\n");
  1212. wled->module_dis_perm = true;
  1213. goto failed_calib;
  1214. }
  1215. /* write the new sink configuration */
  1216. rc = qpnp_wled_write_reg(wled,
  1217. QPNP_WLED_CURR_SINK_REG(wled->sink_base), sink_config);
  1218. if (rc < 0) {
  1219. pr_err("Failed to reconfigure the default sink rc=%d\n", rc);
  1220. goto failed_calib;
  1221. }
  1222. /* MODULATOR_EN setting for valid sinks */
  1223. for (i = 0; i < wled->max_strings; i++) {
  1224. if (wled->en_cabc) {
  1225. reg = 1 << QPNP_WLED_CABC_SHIFT;
  1226. rc = qpnp_wled_masked_write_reg(wled,
  1227. QPNP_WLED_CABC_REG(wled->sink_base, i),
  1228. QPNP_WLED_CABC_MASK, reg);
  1229. if (rc < 0)
  1230. goto failed_calib;
  1231. }
  1232. if (sink_config & (1 << (QPNP_WLED_CURR_SINK_SHIFT + i)))
  1233. reg = (QPNP_WLED_MOD_EN << QPNP_WLED_MOD_EN_SHFT);
  1234. else
  1235. reg = 0x0; /* disable modulator_en for unused sink */
  1236. if (wled->dim_mode == QPNP_WLED_DIM_HYBRID)
  1237. reg &= QPNP_WLED_GATE_DRV_MASK;
  1238. else
  1239. reg |= ~QPNP_WLED_GATE_DRV_MASK;
  1240. rc = qpnp_wled_write_reg(wled,
  1241. QPNP_WLED_MOD_EN_REG(wled->sink_base, i), reg);
  1242. if (rc < 0) {
  1243. pr_err("Failed to configure MODULATOR_EN rc=%d\n", rc);
  1244. goto failed_calib;
  1245. }
  1246. }
  1247. /* restore the feedback setting */
  1248. rc = qpnp_wled_write_reg(wled,
  1249. QPNP_WLED_FDBK_OP_REG(wled->ctrl_base),
  1250. wled->fdbk_op);
  1251. if (rc < 0) {
  1252. pr_err("Failed to restore feedback setting rc=%d\n", rc);
  1253. goto failed_calib;
  1254. }
  1255. /* restore brightness */
  1256. rc = qpnp_wled_set_level(wled, !wled->cdev.brightness ?
  1257. AUTO_CALIB_BRIGHTNESS : wled->cdev.brightness);
  1258. if (rc < 0) {
  1259. pr_err("Failed to set brightness after calibration rc=%d\n",
  1260. rc);
  1261. goto failed_calib;
  1262. }
  1263. rc = qpnp_wled_masked_write_reg(wled,
  1264. QPNP_WLED_MODULE_EN_REG(wled->ctrl_base),
  1265. QPNP_WLED_MODULE_EN_MASK,
  1266. QPNP_WLED_MODULE_EN_MASK);
  1267. if (rc < 0) {
  1268. pr_err("Failed to enable WLED module rc=%d\n", rc);
  1269. goto failed_calib;
  1270. }
  1271. /* delay for WLED soft-start */
  1272. usleep_range(QPNP_WLED_SOFT_START_DLY_US,
  1273. QPNP_WLED_SOFT_START_DLY_US + 1000);
  1274. failed_calib:
  1275. return rc;
  1276. }
  1277. #define WLED_AUTO_CAL_OVP_COUNT 5
  1278. #define WLED_AUTO_CAL_CNT_DLY_US 1000000 /* 1 second */
  1279. static bool qpnp_wled_auto_cal_required(struct qpnp_wled *wled)
  1280. {
  1281. s64 elapsed_time_us;
  1282. /*
  1283. * Check if the OVP fault was an occasional one
  1284. * or if its firing continuously, the latter qualifies
  1285. * for an auto-calibration check.
  1286. */
  1287. if (!wled->auto_calibration_ovp_count) {
  1288. wled->start_ovp_fault_time = ktime_get();
  1289. wled->auto_calibration_ovp_count++;
  1290. } else {
  1291. elapsed_time_us = ktime_us_delta(ktime_get(),
  1292. wled->start_ovp_fault_time);
  1293. if (elapsed_time_us > WLED_AUTO_CAL_CNT_DLY_US)
  1294. wled->auto_calibration_ovp_count = 0;
  1295. else
  1296. wled->auto_calibration_ovp_count++;
  1297. if (wled->auto_calibration_ovp_count >=
  1298. WLED_AUTO_CAL_OVP_COUNT) {
  1299. wled->auto_calibration_ovp_count = 0;
  1300. return true;
  1301. }
  1302. }
  1303. return false;
  1304. }
  1305. static int qpnp_wled_auto_calibrate_at_init(struct qpnp_wled *wled)
  1306. {
  1307. int rc;
  1308. u8 fault_status = 0, rt_status = 0;
  1309. if (!wled->auto_calib_enabled)
  1310. return 0;
  1311. rc = qpnp_wled_read_reg(wled,
  1312. QPNP_WLED_INT_RT_STS(wled->ctrl_base), &rt_status);
  1313. if (rc < 0)
  1314. pr_err("Failed to read RT status rc=%d\n", rc);
  1315. rc = qpnp_wled_read_reg(wled,
  1316. QPNP_WLED_FAULT_STATUS(wled->ctrl_base), &fault_status);
  1317. if (rc < 0)
  1318. pr_err("Failed to read fault status rc=%d\n", rc);
  1319. if ((rt_status & QPNP_WLED_OVP_FLT_RT_STS_BIT) ||
  1320. (fault_status & QPNP_WLED_OVP_FAULT_BIT)) {
  1321. mutex_lock(&wled->lock);
  1322. rc = wled_auto_calibrate(wled);
  1323. if (rc < 0)
  1324. pr_err("Failed auto-calibration rc=%d\n", rc);
  1325. else
  1326. wled->auto_calib_done = true;
  1327. mutex_unlock(&wled->lock);
  1328. }
  1329. return rc;
  1330. }
  1331. /* ovp irq handler */
  1332. static irqreturn_t qpnp_wled_ovp_irq_handler(int irq, void *_wled)
  1333. {
  1334. struct qpnp_wled *wled = _wled;
  1335. int rc;
  1336. u8 fault_sts, int_sts;
  1337. rc = qpnp_wled_read_reg(wled,
  1338. QPNP_WLED_INT_RT_STS(wled->ctrl_base), &int_sts);
  1339. if (rc < 0) {
  1340. pr_err("Error in reading WLED_INT_RT_STS rc=%d\n", rc);
  1341. return IRQ_HANDLED;
  1342. }
  1343. rc = qpnp_wled_read_reg(wled,
  1344. QPNP_WLED_FAULT_STATUS(wled->ctrl_base), &fault_sts);
  1345. if (rc < 0) {
  1346. pr_err("Error in reading WLED_FAULT_STATUS rc=%d\n", rc);
  1347. return IRQ_HANDLED;
  1348. }
  1349. if (fault_sts & (QPNP_WLED_OVP_FAULT_BIT | QPNP_WLED_ILIM_FAULT_BIT))
  1350. pr_err("WLED OVP fault detected, int_sts=%x fault_sts= %x\n",
  1351. int_sts, fault_sts);
  1352. if (fault_sts & QPNP_WLED_OVP_FAULT_BIT) {
  1353. if (wled->auto_calib_enabled && !wled->auto_calib_done) {
  1354. if (qpnp_wled_auto_cal_required(wled)) {
  1355. mutex_lock(&wled->lock);
  1356. if (wled->ovp_irq > 0 &&
  1357. !wled->ovp_irq_disabled) {
  1358. disable_irq_nosync(wled->ovp_irq);
  1359. wled->ovp_irq_disabled = true;
  1360. }
  1361. rc = wled_auto_calibrate(wled);
  1362. if (rc < 0)
  1363. pr_err("Failed auto-calibration rc=%d\n",
  1364. rc);
  1365. else
  1366. wled->auto_calib_done = true;
  1367. if (wled->ovp_irq > 0 &&
  1368. wled->ovp_irq_disabled) {
  1369. enable_irq(wled->ovp_irq);
  1370. wled->ovp_irq_disabled = false;
  1371. }
  1372. mutex_unlock(&wled->lock);
  1373. }
  1374. }
  1375. }
  1376. return IRQ_HANDLED;
  1377. }
  1378. /* short circuit irq handler */
  1379. static irqreturn_t qpnp_wled_sc_irq_handler(int irq, void *_wled)
  1380. {
  1381. struct qpnp_wled *wled = _wled;
  1382. int rc;
  1383. u8 val, ext_ctl;
  1384. rc = qpnp_wled_read_reg(wled,
  1385. QPNP_WLED_FAULT_STATUS(wled->ctrl_base), &val);
  1386. if (rc < 0) {
  1387. pr_err("Error in reading WLED_FAULT_STATUS rc=%d\n", rc);
  1388. return IRQ_HANDLED;
  1389. }
  1390. rc = qpnp_wled_read_reg(wled,
  1391. QPNP_WLED_EXT_PIN_CTL(wled->ctrl_base), &ext_ctl);
  1392. if (rc < 0) {
  1393. pr_err("Can't read WLED_EXT_PIN_CTL\n");
  1394. return IRQ_HANDLED;
  1395. }
  1396. pr_err("WLED short circuit: n=%d, ext_pin_ctl=%x, fault=%x\n",
  1397. ++wled->sc_cnt, ext_ctl, val);
  1398. mutex_lock(&wled->lock);
  1399. if ((ext_ctl & QPNP_WLED_EXT_PIN_CTL_BIT) == 0x00) {
  1400. /* Disable, then re-enable WLED regulator. */
  1401. qpnp_wled_module_en(wled, wled->ctrl_base, false);
  1402. msleep(QPNP_WLED_SC_DLY_MS);
  1403. qpnp_wled_module_en(wled, wled->ctrl_base, true);
  1404. } else {
  1405. /* Disable, then restore external pin control. */
  1406. qpnp_wled_write_reg(wled,
  1407. QPNP_WLED_EXT_PIN_CTL(wled->ctrl_base),
  1408. ext_ctl & ~QPNP_WLED_EXT_PIN_CTL_BIT);
  1409. msleep(QPNP_WLED_SC_DLY_MS);
  1410. qpnp_wled_write_reg(wled,
  1411. QPNP_WLED_EXT_PIN_CTL(wled->ctrl_base), ext_ctl);
  1412. }
  1413. mutex_unlock(&wled->lock);
  1414. return IRQ_HANDLED;
  1415. }
  1416. static bool is_avdd_trim_adjustment_required(struct qpnp_wled *wled)
  1417. {
  1418. int rc;
  1419. u8 reg = 0;
  1420. /*
  1421. * AVDD trim adjustment is not required for pmi8998/pm660l and not
  1422. * supported for pmi8994.
  1423. */
  1424. if (wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  1425. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE ||
  1426. wled->pmic_rev_id->pmic_subtype == PMI8994_SUBTYPE)
  1427. return false;
  1428. /*
  1429. * Configure TRIM_REG only if disp_type_amoled and it has
  1430. * not already been programmed by bootloader.
  1431. */
  1432. if (!wled->disp_type_amoled)
  1433. return false;
  1434. rc = qpnp_wled_read_reg(wled,
  1435. QPNP_WLED_CTRL_SPARE_REG(wled->ctrl_base), &reg);
  1436. if (rc < 0)
  1437. return false;
  1438. return !(reg & QPNP_WLED_AVDD_SET_BIT);
  1439. }
  1440. static int qpnp_wled_gm_config(struct qpnp_wled *wled)
  1441. {
  1442. int rc;
  1443. u8 mask = 0, reg = 0;
  1444. /* Configure the LOOP COMP GM register */
  1445. if ((wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  1446. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE)) {
  1447. if (wled->disp_type_amoled) {
  1448. reg = 0;
  1449. mask |= QPNP_WLED_VLOOP_COMP_AUTO_GM_EN |
  1450. QPNP_WLED_VLOOP_COMP_AUTO_GM_THRESH_MASK;
  1451. } else {
  1452. if (wled->loop_auto_gm_en)
  1453. reg |= QPNP_WLED_VLOOP_COMP_AUTO_GM_EN;
  1454. if (wled->loop_auto_gm_thresh >
  1455. QPNP_WLED_LOOP_AUTO_GM_THRESH_MAX)
  1456. wled->loop_auto_gm_thresh =
  1457. QPNP_WLED_LOOP_AUTO_GM_THRESH_MAX;
  1458. reg |= wled->loop_auto_gm_thresh <<
  1459. QPNP_WLED_VLOOP_COMP_AUTO_GM_THRESH_SHIFT;
  1460. mask |= QPNP_WLED_VLOOP_COMP_AUTO_GM_EN |
  1461. QPNP_WLED_VLOOP_COMP_AUTO_GM_THRESH_MASK;
  1462. }
  1463. }
  1464. if (wled->loop_ea_gm < QPNP_WLED_LOOP_EA_GM_MIN)
  1465. wled->loop_ea_gm = QPNP_WLED_LOOP_EA_GM_MIN;
  1466. else if (wled->loop_ea_gm > QPNP_WLED_LOOP_EA_GM_MAX)
  1467. wled->loop_ea_gm = QPNP_WLED_LOOP_EA_GM_MAX;
  1468. reg |= wled->loop_ea_gm | QPNP_WLED_VLOOP_COMP_GM_OVERWRITE;
  1469. mask |= QPNP_WLED_VLOOP_COMP_GM_MASK |
  1470. QPNP_WLED_VLOOP_COMP_GM_OVERWRITE;
  1471. rc = qpnp_wled_masked_write_reg(wled,
  1472. QPNP_WLED_VLOOP_COMP_GM_REG(wled->ctrl_base), mask,
  1473. reg);
  1474. if (rc)
  1475. pr_err("write VLOOP_COMP_GM_REG failed, rc=%d]\n", rc);
  1476. return rc;
  1477. }
  1478. static int qpnp_wled_ovp_config(struct qpnp_wled *wled)
  1479. {
  1480. int rc, i, *ovp_table;
  1481. u8 reg;
  1482. /*
  1483. * Configure the OVP register based on ovp_mv only if display type is
  1484. * not AMOLED.
  1485. */
  1486. if (wled->disp_type_amoled)
  1487. return 0;
  1488. if (wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  1489. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE)
  1490. ovp_table = qpnp_wled_ovp_thresholds_pmi8998;
  1491. else
  1492. ovp_table = qpnp_wled_ovp_thresholds_pmi8994;
  1493. for (i = 0; i < NUM_SUPPORTED_OVP_THRESHOLDS; i++) {
  1494. if (wled->ovp_mv == ovp_table[i])
  1495. break;
  1496. }
  1497. if (i == NUM_SUPPORTED_OVP_THRESHOLDS) {
  1498. dev_err(&wled->pdev->dev,
  1499. "Invalid ovp threshold specified in device tree\n");
  1500. return -EINVAL;
  1501. }
  1502. reg = i & QPNP_WLED_OVP_MASK;
  1503. rc = qpnp_wled_masked_write_reg(wled,
  1504. QPNP_WLED_OVP_REG(wled->ctrl_base),
  1505. QPNP_WLED_OVP_MASK, reg);
  1506. if (rc)
  1507. return rc;
  1508. return 0;
  1509. }
  1510. static int qpnp_wled_avdd_trim_config(struct qpnp_wled *wled)
  1511. {
  1512. int rc, i;
  1513. u8 reg;
  1514. for (i = 0; i < NUM_SUPPORTED_AVDD_VOLTAGES; i++) {
  1515. if (wled->avdd_target_voltage_mv ==
  1516. qpnp_wled_avdd_target_voltages[i])
  1517. break;
  1518. }
  1519. if (i == NUM_SUPPORTED_AVDD_VOLTAGES) {
  1520. dev_err(&wled->pdev->dev,
  1521. "Invalid avdd target voltage specified in device tree\n");
  1522. return -EINVAL;
  1523. }
  1524. /* Update WLED_OVP register based on desired target voltage */
  1525. reg = qpnp_wled_ovp_reg_settings[i];
  1526. rc = qpnp_wled_masked_write_reg(wled,
  1527. QPNP_WLED_OVP_REG(wled->ctrl_base),
  1528. QPNP_WLED_OVP_MASK, reg);
  1529. if (rc)
  1530. return rc;
  1531. /* Update WLED_TRIM register based on desired target voltage */
  1532. rc = qpnp_wled_read_reg(wled,
  1533. QPNP_WLED_REF_7P7_TRIM_REG(wled->ctrl_base), &reg);
  1534. if (rc)
  1535. return rc;
  1536. reg += qpnp_wled_avdd_trim_adjustments[i];
  1537. if ((s8)reg < QPNP_WLED_AVDD_MIN_TRIM_VAL ||
  1538. (s8)reg > QPNP_WLED_AVDD_MAX_TRIM_VAL) {
  1539. dev_dbg(&wled->pdev->dev,
  1540. "adjusted trim %d is not within range, capping it\n",
  1541. (s8)reg);
  1542. if ((s8)reg < QPNP_WLED_AVDD_MIN_TRIM_VAL)
  1543. reg = QPNP_WLED_AVDD_MIN_TRIM_VAL;
  1544. else
  1545. reg = QPNP_WLED_AVDD_MAX_TRIM_VAL;
  1546. }
  1547. reg &= QPNP_WLED_7P7_TRIM_MASK;
  1548. rc = qpnp_wled_sec_write_reg(wled,
  1549. QPNP_WLED_REF_7P7_TRIM_REG(wled->ctrl_base), reg);
  1550. if (rc < 0)
  1551. dev_err(&wled->pdev->dev, "Write to 7P7_TRIM register failed, rc=%d\n",
  1552. rc);
  1553. return rc;
  1554. }
  1555. static int qpnp_wled_avdd_mode_config(struct qpnp_wled *wled)
  1556. {
  1557. int rc;
  1558. u8 reg = 0;
  1559. /*
  1560. * At present, configuring the mode to SPMI/SWIRE for controlling
  1561. * AVDD voltage is available only in pmi8998/pm660l.
  1562. */
  1563. if (wled->pmic_rev_id->pmic_subtype != PMI8998_SUBTYPE &&
  1564. wled->pmic_rev_id->pmic_subtype != PM660L_SUBTYPE)
  1565. return 0;
  1566. /* AMOLED_VOUT should be configured for AMOLED */
  1567. if (!wled->disp_type_amoled)
  1568. return 0;
  1569. /* Configure avdd register */
  1570. if (wled->avdd_target_voltage_mv > QPNP_WLED_AVDD_MAX_MV) {
  1571. dev_dbg(&wled->pdev->dev, "Capping avdd target voltage to %d\n",
  1572. QPNP_WLED_AVDD_MAX_MV);
  1573. wled->avdd_target_voltage_mv = QPNP_WLED_AVDD_MAX_MV;
  1574. } else if (wled->avdd_target_voltage_mv < QPNP_WLED_AVDD_MIN_MV) {
  1575. dev_info(&wled->pdev->dev, "Capping avdd target voltage to %d\n",
  1576. QPNP_WLED_AVDD_MIN_MV);
  1577. wled->avdd_target_voltage_mv = QPNP_WLED_AVDD_MIN_MV;
  1578. }
  1579. if (wled->avdd_mode_spmi) {
  1580. reg = QPNP_WLED_AVDD_MV_TO_REG(wled->avdd_target_voltage_mv);
  1581. reg |= QPNP_WLED_AVDD_SEL_SPMI_BIT;
  1582. rc = qpnp_wled_write_reg(wled,
  1583. QPNP_WLED_AMOLED_VOUT_REG(wled->ctrl_base),
  1584. reg);
  1585. if (rc < 0)
  1586. pr_err("Write to AMOLED_VOUT register failed, rc=%d\n",
  1587. rc);
  1588. } else {
  1589. rc = qpnp_wled_swire_avdd_config(wled);
  1590. if (rc < 0)
  1591. pr_err("Write to SWIRE_AVDD_DEFAULT register failed rc:%d\n",
  1592. rc);
  1593. }
  1594. return rc;
  1595. }
  1596. static int qpnp_wled_ilim_config(struct qpnp_wled *wled)
  1597. {
  1598. int rc, i, *ilim_table;
  1599. u8 reg;
  1600. if (wled->ilim_ma < PMI8994_WLED_ILIM_MIN_MA)
  1601. wled->ilim_ma = PMI8994_WLED_ILIM_MIN_MA;
  1602. if (wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  1603. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE) {
  1604. ilim_table = qpnp_wled_ilim_settings_pmi8998;
  1605. if (wled->ilim_ma > PMI8998_WLED_ILIM_MAX_MA)
  1606. wled->ilim_ma = PMI8998_WLED_ILIM_MAX_MA;
  1607. } else {
  1608. ilim_table = qpnp_wled_ilim_settings_pmi8994;
  1609. if (wled->ilim_ma > PMI8994_WLED_ILIM_MAX_MA)
  1610. wled->ilim_ma = PMI8994_WLED_ILIM_MAX_MA;
  1611. }
  1612. for (i = 0; i < NUM_SUPPORTED_ILIM_THRESHOLDS; i++) {
  1613. if (wled->ilim_ma == ilim_table[i])
  1614. break;
  1615. }
  1616. if (i == NUM_SUPPORTED_ILIM_THRESHOLDS) {
  1617. dev_err(&wled->pdev->dev,
  1618. "Invalid ilim threshold specified in device tree\n");
  1619. return -EINVAL;
  1620. }
  1621. reg = (i & QPNP_WLED_ILIM_MASK) | QPNP_WLED_ILIM_OVERWRITE;
  1622. rc = qpnp_wled_masked_write_reg(wled,
  1623. QPNP_WLED_ILIM_REG(wled->ctrl_base),
  1624. QPNP_WLED_ILIM_MASK | QPNP_WLED_ILIM_OVERWRITE, reg);
  1625. if (rc < 0)
  1626. dev_err(&wled->pdev->dev, "Write to ILIM register failed, rc=%d\n",
  1627. rc);
  1628. return rc;
  1629. }
  1630. static int qpnp_wled_vref_config(struct qpnp_wled *wled)
  1631. {
  1632. struct wled_vref_setting vref_setting;
  1633. int rc;
  1634. u8 reg = 0;
  1635. if (wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  1636. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE)
  1637. vref_setting = vref_setting_pmi8998;
  1638. else
  1639. vref_setting = vref_setting_pmi8994;
  1640. if (wled->vref_uv < vref_setting.min_uv)
  1641. wled->vref_uv = vref_setting.min_uv;
  1642. else if (wled->vref_uv > vref_setting.max_uv)
  1643. wled->vref_uv = vref_setting.max_uv;
  1644. reg |= DIV_ROUND_CLOSEST(wled->vref_uv - vref_setting.min_uv,
  1645. vref_setting.step_uv);
  1646. rc = qpnp_wled_masked_write_reg(wled,
  1647. QPNP_WLED_VREF_REG(wled->ctrl_base),
  1648. QPNP_WLED_VREF_MASK, reg);
  1649. if (rc)
  1650. pr_err("Write VREF_REG failed, rc=%d\n", rc);
  1651. return rc;
  1652. }
  1653. /* Configure WLED registers */
  1654. static int qpnp_wled_config(struct qpnp_wled *wled)
  1655. {
  1656. int rc, i, temp;
  1657. u8 reg = 0, sink_en = 0, mask;
  1658. /* Configure display type */
  1659. rc = qpnp_wled_set_disp(wled, wled->ctrl_base);
  1660. if (rc < 0)
  1661. return rc;
  1662. /* Configure the FEEDBACK OUTPUT register */
  1663. rc = qpnp_wled_read_reg(wled, QPNP_WLED_FDBK_OP_REG(wled->ctrl_base),
  1664. &reg);
  1665. if (rc < 0)
  1666. return rc;
  1667. reg &= QPNP_WLED_FDBK_OP_MASK;
  1668. reg |= wled->fdbk_op;
  1669. rc = qpnp_wled_write_reg(wled, QPNP_WLED_FDBK_OP_REG(wled->ctrl_base),
  1670. reg);
  1671. if (rc)
  1672. return rc;
  1673. /* Configure the VREF register */
  1674. rc = qpnp_wled_vref_config(wled);
  1675. if (rc < 0) {
  1676. pr_err("Error in configuring wled vref, rc=%d\n", rc);
  1677. return rc;
  1678. }
  1679. /* Configure VLOOP_COMP_GM register */
  1680. rc = qpnp_wled_gm_config(wled);
  1681. if (rc < 0) {
  1682. pr_err("Error in configureing wled gm, rc=%d\n", rc);
  1683. return rc;
  1684. }
  1685. /* Configure the ILIM register */
  1686. rc = qpnp_wled_ilim_config(wled);
  1687. if (rc < 0) {
  1688. pr_err("Error in configuring wled ilim, rc=%d\n", rc);
  1689. return rc;
  1690. }
  1691. /* Configure auto PFM mode for LCD mode only */
  1692. if ((wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  1693. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE)
  1694. && !wled->disp_type_amoled) {
  1695. reg = 0;
  1696. reg |= wled->lcd_auto_pfm_thresh;
  1697. reg |= wled->lcd_auto_pfm_en <<
  1698. QPNP_WLED_LCD_AUTO_PFM_EN_SHIFT;
  1699. rc = qpnp_wled_masked_write_reg(wled,
  1700. QPNP_WLED_LCD_AUTO_PFM_REG(wled->ctrl_base),
  1701. QPNP_WLED_LCD_AUTO_PFM_EN_BIT |
  1702. QPNP_WLED_LCD_AUTO_PFM_THRESH_MASK, reg);
  1703. if (rc < 0) {
  1704. pr_err("Write LCD_AUTO_PFM failed, rc=%d\n", rc);
  1705. return rc;
  1706. }
  1707. }
  1708. /* Configure the Soft start Ramp delay: for AMOLED - 0,for LCD - 2 */
  1709. reg = (wled->disp_type_amoled) ? 0 : 2;
  1710. mask = SOFTSTART_RAMP_DELAY_MASK;
  1711. if ((wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  1712. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE)
  1713. && wled->disp_type_amoled) {
  1714. reg |= SOFTSTART_OVERWRITE_BIT;
  1715. mask |= SOFTSTART_OVERWRITE_BIT;
  1716. }
  1717. rc = qpnp_wled_masked_write_reg(wled,
  1718. QPNP_WLED_SOFTSTART_RAMP_DLY(wled->ctrl_base),
  1719. mask, reg);
  1720. if (rc)
  1721. return rc;
  1722. /* Configure the MAX BOOST DUTY register */
  1723. if (wled->boost_duty_ns < QPNP_WLED_BOOST_DUTY_MIN_NS)
  1724. wled->boost_duty_ns = QPNP_WLED_BOOST_DUTY_MIN_NS;
  1725. else if (wled->boost_duty_ns > QPNP_WLED_BOOST_DUTY_MAX_NS)
  1726. wled->boost_duty_ns = QPNP_WLED_BOOST_DUTY_MAX_NS;
  1727. rc = qpnp_wled_read_reg(wled, QPNP_WLED_BOOST_DUTY_REG(wled->ctrl_base),
  1728. &reg);
  1729. if (rc < 0)
  1730. return rc;
  1731. reg &= QPNP_WLED_BOOST_DUTY_MASK;
  1732. reg |= (wled->boost_duty_ns / QPNP_WLED_BOOST_DUTY_STEP_NS);
  1733. rc = qpnp_wled_write_reg(wled,
  1734. QPNP_WLED_BOOST_DUTY_REG(wled->ctrl_base), reg);
  1735. if (rc)
  1736. return rc;
  1737. /* Configure the SWITCHING FREQ register */
  1738. if (wled->switch_freq_khz == 1600)
  1739. reg = QPNP_WLED_SWITCH_FREQ_1600_KHZ_CODE;
  1740. else
  1741. reg = QPNP_WLED_SWITCH_FREQ_800_KHZ_CODE;
  1742. /*
  1743. * Do not set the overwrite bit when switching frequency is selected
  1744. * for AMOLED. This register is in logic reset block which can cause
  1745. * the value to be overwritten during module enable/disable.
  1746. */
  1747. mask = QPNP_WLED_SWITCH_FREQ_MASK | QPNP_WLED_SWITCH_FREQ_OVERWRITE;
  1748. if (!wled->disp_type_amoled)
  1749. reg |= QPNP_WLED_SWITCH_FREQ_OVERWRITE;
  1750. rc = qpnp_wled_masked_write_reg(wled,
  1751. QPNP_WLED_SWITCH_FREQ_REG(wled->ctrl_base), mask, reg);
  1752. if (rc < 0)
  1753. return rc;
  1754. rc = qpnp_wled_ovp_config(wled);
  1755. if (rc < 0) {
  1756. pr_err("Error in configuring OVP threshold, rc=%d\n", rc);
  1757. return rc;
  1758. }
  1759. if (is_avdd_trim_adjustment_required(wled)) {
  1760. rc = qpnp_wled_avdd_trim_config(wled);
  1761. if (rc < 0)
  1762. return rc;
  1763. }
  1764. rc = qpnp_wled_avdd_mode_config(wled);
  1765. if (rc < 0)
  1766. return rc;
  1767. /* Configure the MODULATION register */
  1768. if (wled->mod_freq_khz <= QPNP_WLED_MOD_FREQ_1200_KHZ) {
  1769. wled->mod_freq_khz = QPNP_WLED_MOD_FREQ_1200_KHZ;
  1770. temp = 3;
  1771. } else if (wled->mod_freq_khz <= QPNP_WLED_MOD_FREQ_2400_KHZ) {
  1772. wled->mod_freq_khz = QPNP_WLED_MOD_FREQ_2400_KHZ;
  1773. temp = 2;
  1774. } else if (wled->mod_freq_khz <= QPNP_WLED_MOD_FREQ_9600_KHZ) {
  1775. wled->mod_freq_khz = QPNP_WLED_MOD_FREQ_9600_KHZ;
  1776. temp = 1;
  1777. } else if (wled->mod_freq_khz <= QPNP_WLED_MOD_FREQ_19200_KHZ) {
  1778. wled->mod_freq_khz = QPNP_WLED_MOD_FREQ_19200_KHZ;
  1779. temp = 0;
  1780. } else {
  1781. wled->mod_freq_khz = QPNP_WLED_MOD_FREQ_9600_KHZ;
  1782. temp = 1;
  1783. }
  1784. rc = qpnp_wled_read_reg(wled, QPNP_WLED_MOD_REG(wled->sink_base), &reg);
  1785. if (rc < 0)
  1786. return rc;
  1787. reg &= QPNP_WLED_MOD_FREQ_MASK;
  1788. reg |= (temp << QPNP_WLED_MOD_FREQ_SHIFT);
  1789. reg &= QPNP_WLED_PHASE_STAG_MASK;
  1790. reg |= (wled->en_phase_stag << QPNP_WLED_PHASE_STAG_SHIFT);
  1791. reg &= QPNP_WLED_ACC_CLK_FREQ_MASK;
  1792. reg |= (temp << QPNP_WLED_ACC_CLK_FREQ_SHIFT);
  1793. reg &= QPNP_WLED_DIM_RES_MASK;
  1794. reg |= (wled->en_9b_dim_res << QPNP_WLED_DIM_RES_SHIFT);
  1795. if (wled->dim_mode == QPNP_WLED_DIM_HYBRID) {
  1796. reg &= QPNP_WLED_DIM_HYB_MASK;
  1797. reg |= (1 << QPNP_WLED_DIM_HYB_SHIFT);
  1798. } else {
  1799. reg &= QPNP_WLED_DIM_HYB_MASK;
  1800. reg |= (0 << QPNP_WLED_DIM_HYB_SHIFT);
  1801. reg &= QPNP_WLED_DIM_ANA_MASK;
  1802. reg |= wled->dim_mode;
  1803. }
  1804. rc = qpnp_wled_write_reg(wled, QPNP_WLED_MOD_REG(wled->sink_base), reg);
  1805. if (rc)
  1806. return rc;
  1807. /* Configure the HYBRID THRESHOLD register */
  1808. if (wled->hyb_thres < QPNP_WLED_HYB_THRES_MIN)
  1809. wled->hyb_thres = QPNP_WLED_HYB_THRES_MIN;
  1810. else if (wled->hyb_thres > QPNP_WLED_HYB_THRES_MAX)
  1811. wled->hyb_thres = QPNP_WLED_HYB_THRES_MAX;
  1812. rc = qpnp_wled_read_reg(wled, QPNP_WLED_HYB_THRES_REG(wled->sink_base),
  1813. &reg);
  1814. if (rc < 0)
  1815. return rc;
  1816. reg &= QPNP_WLED_HYB_THRES_MASK;
  1817. temp = fls(wled->hyb_thres / QPNP_WLED_HYB_THRES_MIN) - 1;
  1818. reg |= temp;
  1819. rc = qpnp_wled_write_reg(wled, QPNP_WLED_HYB_THRES_REG(wled->sink_base),
  1820. reg);
  1821. if (rc)
  1822. return rc;
  1823. /* Configure TEST5 register */
  1824. if (wled->dim_mode == QPNP_WLED_DIM_DIGITAL) {
  1825. reg = QPNP_WLED_SINK_TEST5_DIG;
  1826. } else {
  1827. reg = QPNP_WLED_SINK_TEST5_HYB;
  1828. if (wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE)
  1829. reg |= QPNP_WLED_SINK_TEST5_HVG_PULL_STR_BIT;
  1830. }
  1831. rc = qpnp_wled_sec_write_reg(wled,
  1832. QPNP_WLED_SINK_TEST5_REG(wled->sink_base), reg);
  1833. if (rc)
  1834. return rc;
  1835. /* disable all current sinks and enable selected strings */
  1836. reg = 0x00;
  1837. rc = qpnp_wled_write_reg(wled, QPNP_WLED_CURR_SINK_REG(wled->sink_base),
  1838. reg);
  1839. for (i = 0; i < wled->max_strings; i++) {
  1840. /* SYNC DELAY */
  1841. if (wled->sync_dly_us > QPNP_WLED_SYNC_DLY_MAX_US)
  1842. wled->sync_dly_us = QPNP_WLED_SYNC_DLY_MAX_US;
  1843. reg = wled->sync_dly_us / QPNP_WLED_SYNC_DLY_STEP_US;
  1844. mask = QPNP_WLED_SYNC_DLY_MASK;
  1845. rc = qpnp_wled_masked_write_reg(wled,
  1846. QPNP_WLED_SYNC_DLY_REG(wled->sink_base, i),
  1847. mask, reg);
  1848. if (rc < 0)
  1849. return rc;
  1850. /* FULL SCALE CURRENT */
  1851. if (wled->fs_curr_ua > QPNP_WLED_FS_CURR_MAX_UA)
  1852. wled->fs_curr_ua = QPNP_WLED_FS_CURR_MAX_UA;
  1853. reg = wled->fs_curr_ua / QPNP_WLED_FS_CURR_STEP_UA;
  1854. mask = QPNP_WLED_FS_CURR_MASK;
  1855. rc = qpnp_wled_masked_write_reg(wled,
  1856. QPNP_WLED_FS_CURR_REG(wled->sink_base, i),
  1857. mask, reg);
  1858. if (rc < 0)
  1859. return rc;
  1860. /* CABC */
  1861. reg = wled->en_cabc ? (1 << QPNP_WLED_CABC_SHIFT) : 0;
  1862. mask = QPNP_WLED_CABC_MASK;
  1863. rc = qpnp_wled_masked_write_reg(wled,
  1864. QPNP_WLED_CABC_REG(wled->sink_base, i),
  1865. mask, reg);
  1866. if (rc < 0)
  1867. return rc;
  1868. }
  1869. /* Settings specific to valid sinks */
  1870. for (i = 0; i < wled->num_strings; i++) {
  1871. if (wled->strings[i] >= wled->max_strings) {
  1872. dev_err(&wled->pdev->dev, "Invalid string number\n");
  1873. return -EINVAL;
  1874. }
  1875. /* MODULATOR */
  1876. rc = qpnp_wled_read_reg(wled,
  1877. QPNP_WLED_MOD_EN_REG(wled->sink_base, i), &reg);
  1878. if (rc < 0)
  1879. return rc;
  1880. reg &= QPNP_WLED_MOD_EN_MASK;
  1881. reg |= (QPNP_WLED_MOD_EN << QPNP_WLED_MOD_EN_SHFT);
  1882. if (wled->dim_mode == QPNP_WLED_DIM_HYBRID)
  1883. reg &= QPNP_WLED_GATE_DRV_MASK;
  1884. else
  1885. reg |= ~QPNP_WLED_GATE_DRV_MASK;
  1886. rc = qpnp_wled_write_reg(wled,
  1887. QPNP_WLED_MOD_EN_REG(wled->sink_base, i), reg);
  1888. if (rc)
  1889. return rc;
  1890. /* SINK EN */
  1891. temp = wled->strings[i] + QPNP_WLED_CURR_SINK_SHIFT;
  1892. sink_en |= (1 << temp);
  1893. }
  1894. mask = QPNP_WLED_CURR_SINK_MASK;
  1895. rc = qpnp_wled_masked_write_reg(wled,
  1896. QPNP_WLED_CURR_SINK_REG(wled->sink_base),
  1897. mask, sink_en);
  1898. if (rc < 0) {
  1899. dev_err(&wled->pdev->dev,
  1900. "Failed to enable WLED sink config rc = %d\n", rc);
  1901. return rc;
  1902. }
  1903. rc = qpnp_wled_sync_reg_toggle(wled);
  1904. if (rc < 0) {
  1905. dev_err(&wled->pdev->dev, "Failed to toggle sync reg %d\n", rc);
  1906. return rc;
  1907. }
  1908. rc = qpnp_wled_auto_calibrate_at_init(wled);
  1909. if (rc < 0)
  1910. pr_err("Failed to auto-calibrate at init rc=%d\n", rc);
  1911. /* setup ovp and sc irqs */
  1912. if (wled->ovp_irq >= 0) {
  1913. irq_set_status_flags(wled->ovp_irq, IRQ_DISABLE_UNLAZY);
  1914. rc = devm_request_threaded_irq(&wled->pdev->dev, wled->ovp_irq,
  1915. NULL, qpnp_wled_ovp_irq_handler, IRQF_ONESHOT,
  1916. "qpnp_wled_ovp_irq", wled);
  1917. if (rc < 0) {
  1918. dev_err(&wled->pdev->dev,
  1919. "Unable to request ovp(%d) IRQ(err:%d)\n",
  1920. wled->ovp_irq, rc);
  1921. return rc;
  1922. }
  1923. rc = qpnp_wled_read_reg(wled,
  1924. QPNP_WLED_MODULE_EN_REG(wled->ctrl_base), &reg);
  1925. /* disable the OVP irq only if the module is not enabled */
  1926. if (!rc && !(reg & QPNP_WLED_MODULE_EN_MASK)) {
  1927. disable_irq(wled->ovp_irq);
  1928. wled->ovp_irq_disabled = true;
  1929. }
  1930. }
  1931. if (wled->sc_irq >= 0) {
  1932. wled->sc_cnt = 0;
  1933. irq_set_status_flags(wled->sc_irq, IRQ_DISABLE_UNLAZY);
  1934. rc = devm_request_threaded_irq(&wled->pdev->dev, wled->sc_irq,
  1935. NULL, qpnp_wled_sc_irq_handler, IRQF_ONESHOT,
  1936. "qpnp_wled_sc_irq", wled);
  1937. if (rc < 0) {
  1938. dev_err(&wled->pdev->dev,
  1939. "Unable to request sc(%d) IRQ(err:%d)\n",
  1940. wled->sc_irq, rc);
  1941. return rc;
  1942. }
  1943. rc = qpnp_wled_read_reg(wled,
  1944. QPNP_WLED_SC_PRO_REG(wled->ctrl_base), &reg);
  1945. if (rc < 0)
  1946. return rc;
  1947. reg &= QPNP_WLED_EN_SC_DEB_CYCLES_MASK;
  1948. reg |= 1 << QPNP_WLED_EN_SC_SHIFT;
  1949. if (wled->sc_deb_cycles < QPNP_WLED_SC_DEB_CYCLES_MIN)
  1950. wled->sc_deb_cycles = QPNP_WLED_SC_DEB_CYCLES_MIN;
  1951. else if (wled->sc_deb_cycles > QPNP_WLED_SC_DEB_CYCLES_MAX)
  1952. wled->sc_deb_cycles = QPNP_WLED_SC_DEB_CYCLES_MAX;
  1953. temp = fls(wled->sc_deb_cycles) - QPNP_WLED_SC_DEB_CYCLES_SUB;
  1954. reg |= (temp << 1);
  1955. if (wled->disp_type_amoled)
  1956. reg |= QPNP_WLED_SC_PRO_EN_DSCHGR;
  1957. rc = qpnp_wled_write_reg(wled,
  1958. QPNP_WLED_SC_PRO_REG(wled->ctrl_base), reg);
  1959. if (rc)
  1960. return rc;
  1961. if (wled->en_ext_pfet_sc_pro) {
  1962. if (!(wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE
  1963. && wled->pmic_rev_id->rev4 ==
  1964. PMI8998_V2P0_REV4)) {
  1965. reg = QPNP_WLED_EXT_FET_DTEST2;
  1966. rc = qpnp_wled_sec_write_reg(wled,
  1967. QPNP_WLED_TEST1_REG(wled->ctrl_base),
  1968. reg);
  1969. if (rc)
  1970. return rc;
  1971. }
  1972. }
  1973. } else {
  1974. rc = qpnp_wled_read_reg(wled,
  1975. QPNP_WLED_SC_PRO_REG(wled->ctrl_base), &reg);
  1976. if (rc < 0)
  1977. return rc;
  1978. reg &= QPNP_WLED_EN_DEB_CYCLES_MASK;
  1979. if (wled->sc_deb_cycles < QPNP_WLED_SC_DEB_CYCLES_MIN)
  1980. wled->sc_deb_cycles = QPNP_WLED_SC_DEB_CYCLES_MIN;
  1981. else if (wled->sc_deb_cycles > QPNP_WLED_SC_DEB_CYCLES_MAX)
  1982. wled->sc_deb_cycles = QPNP_WLED_SC_DEB_CYCLES_MAX;
  1983. temp = fls(wled->sc_deb_cycles) - QPNP_WLED_SC_DEB_CYCLES_SUB;
  1984. reg |= (temp << 1);
  1985. rc = qpnp_wled_write_reg(wled,
  1986. QPNP_WLED_SC_PRO_REG(wled->ctrl_base), reg);
  1987. if (rc)
  1988. return rc;
  1989. }
  1990. return 0;
  1991. }
  1992. /* parse wled dtsi parameters */
  1993. static int qpnp_wled_parse_dt(struct qpnp_wled *wled)
  1994. {
  1995. struct platform_device *pdev = wled->pdev;
  1996. struct property *prop;
  1997. const char *temp_str;
  1998. u32 temp_val;
  1999. int rc, i, size;
  2000. u8 *strings;
  2001. wled->cdev.name = "wled";
  2002. rc = of_property_read_string(pdev->dev.of_node,
  2003. "linux,name", &wled->cdev.name);
  2004. if (rc && (rc != -EINVAL)) {
  2005. dev_err(&pdev->dev, "Unable to read led name\n");
  2006. return rc;
  2007. }
  2008. wled->cdev.default_trigger = QPNP_WLED_TRIGGER_NONE;
  2009. rc = of_property_read_string(pdev->dev.of_node, "linux,default-trigger",
  2010. &wled->cdev.default_trigger);
  2011. if (rc && (rc != -EINVAL)) {
  2012. dev_err(&pdev->dev, "Unable to read led trigger\n");
  2013. return rc;
  2014. }
  2015. if (of_find_property(pdev->dev.of_node, "qcom,wled-brightness-map",
  2016. NULL)) {
  2017. size = of_property_count_elems_of_size(pdev->dev.of_node,
  2018. "qcom,wled-brightness-map", sizeof(u16));
  2019. if (size != NUM_DDIC_CODES) {
  2020. pr_err("Invalid WLED brightness map size:%d\n", size);
  2021. return rc;
  2022. }
  2023. wled->brt_map_table = devm_kcalloc(&pdev->dev, NUM_DDIC_CODES,
  2024. sizeof(u16), GFP_KERNEL);
  2025. if (!wled->brt_map_table)
  2026. return -ENOMEM;
  2027. rc = of_property_read_u16_array(pdev->dev.of_node,
  2028. "qcom,wled-brightness-map", wled->brt_map_table,
  2029. NUM_DDIC_CODES);
  2030. if (rc < 0) {
  2031. pr_err("Error in reading WLED brightness map, rc=%d\n",
  2032. rc);
  2033. return rc;
  2034. }
  2035. for (i = 0; i < NUM_DDIC_CODES; i++) {
  2036. if (wled->brt_map_table[i] > WLED_MAX_LEVEL_4095) {
  2037. pr_err("WLED brightness map not in range\n");
  2038. return -EDOM;
  2039. }
  2040. if ((i > 1) && wled->brt_map_table[i]
  2041. < wled->brt_map_table[i - 1]) {
  2042. pr_err("WLED brightness map not in ascending order?\n");
  2043. return -EDOM;
  2044. }
  2045. }
  2046. }
  2047. wled->stepper_en = of_property_read_bool(pdev->dev.of_node,
  2048. "qcom,wled-stepper-en");
  2049. wled->disp_type_amoled = of_property_read_bool(pdev->dev.of_node,
  2050. "qcom,disp-type-amoled");
  2051. if (wled->disp_type_amoled) {
  2052. wled->vref_psm_mv = QPNP_WLED_VREF_PSM_DFLT_AMOLED_MV;
  2053. rc = of_property_read_u32(pdev->dev.of_node,
  2054. "qcom,vref-psm-mv", &temp_val);
  2055. if (!rc) {
  2056. wled->vref_psm_mv = temp_val;
  2057. } else if (rc != -EINVAL) {
  2058. dev_err(&pdev->dev, "Unable to read vref-psm\n");
  2059. return rc;
  2060. }
  2061. wled->loop_comp_res_kohm = 320;
  2062. if (wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  2063. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE)
  2064. wled->loop_comp_res_kohm = 300;
  2065. rc = of_property_read_u32(pdev->dev.of_node,
  2066. "qcom,loop-comp-res-kohm", &temp_val);
  2067. if (!rc) {
  2068. wled->loop_comp_res_kohm = temp_val;
  2069. } else if (rc != -EINVAL) {
  2070. dev_err(&pdev->dev, "Unable to read loop-comp-res-kohm\n");
  2071. return rc;
  2072. }
  2073. wled->avdd_mode_spmi = of_property_read_bool(pdev->dev.of_node,
  2074. "qcom,avdd-mode-spmi");
  2075. wled->avdd_target_voltage_mv = QPNP_WLED_DFLT_AVDD_MV;
  2076. rc = of_property_read_u32(pdev->dev.of_node,
  2077. "qcom,avdd-target-voltage-mv", &temp_val);
  2078. if (!rc) {
  2079. wled->avdd_target_voltage_mv = temp_val;
  2080. } else if (rc != -EINVAL) {
  2081. dev_err(&pdev->dev, "Unable to read avdd target voltage\n");
  2082. return rc;
  2083. }
  2084. }
  2085. if (wled->disp_type_amoled) {
  2086. if (wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  2087. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE)
  2088. wled->loop_ea_gm =
  2089. QPNP_WLED_LOOP_GM_DFLT_AMOLED_PMI8998;
  2090. else
  2091. wled->loop_ea_gm =
  2092. QPNP_WLED_LOOP_EA_GM_DFLT_AMOLED_PMI8994;
  2093. } else {
  2094. wled->loop_ea_gm = QPNP_WLED_LOOP_GM_DFLT_WLED;
  2095. }
  2096. rc = of_property_read_u32(pdev->dev.of_node,
  2097. "qcom,loop-ea-gm", &temp_val);
  2098. if (!rc) {
  2099. wled->loop_ea_gm = temp_val;
  2100. } else if (rc != -EINVAL) {
  2101. dev_err(&pdev->dev, "Unable to read loop-ea-gm\n");
  2102. return rc;
  2103. }
  2104. if (wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  2105. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE) {
  2106. wled->loop_auto_gm_en =
  2107. of_property_read_bool(pdev->dev.of_node,
  2108. "qcom,loop-auto-gm-en");
  2109. wled->loop_auto_gm_thresh = QPNP_WLED_LOOP_AUTO_GM_DFLT_THRESH;
  2110. rc = of_property_read_u8(pdev->dev.of_node,
  2111. "qcom,loop-auto-gm-thresh",
  2112. &wled->loop_auto_gm_thresh);
  2113. if (rc && rc != -EINVAL) {
  2114. dev_err(&pdev->dev,
  2115. "Unable to read loop-auto-gm-thresh\n");
  2116. return rc;
  2117. }
  2118. }
  2119. if (wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  2120. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE) {
  2121. if (wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE &&
  2122. wled->pmic_rev_id->rev4 == PMI8998_V2P0_REV4)
  2123. wled->lcd_auto_pfm_en = false;
  2124. else
  2125. wled->lcd_auto_pfm_en = true;
  2126. wled->lcd_auto_pfm_thresh = QPNP_WLED_LCD_AUTO_PFM_DFLT_THRESH;
  2127. rc = of_property_read_u8(pdev->dev.of_node,
  2128. "qcom,lcd-auto-pfm-thresh",
  2129. &wled->lcd_auto_pfm_thresh);
  2130. if (rc && rc != -EINVAL) {
  2131. dev_err(&pdev->dev,
  2132. "Unable to read lcd-auto-pfm-thresh\n");
  2133. return rc;
  2134. }
  2135. if (wled->lcd_auto_pfm_thresh >
  2136. QPNP_WLED_LCD_AUTO_PFM_THRESH_MAX)
  2137. wled->lcd_auto_pfm_thresh =
  2138. QPNP_WLED_LCD_AUTO_PFM_THRESH_MAX;
  2139. }
  2140. wled->sc_deb_cycles = QPNP_WLED_SC_DEB_CYCLES_DFLT;
  2141. rc = of_property_read_u32(pdev->dev.of_node,
  2142. "qcom,sc-deb-cycles", &temp_val);
  2143. if (!rc) {
  2144. wled->sc_deb_cycles = temp_val;
  2145. } else if (rc != -EINVAL) {
  2146. dev_err(&pdev->dev, "Unable to read sc debounce cycles\n");
  2147. return rc;
  2148. }
  2149. wled->fdbk_op = QPNP_WLED_FDBK_AUTO;
  2150. rc = of_property_read_string(pdev->dev.of_node,
  2151. "qcom,fdbk-output", &temp_str);
  2152. if (!rc) {
  2153. if (strcmp(temp_str, "wled1") == 0)
  2154. wled->fdbk_op = QPNP_WLED_FDBK_WLED1;
  2155. else if (strcmp(temp_str, "wled2") == 0)
  2156. wled->fdbk_op = QPNP_WLED_FDBK_WLED2;
  2157. else if (strcmp(temp_str, "wled3") == 0)
  2158. wled->fdbk_op = QPNP_WLED_FDBK_WLED3;
  2159. else if (strcmp(temp_str, "wled4") == 0)
  2160. wled->fdbk_op = QPNP_WLED_FDBK_WLED4;
  2161. else
  2162. wled->fdbk_op = QPNP_WLED_FDBK_AUTO;
  2163. } else if (rc != -EINVAL) {
  2164. dev_err(&pdev->dev, "Unable to read feedback output\n");
  2165. return rc;
  2166. }
  2167. if (wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  2168. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE)
  2169. wled->vref_uv = vref_setting_pmi8998.default_uv;
  2170. else
  2171. wled->vref_uv = vref_setting_pmi8994.default_uv;
  2172. rc = of_property_read_u32(pdev->dev.of_node,
  2173. "qcom,vref-uv", &temp_val);
  2174. if (!rc) {
  2175. wled->vref_uv = temp_val;
  2176. } else if (rc != -EINVAL) {
  2177. dev_err(&pdev->dev, "Unable to read vref\n");
  2178. return rc;
  2179. }
  2180. wled->switch_freq_khz = wled->disp_type_amoled ? 1600 : 800;
  2181. rc = of_property_read_u32(pdev->dev.of_node,
  2182. "qcom,switch-freq-khz", &temp_val);
  2183. if (!rc) {
  2184. wled->switch_freq_khz = temp_val;
  2185. } else if (rc != -EINVAL) {
  2186. dev_err(&pdev->dev, "Unable to read switch freq\n");
  2187. return rc;
  2188. }
  2189. if (wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  2190. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE)
  2191. wled->ovp_mv = 29600;
  2192. else
  2193. wled->ovp_mv = 29500;
  2194. rc = of_property_read_u32(pdev->dev.of_node,
  2195. "qcom,ovp-mv", &temp_val);
  2196. if (!rc) {
  2197. wled->ovp_mv = temp_val;
  2198. } else if (rc != -EINVAL) {
  2199. dev_err(&pdev->dev, "Unable to read ovp\n");
  2200. return rc;
  2201. }
  2202. if (wled->pmic_rev_id->pmic_subtype == PMI8998_SUBTYPE ||
  2203. wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE) {
  2204. if (wled->disp_type_amoled)
  2205. wled->ilim_ma = PMI8998_AMOLED_DFLT_ILIM_MA;
  2206. else
  2207. wled->ilim_ma = PMI8998_WLED_DFLT_ILIM_MA;
  2208. } else {
  2209. if (wled->disp_type_amoled)
  2210. wled->ilim_ma = PMI8994_AMOLED_DFLT_ILIM_MA;
  2211. else
  2212. wled->ilim_ma = PMI8994_WLED_DFLT_ILIM_MA;
  2213. }
  2214. rc = of_property_read_u32(pdev->dev.of_node,
  2215. "qcom,ilim-ma", &temp_val);
  2216. if (!rc) {
  2217. wled->ilim_ma = temp_val;
  2218. } else if (rc != -EINVAL) {
  2219. dev_err(&pdev->dev, "Unable to read ilim\n");
  2220. return rc;
  2221. }
  2222. wled->boost_duty_ns = QPNP_WLED_DEF_BOOST_DUTY_NS;
  2223. rc = of_property_read_u32(pdev->dev.of_node,
  2224. "qcom,boost-duty-ns", &temp_val);
  2225. if (!rc) {
  2226. wled->boost_duty_ns = temp_val;
  2227. } else if (rc != -EINVAL) {
  2228. dev_err(&pdev->dev, "Unable to read boost duty\n");
  2229. return rc;
  2230. }
  2231. wled->mod_freq_khz = QPNP_WLED_MOD_FREQ_9600_KHZ;
  2232. rc = of_property_read_u32(pdev->dev.of_node,
  2233. "qcom,mod-freq-khz", &temp_val);
  2234. if (!rc) {
  2235. wled->mod_freq_khz = temp_val;
  2236. } else if (rc != -EINVAL) {
  2237. dev_err(&pdev->dev, "Unable to read modulation freq\n");
  2238. return rc;
  2239. }
  2240. wled->dim_mode = QPNP_WLED_DIM_HYBRID;
  2241. rc = of_property_read_string(pdev->dev.of_node,
  2242. "qcom,dim-mode", &temp_str);
  2243. if (!rc) {
  2244. if (strcmp(temp_str, "analog") == 0)
  2245. wled->dim_mode = QPNP_WLED_DIM_ANALOG;
  2246. else if (strcmp(temp_str, "digital") == 0)
  2247. wled->dim_mode = QPNP_WLED_DIM_DIGITAL;
  2248. else
  2249. wled->dim_mode = QPNP_WLED_DIM_HYBRID;
  2250. } else if (rc != -EINVAL) {
  2251. dev_err(&pdev->dev, "Unable to read dim mode\n");
  2252. return rc;
  2253. }
  2254. if (wled->dim_mode == QPNP_WLED_DIM_HYBRID) {
  2255. wled->hyb_thres = QPNP_WLED_DEF_HYB_THRES;
  2256. rc = of_property_read_u32(pdev->dev.of_node,
  2257. "qcom,hyb-thres", &temp_val);
  2258. if (!rc) {
  2259. wled->hyb_thres = temp_val;
  2260. } else if (rc != -EINVAL) {
  2261. dev_err(&pdev->dev, "Unable to read hyb threshold\n");
  2262. return rc;
  2263. }
  2264. }
  2265. wled->sync_dly_us = QPNP_WLED_DEF_SYNC_DLY_US;
  2266. rc = of_property_read_u32(pdev->dev.of_node,
  2267. "qcom,sync-dly-us", &temp_val);
  2268. if (!rc) {
  2269. wled->sync_dly_us = temp_val;
  2270. } else if (rc != -EINVAL) {
  2271. dev_err(&pdev->dev, "Unable to read sync delay\n");
  2272. return rc;
  2273. }
  2274. wled->fs_curr_ua = QPNP_WLED_FS_CURR_MAX_UA;
  2275. rc = of_property_read_u32(pdev->dev.of_node,
  2276. "qcom,fs-curr-ua", &temp_val);
  2277. if (!rc) {
  2278. wled->fs_curr_ua = temp_val;
  2279. } else if (rc != -EINVAL) {
  2280. dev_err(&pdev->dev, "Unable to read full scale current\n");
  2281. return rc;
  2282. }
  2283. wled->cons_sync_write_delay_us = 0;
  2284. rc = of_property_read_u32(pdev->dev.of_node,
  2285. "qcom,cons-sync-write-delay-us", &temp_val);
  2286. if (!rc)
  2287. wled->cons_sync_write_delay_us = temp_val;
  2288. wled->en_9b_dim_res = of_property_read_bool(pdev->dev.of_node,
  2289. "qcom,en-9b-dim-res");
  2290. wled->en_phase_stag = of_property_read_bool(pdev->dev.of_node,
  2291. "qcom,en-phase-stag");
  2292. wled->en_cabc = of_property_read_bool(pdev->dev.of_node,
  2293. "qcom,en-cabc");
  2294. if (wled->pmic_rev_id->pmic_subtype == PM660L_SUBTYPE)
  2295. wled->max_strings = QPNP_PM660_WLED_MAX_STRINGS;
  2296. else
  2297. wled->max_strings = QPNP_WLED_MAX_STRINGS;
  2298. prop = of_find_property(pdev->dev.of_node,
  2299. "qcom,led-strings-list", &temp_val);
  2300. if (!prop || !temp_val || temp_val > QPNP_WLED_MAX_STRINGS) {
  2301. dev_err(&pdev->dev, "Invalid strings info, use default");
  2302. wled->num_strings = wled->max_strings;
  2303. for (i = 0; i < wled->num_strings; i++)
  2304. wled->strings[i] = i;
  2305. } else {
  2306. wled->num_strings = temp_val;
  2307. strings = prop->value;
  2308. for (i = 0; i < wled->num_strings; ++i)
  2309. wled->strings[i] = strings[i];
  2310. }
  2311. wled->ovp_irq = platform_get_irq_byname(pdev, "ovp-irq");
  2312. if (wled->ovp_irq < 0)
  2313. dev_dbg(&pdev->dev, "ovp irq is not used\n");
  2314. wled->sc_irq = platform_get_irq_byname(pdev, "sc-irq");
  2315. if (wled->sc_irq < 0)
  2316. dev_dbg(&pdev->dev, "sc irq is not used\n");
  2317. wled->en_ext_pfet_sc_pro = of_property_read_bool(pdev->dev.of_node,
  2318. "qcom,en-ext-pfet-sc-pro");
  2319. wled->lcd_psm_ctrl = of_property_read_bool(pdev->dev.of_node,
  2320. "qcom,lcd-psm-ctrl");
  2321. wled->auto_calib_enabled = of_property_read_bool(pdev->dev.of_node,
  2322. "qcom,auto-calibration-enable");
  2323. return 0;
  2324. }
  2325. static int qpnp_wled_probe(struct platform_device *pdev)
  2326. {
  2327. struct qpnp_wled *wled;
  2328. struct device_node *revid_node;
  2329. int rc = 0, i;
  2330. const __be32 *prop;
  2331. wled = devm_kzalloc(&pdev->dev, sizeof(*wled), GFP_KERNEL);
  2332. if (!wled)
  2333. return -ENOMEM;
  2334. wled->regmap = dev_get_regmap(pdev->dev.parent, NULL);
  2335. if (!wled->regmap) {
  2336. dev_err(&pdev->dev, "Couldn't get parent's regmap\n");
  2337. return -EINVAL;
  2338. }
  2339. wled->pdev = pdev;
  2340. revid_node = of_parse_phandle(pdev->dev.of_node, "qcom,pmic-revid", 0);
  2341. if (!revid_node) {
  2342. pr_err("Missing qcom,pmic-revid property - driver failed\n");
  2343. return -EINVAL;
  2344. }
  2345. wled->pmic_rev_id = get_revid_data(revid_node);
  2346. of_node_put(revid_node);
  2347. if (IS_ERR_OR_NULL(wled->pmic_rev_id)) {
  2348. pr_err("Unable to get pmic_revid rc=%ld\n",
  2349. PTR_ERR(wled->pmic_rev_id));
  2350. /*
  2351. * the revid peripheral must be registered, any failure
  2352. * here only indicates that the rev-id module has not
  2353. * probed yet.
  2354. */
  2355. return -EPROBE_DEFER;
  2356. }
  2357. pr_debug("PMIC subtype %d Digital major %d\n",
  2358. wled->pmic_rev_id->pmic_subtype, wled->pmic_rev_id->rev4);
  2359. wled->wq = alloc_ordered_workqueue("qpnp_wled_wq", WQ_HIGHPRI);
  2360. if (!wled->wq) {
  2361. pr_err("Unable to alloc workqueue for WLED\n");
  2362. return -ENOMEM;
  2363. }
  2364. prop = of_get_address_by_name(pdev->dev.of_node, QPNP_WLED_SINK_BASE,
  2365. NULL, NULL);
  2366. if (!prop) {
  2367. dev_err(&pdev->dev, "Couldnt find sink's addr rc %d\n", rc);
  2368. return rc;
  2369. }
  2370. wled->sink_base = be32_to_cpu(*prop);
  2371. prop = of_get_address_by_name(pdev->dev.of_node, QPNP_WLED_CTRL_BASE,
  2372. NULL, NULL);
  2373. if (!prop) {
  2374. dev_err(&pdev->dev, "Couldnt find ctrl's addr rc = %d\n", rc);
  2375. return rc;
  2376. }
  2377. wled->ctrl_base = be32_to_cpu(*prop);
  2378. dev_set_drvdata(&pdev->dev, wled);
  2379. rc = qpnp_wled_parse_dt(wled);
  2380. if (rc) {
  2381. dev_err(&pdev->dev, "DT parsing failed\n");
  2382. return rc;
  2383. }
  2384. mutex_init(&wled->bus_lock);
  2385. mutex_init(&wled->lock);
  2386. rc = qpnp_wled_config(wled);
  2387. if (rc) {
  2388. dev_err(&pdev->dev, "wled config failed\n");
  2389. return rc;
  2390. }
  2391. INIT_WORK(&wled->work, qpnp_wled_work);
  2392. wled->ramp_ms = QPNP_WLED_RAMP_DLY_MS;
  2393. wled->ramp_step = 1;
  2394. wled->cdev.brightness_set = qpnp_wled_set;
  2395. wled->cdev.brightness_get = qpnp_wled_get;
  2396. wled->cdev.max_brightness = WLED_MAX_LEVEL_4095;
  2397. rc = led_classdev_register(&pdev->dev, &wled->cdev);
  2398. if (rc) {
  2399. dev_err(&pdev->dev, "wled registration failed(%d)\n", rc);
  2400. goto wled_register_fail;
  2401. }
  2402. for (i = 0; i < ARRAY_SIZE(qpnp_wled_attrs); i++) {
  2403. rc = sysfs_create_file(&wled->cdev.dev->kobj,
  2404. &qpnp_wled_attrs[i].attr);
  2405. if (rc < 0) {
  2406. dev_err(&pdev->dev, "sysfs creation failed\n");
  2407. goto sysfs_fail;
  2408. }
  2409. }
  2410. return 0;
  2411. sysfs_fail:
  2412. for (i--; i >= 0; i--)
  2413. sysfs_remove_file(&wled->cdev.dev->kobj,
  2414. &qpnp_wled_attrs[i].attr);
  2415. led_classdev_unregister(&wled->cdev);
  2416. wled_register_fail:
  2417. cancel_work_sync(&wled->work);
  2418. destroy_workqueue(wled->wq);
  2419. mutex_destroy(&wled->lock);
  2420. return rc;
  2421. }
  2422. static int qpnp_wled_remove(struct platform_device *pdev)
  2423. {
  2424. struct qpnp_wled *wled = dev_get_drvdata(&pdev->dev);
  2425. int i;
  2426. for (i = 0; i < ARRAY_SIZE(qpnp_wled_attrs); i++)
  2427. sysfs_remove_file(&wled->cdev.dev->kobj,
  2428. &qpnp_wled_attrs[i].attr);
  2429. led_classdev_unregister(&wled->cdev);
  2430. cancel_work_sync(&wled->work);
  2431. destroy_workqueue(wled->wq);
  2432. mutex_destroy(&wled->lock);
  2433. return 0;
  2434. }
  2435. static const struct of_device_id spmi_match_table[] = {
  2436. { .compatible = "qcom,qpnp-wled",},
  2437. { },
  2438. };
  2439. static struct platform_driver qpnp_wled_driver = {
  2440. .driver = {
  2441. .name = "qcom,qpnp-wled",
  2442. .of_match_table = spmi_match_table,
  2443. },
  2444. .probe = qpnp_wled_probe,
  2445. .remove = qpnp_wled_remove,
  2446. };
  2447. static int __init qpnp_wled_init(void)
  2448. {
  2449. return platform_driver_register(&qpnp_wled_driver);
  2450. }
  2451. subsys_initcall(qpnp_wled_init);
  2452. static void __exit qpnp_wled_exit(void)
  2453. {
  2454. platform_driver_unregister(&qpnp_wled_driver);
  2455. }
  2456. module_exit(qpnp_wled_exit);
  2457. MODULE_DESCRIPTION("QPNP WLED driver");
  2458. MODULE_LICENSE("GPL v2");
  2459. MODULE_ALIAS("leds:leds-qpnp-wled");