via-pmu.c 62 KB

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  1. /*
  2. * Device driver for the via-pmu on Apple Powermacs.
  3. *
  4. * The VIA (versatile interface adapter) interfaces to the PMU,
  5. * a 6805 microprocessor core whose primary function is to control
  6. * battery charging and system power on the PowerBook 3400 and 2400.
  7. * The PMU also controls the ADB (Apple Desktop Bus) which connects
  8. * to the keyboard and mouse, as well as the non-volatile RAM
  9. * and the RTC (real time clock) chip.
  10. *
  11. * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
  12. * Copyright (C) 2001-2002 Benjamin Herrenschmidt
  13. * Copyright (C) 2006-2007 Johannes Berg
  14. *
  15. * THIS DRIVER IS BECOMING A TOTAL MESS !
  16. * - Cleanup atomically disabling reply to PMU events after
  17. * a sleep or a freq. switch
  18. *
  19. */
  20. #include <stdarg.h>
  21. #include <linux/mutex.h>
  22. #include <linux/types.h>
  23. #include <linux/errno.h>
  24. #include <linux/kernel.h>
  25. #include <linux/delay.h>
  26. #include <linux/sched.h>
  27. #include <linux/miscdevice.h>
  28. #include <linux/blkdev.h>
  29. #include <linux/pci.h>
  30. #include <linux/slab.h>
  31. #include <linux/poll.h>
  32. #include <linux/adb.h>
  33. #include <linux/pmu.h>
  34. #include <linux/cuda.h>
  35. #include <linux/module.h>
  36. #include <linux/spinlock.h>
  37. #include <linux/pm.h>
  38. #include <linux/proc_fs.h>
  39. #include <linux/seq_file.h>
  40. #include <linux/init.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/device.h>
  43. #include <linux/syscore_ops.h>
  44. #include <linux/freezer.h>
  45. #include <linux/syscalls.h>
  46. #include <linux/suspend.h>
  47. #include <linux/cpu.h>
  48. #include <linux/compat.h>
  49. #include <linux/of_address.h>
  50. #include <linux/of_irq.h>
  51. #include <asm/prom.h>
  52. #include <asm/machdep.h>
  53. #include <asm/io.h>
  54. #include <asm/pgtable.h>
  55. #include <asm/sections.h>
  56. #include <asm/irq.h>
  57. #include <asm/pmac_feature.h>
  58. #include <asm/pmac_pfunc.h>
  59. #include <asm/pmac_low_i2c.h>
  60. #include <asm/uaccess.h>
  61. #include <asm/mmu_context.h>
  62. #include <asm/cputable.h>
  63. #include <asm/time.h>
  64. #include <asm/backlight.h>
  65. #include "via-pmu-event.h"
  66. /* Some compile options */
  67. #undef DEBUG_SLEEP
  68. /* Misc minor number allocated for /dev/pmu */
  69. #define PMU_MINOR 154
  70. /* How many iterations between battery polls */
  71. #define BATTERY_POLLING_COUNT 2
  72. static DEFINE_MUTEX(pmu_info_proc_mutex);
  73. static volatile unsigned char __iomem *via;
  74. /* VIA registers - spaced 0x200 bytes apart */
  75. #define RS 0x200 /* skip between registers */
  76. #define B 0 /* B-side data */
  77. #define A RS /* A-side data */
  78. #define DIRB (2*RS) /* B-side direction (1=output) */
  79. #define DIRA (3*RS) /* A-side direction (1=output) */
  80. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  81. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  82. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  83. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  84. #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
  85. #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
  86. #define SR (10*RS) /* Shift register */
  87. #define ACR (11*RS) /* Auxiliary control register */
  88. #define PCR (12*RS) /* Peripheral control register */
  89. #define IFR (13*RS) /* Interrupt flag register */
  90. #define IER (14*RS) /* Interrupt enable register */
  91. #define ANH (15*RS) /* A-side data, no handshake */
  92. /* Bits in B data register: both active low */
  93. #define TACK 0x08 /* Transfer acknowledge (input) */
  94. #define TREQ 0x10 /* Transfer request (output) */
  95. /* Bits in ACR */
  96. #define SR_CTRL 0x1c /* Shift register control bits */
  97. #define SR_EXT 0x0c /* Shift on external clock */
  98. #define SR_OUT 0x10 /* Shift out if 1 */
  99. /* Bits in IFR and IER */
  100. #define IER_SET 0x80 /* set bits in IER */
  101. #define IER_CLR 0 /* clear bits in IER */
  102. #define SR_INT 0x04 /* Shift register full/empty */
  103. #define CB2_INT 0x08
  104. #define CB1_INT 0x10 /* transition on CB1 input */
  105. static volatile enum pmu_state {
  106. idle,
  107. sending,
  108. intack,
  109. reading,
  110. reading_intr,
  111. locked,
  112. } pmu_state;
  113. static volatile enum int_data_state {
  114. int_data_empty,
  115. int_data_fill,
  116. int_data_ready,
  117. int_data_flush
  118. } int_data_state[2] = { int_data_empty, int_data_empty };
  119. static struct adb_request *current_req;
  120. static struct adb_request *last_req;
  121. static struct adb_request *req_awaiting_reply;
  122. static unsigned char interrupt_data[2][32];
  123. static int interrupt_data_len[2];
  124. static int int_data_last;
  125. static unsigned char *reply_ptr;
  126. static int data_index;
  127. static int data_len;
  128. static volatile int adb_int_pending;
  129. static volatile int disable_poll;
  130. static struct device_node *vias;
  131. static int pmu_kind = PMU_UNKNOWN;
  132. static int pmu_fully_inited;
  133. static int pmu_has_adb;
  134. static struct device_node *gpio_node;
  135. static unsigned char __iomem *gpio_reg;
  136. static int gpio_irq = 0;
  137. static int gpio_irq_enabled = -1;
  138. static volatile int pmu_suspended;
  139. static spinlock_t pmu_lock;
  140. static u8 pmu_intr_mask;
  141. static int pmu_version;
  142. static int drop_interrupts;
  143. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  144. static int option_lid_wakeup = 1;
  145. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  146. static unsigned long async_req_locks;
  147. static unsigned int pmu_irq_stats[11];
  148. static struct proc_dir_entry *proc_pmu_root;
  149. static struct proc_dir_entry *proc_pmu_info;
  150. static struct proc_dir_entry *proc_pmu_irqstats;
  151. static struct proc_dir_entry *proc_pmu_options;
  152. static int option_server_mode;
  153. int pmu_battery_count;
  154. int pmu_cur_battery;
  155. unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
  156. struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
  157. static int query_batt_timer = BATTERY_POLLING_COUNT;
  158. static struct adb_request batt_req;
  159. static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
  160. int __fake_sleep;
  161. int asleep;
  162. #ifdef CONFIG_ADB
  163. static int adb_dev_map;
  164. static int pmu_adb_flags;
  165. static int pmu_probe(void);
  166. static int pmu_init(void);
  167. static int pmu_send_request(struct adb_request *req, int sync);
  168. static int pmu_adb_autopoll(int devs);
  169. static int pmu_adb_reset_bus(void);
  170. #endif /* CONFIG_ADB */
  171. static int init_pmu(void);
  172. static void pmu_start(void);
  173. static irqreturn_t via_pmu_interrupt(int irq, void *arg);
  174. static irqreturn_t gpio1_interrupt(int irq, void *arg);
  175. static const struct file_operations pmu_info_proc_fops;
  176. static const struct file_operations pmu_irqstats_proc_fops;
  177. static void pmu_pass_intr(unsigned char *data, int len);
  178. static const struct file_operations pmu_battery_proc_fops;
  179. static const struct file_operations pmu_options_proc_fops;
  180. #ifdef CONFIG_ADB
  181. struct adb_driver via_pmu_driver = {
  182. "PMU",
  183. pmu_probe,
  184. pmu_init,
  185. pmu_send_request,
  186. pmu_adb_autopoll,
  187. pmu_poll_adb,
  188. pmu_adb_reset_bus
  189. };
  190. #endif /* CONFIG_ADB */
  191. extern void low_sleep_handler(void);
  192. extern void enable_kernel_altivec(void);
  193. extern void enable_kernel_fp(void);
  194. #ifdef DEBUG_SLEEP
  195. int pmu_polled_request(struct adb_request *req);
  196. void pmu_blink(int n);
  197. #endif
  198. /*
  199. * This table indicates for each PMU opcode:
  200. * - the number of data bytes to be sent with the command, or -1
  201. * if a length byte should be sent,
  202. * - the number of response bytes which the PMU will return, or
  203. * -1 if it will send a length byte.
  204. */
  205. static const s8 pmu_data_len[256][2] = {
  206. /* 0 1 2 3 4 5 6 7 */
  207. /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  208. /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  209. /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  210. /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
  211. /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
  212. /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
  213. /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  214. /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
  215. /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  216. /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
  217. /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
  218. /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
  219. /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  220. /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
  221. /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  222. /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
  223. /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  224. /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  225. /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  226. /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  227. /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
  228. /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  229. /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  230. /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  231. /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  232. /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  233. /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  234. /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
  235. /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
  236. /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
  237. /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  238. /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  239. };
  240. static char *pbook_type[] = {
  241. "Unknown PowerBook",
  242. "PowerBook 2400/3400/3500(G3)",
  243. "PowerBook G3 Series",
  244. "1999 PowerBook G3",
  245. "Core99"
  246. };
  247. int __init find_via_pmu(void)
  248. {
  249. u64 taddr;
  250. const u32 *reg;
  251. if (via != 0)
  252. return 1;
  253. vias = of_find_node_by_name(NULL, "via-pmu");
  254. if (vias == NULL)
  255. return 0;
  256. reg = of_get_property(vias, "reg", NULL);
  257. if (reg == NULL) {
  258. printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
  259. goto fail;
  260. }
  261. taddr = of_translate_address(vias, reg);
  262. if (taddr == OF_BAD_ADDR) {
  263. printk(KERN_ERR "via-pmu: Can't translate address !\n");
  264. goto fail;
  265. }
  266. spin_lock_init(&pmu_lock);
  267. pmu_has_adb = 1;
  268. pmu_intr_mask = PMU_INT_PCEJECT |
  269. PMU_INT_SNDBRT |
  270. PMU_INT_ADB |
  271. PMU_INT_TICK;
  272. if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
  273. || of_device_is_compatible(vias->parent, "ohare")))
  274. pmu_kind = PMU_OHARE_BASED;
  275. else if (of_device_is_compatible(vias->parent, "paddington"))
  276. pmu_kind = PMU_PADDINGTON_BASED;
  277. else if (of_device_is_compatible(vias->parent, "heathrow"))
  278. pmu_kind = PMU_HEATHROW_BASED;
  279. else if (of_device_is_compatible(vias->parent, "Keylargo")
  280. || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
  281. struct device_node *gpiop;
  282. struct device_node *adbp;
  283. u64 gaddr = OF_BAD_ADDR;
  284. pmu_kind = PMU_KEYLARGO_BASED;
  285. adbp = of_find_node_by_type(NULL, "adb");
  286. pmu_has_adb = (adbp != NULL);
  287. of_node_put(adbp);
  288. pmu_intr_mask = PMU_INT_PCEJECT |
  289. PMU_INT_SNDBRT |
  290. PMU_INT_ADB |
  291. PMU_INT_TICK |
  292. PMU_INT_ENVIRONMENT;
  293. gpiop = of_find_node_by_name(NULL, "gpio");
  294. if (gpiop) {
  295. reg = of_get_property(gpiop, "reg", NULL);
  296. if (reg)
  297. gaddr = of_translate_address(gpiop, reg);
  298. if (gaddr != OF_BAD_ADDR)
  299. gpio_reg = ioremap(gaddr, 0x10);
  300. of_node_put(gpiop);
  301. }
  302. if (gpio_reg == NULL) {
  303. printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
  304. goto fail;
  305. }
  306. } else
  307. pmu_kind = PMU_UNKNOWN;
  308. via = ioremap(taddr, 0x2000);
  309. if (via == NULL) {
  310. printk(KERN_ERR "via-pmu: Can't map address !\n");
  311. goto fail_via_remap;
  312. }
  313. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  314. out_8(&via[IFR], 0x7f); /* clear IFR */
  315. pmu_state = idle;
  316. if (!init_pmu())
  317. goto fail_init;
  318. printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
  319. PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
  320. sys_ctrler = SYS_CTRLER_PMU;
  321. return 1;
  322. fail_init:
  323. iounmap(via);
  324. via = NULL;
  325. fail_via_remap:
  326. iounmap(gpio_reg);
  327. gpio_reg = NULL;
  328. fail:
  329. of_node_put(vias);
  330. vias = NULL;
  331. return 0;
  332. }
  333. #ifdef CONFIG_ADB
  334. static int pmu_probe(void)
  335. {
  336. return vias == NULL? -ENODEV: 0;
  337. }
  338. static int __init pmu_init(void)
  339. {
  340. if (vias == NULL)
  341. return -ENODEV;
  342. return 0;
  343. }
  344. #endif /* CONFIG_ADB */
  345. /*
  346. * We can't wait until pmu_init gets called, that happens too late.
  347. * It happens after IDE and SCSI initialization, which can take a few
  348. * seconds, and by that time the PMU could have given up on us and
  349. * turned us off.
  350. * Thus this is called with arch_initcall rather than device_initcall.
  351. */
  352. static int __init via_pmu_start(void)
  353. {
  354. unsigned int irq;
  355. if (vias == NULL)
  356. return -ENODEV;
  357. batt_req.complete = 1;
  358. irq = irq_of_parse_and_map(vias, 0);
  359. if (!irq) {
  360. printk(KERN_ERR "via-pmu: can't map interrupt\n");
  361. return -ENODEV;
  362. }
  363. /* We set IRQF_NO_SUSPEND because we don't want the interrupt
  364. * to be disabled between the 2 passes of driver suspend, we
  365. * control our own disabling for that one
  366. */
  367. if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
  368. "VIA-PMU", (void *)0)) {
  369. printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
  370. return -ENODEV;
  371. }
  372. if (pmu_kind == PMU_KEYLARGO_BASED) {
  373. gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
  374. if (gpio_node == NULL)
  375. gpio_node = of_find_node_by_name(NULL,
  376. "pmu-interrupt");
  377. if (gpio_node)
  378. gpio_irq = irq_of_parse_and_map(gpio_node, 0);
  379. if (gpio_irq) {
  380. if (request_irq(gpio_irq, gpio1_interrupt,
  381. IRQF_NO_SUSPEND, "GPIO1 ADB",
  382. (void *)0))
  383. printk(KERN_ERR "pmu: can't get irq %d"
  384. " (GPIO1)\n", gpio_irq);
  385. else
  386. gpio_irq_enabled = 1;
  387. }
  388. }
  389. /* Enable interrupts */
  390. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  391. pmu_fully_inited = 1;
  392. /* Make sure PMU settle down before continuing. This is _very_ important
  393. * since the IDE probe may shut interrupts down for quite a bit of time. If
  394. * a PMU communication is pending while this happens, the PMU may timeout
  395. * Not that on Core99 machines, the PMU keeps sending us environement
  396. * messages, we should find a way to either fix IDE or make it call
  397. * pmu_suspend() before masking interrupts. This can also happens while
  398. * scolling with some fbdevs.
  399. */
  400. do {
  401. pmu_poll();
  402. } while (pmu_state != idle);
  403. return 0;
  404. }
  405. arch_initcall(via_pmu_start);
  406. /*
  407. * This has to be done after pci_init, which is a subsys_initcall.
  408. */
  409. static int __init via_pmu_dev_init(void)
  410. {
  411. if (vias == NULL)
  412. return -ENODEV;
  413. #ifdef CONFIG_PMAC_BACKLIGHT
  414. /* Initialize backlight */
  415. pmu_backlight_init();
  416. #endif
  417. #ifdef CONFIG_PPC32
  418. if (of_machine_is_compatible("AAPL,3400/2400") ||
  419. of_machine_is_compatible("AAPL,3500")) {
  420. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  421. NULL, PMAC_MB_INFO_MODEL, 0);
  422. pmu_battery_count = 1;
  423. if (mb == PMAC_TYPE_COMET)
  424. pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
  425. else
  426. pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
  427. } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
  428. of_machine_is_compatible("PowerBook1,1")) {
  429. pmu_battery_count = 2;
  430. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  431. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  432. } else {
  433. struct device_node* prim =
  434. of_find_node_by_name(NULL, "power-mgt");
  435. const u32 *prim_info = NULL;
  436. if (prim)
  437. prim_info = of_get_property(prim, "prim-info", NULL);
  438. if (prim_info) {
  439. /* Other stuffs here yet unknown */
  440. pmu_battery_count = (prim_info[6] >> 16) & 0xff;
  441. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  442. if (pmu_battery_count > 1)
  443. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  444. }
  445. of_node_put(prim);
  446. }
  447. #endif /* CONFIG_PPC32 */
  448. /* Create /proc/pmu */
  449. proc_pmu_root = proc_mkdir("pmu", NULL);
  450. if (proc_pmu_root) {
  451. long i;
  452. for (i=0; i<pmu_battery_count; i++) {
  453. char title[16];
  454. sprintf(title, "battery_%ld", i);
  455. proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root,
  456. &pmu_battery_proc_fops, (void *)i);
  457. }
  458. proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops);
  459. proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root,
  460. &pmu_irqstats_proc_fops);
  461. proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
  462. &pmu_options_proc_fops);
  463. }
  464. return 0;
  465. }
  466. device_initcall(via_pmu_dev_init);
  467. static int
  468. init_pmu(void)
  469. {
  470. int timeout;
  471. struct adb_request req;
  472. /* Negate TREQ. Set TACK to input and TREQ to output. */
  473. out_8(&via[B], in_8(&via[B]) | TREQ);
  474. out_8(&via[DIRB], (in_8(&via[DIRB]) | TREQ) & ~TACK);
  475. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  476. timeout = 100000;
  477. while (!req.complete) {
  478. if (--timeout < 0) {
  479. printk(KERN_ERR "init_pmu: no response from PMU\n");
  480. return 0;
  481. }
  482. udelay(10);
  483. pmu_poll();
  484. }
  485. /* ack all pending interrupts */
  486. timeout = 100000;
  487. interrupt_data[0][0] = 1;
  488. while (interrupt_data[0][0] || pmu_state != idle) {
  489. if (--timeout < 0) {
  490. printk(KERN_ERR "init_pmu: timed out acking intrs\n");
  491. return 0;
  492. }
  493. if (pmu_state == idle)
  494. adb_int_pending = 1;
  495. via_pmu_interrupt(0, NULL);
  496. udelay(10);
  497. }
  498. /* Tell PMU we are ready. */
  499. if (pmu_kind == PMU_KEYLARGO_BASED) {
  500. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  501. while (!req.complete)
  502. pmu_poll();
  503. }
  504. /* Read PMU version */
  505. pmu_request(&req, NULL, 1, PMU_GET_VERSION);
  506. pmu_wait_complete(&req);
  507. if (req.reply_len > 0)
  508. pmu_version = req.reply[0];
  509. /* Read server mode setting */
  510. if (pmu_kind == PMU_KEYLARGO_BASED) {
  511. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
  512. PMU_PWR_GET_POWERUP_EVENTS);
  513. pmu_wait_complete(&req);
  514. if (req.reply_len == 2) {
  515. if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
  516. option_server_mode = 1;
  517. printk(KERN_INFO "via-pmu: Server Mode is %s\n",
  518. option_server_mode ? "enabled" : "disabled");
  519. }
  520. }
  521. return 1;
  522. }
  523. int
  524. pmu_get_model(void)
  525. {
  526. return pmu_kind;
  527. }
  528. static void pmu_set_server_mode(int server_mode)
  529. {
  530. struct adb_request req;
  531. if (pmu_kind != PMU_KEYLARGO_BASED)
  532. return;
  533. option_server_mode = server_mode;
  534. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
  535. pmu_wait_complete(&req);
  536. if (req.reply_len < 2)
  537. return;
  538. if (server_mode)
  539. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  540. PMU_PWR_SET_POWERUP_EVENTS,
  541. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  542. else
  543. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  544. PMU_PWR_CLR_POWERUP_EVENTS,
  545. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  546. pmu_wait_complete(&req);
  547. }
  548. /* This new version of the code for 2400/3400/3500 powerbooks
  549. * is inspired from the implementation in gkrellm-pmu
  550. */
  551. static void
  552. done_battery_state_ohare(struct adb_request* req)
  553. {
  554. /* format:
  555. * [0] : flags
  556. * 0x01 : AC indicator
  557. * 0x02 : charging
  558. * 0x04 : battery exist
  559. * 0x08 :
  560. * 0x10 :
  561. * 0x20 : full charged
  562. * 0x40 : pcharge reset
  563. * 0x80 : battery exist
  564. *
  565. * [1][2] : battery voltage
  566. * [3] : CPU temperature
  567. * [4] : battery temperature
  568. * [5] : current
  569. * [6][7] : pcharge
  570. * --tkoba
  571. */
  572. unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
  573. long pcharge, charge, vb, vmax, lmax;
  574. long vmax_charging, vmax_charged;
  575. long amperage, voltage, time, max;
  576. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  577. NULL, PMAC_MB_INFO_MODEL, 0);
  578. if (req->reply[0] & 0x01)
  579. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  580. else
  581. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  582. if (mb == PMAC_TYPE_COMET) {
  583. vmax_charged = 189;
  584. vmax_charging = 213;
  585. lmax = 6500;
  586. } else {
  587. vmax_charged = 330;
  588. vmax_charging = 330;
  589. lmax = 6500;
  590. }
  591. vmax = vmax_charged;
  592. /* If battery installed */
  593. if (req->reply[0] & 0x04) {
  594. bat_flags |= PMU_BATT_PRESENT;
  595. if (req->reply[0] & 0x02)
  596. bat_flags |= PMU_BATT_CHARGING;
  597. vb = (req->reply[1] << 8) | req->reply[2];
  598. voltage = (vb * 265 + 72665) / 10;
  599. amperage = req->reply[5];
  600. if ((req->reply[0] & 0x01) == 0) {
  601. if (amperage > 200)
  602. vb += ((amperage - 200) * 15)/100;
  603. } else if (req->reply[0] & 0x02) {
  604. vb = (vb * 97) / 100;
  605. vmax = vmax_charging;
  606. }
  607. charge = (100 * vb) / vmax;
  608. if (req->reply[0] & 0x40) {
  609. pcharge = (req->reply[6] << 8) + req->reply[7];
  610. if (pcharge > lmax)
  611. pcharge = lmax;
  612. pcharge *= 100;
  613. pcharge = 100 - pcharge / lmax;
  614. if (pcharge < charge)
  615. charge = pcharge;
  616. }
  617. if (amperage > 0)
  618. time = (charge * 16440) / amperage;
  619. else
  620. time = 0;
  621. max = 100;
  622. amperage = -amperage;
  623. } else
  624. charge = max = amperage = voltage = time = 0;
  625. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  626. pmu_batteries[pmu_cur_battery].charge = charge;
  627. pmu_batteries[pmu_cur_battery].max_charge = max;
  628. pmu_batteries[pmu_cur_battery].amperage = amperage;
  629. pmu_batteries[pmu_cur_battery].voltage = voltage;
  630. pmu_batteries[pmu_cur_battery].time_remaining = time;
  631. clear_bit(0, &async_req_locks);
  632. }
  633. static void
  634. done_battery_state_smart(struct adb_request* req)
  635. {
  636. /* format:
  637. * [0] : format of this structure (known: 3,4,5)
  638. * [1] : flags
  639. *
  640. * format 3 & 4:
  641. *
  642. * [2] : charge
  643. * [3] : max charge
  644. * [4] : current
  645. * [5] : voltage
  646. *
  647. * format 5:
  648. *
  649. * [2][3] : charge
  650. * [4][5] : max charge
  651. * [6][7] : current
  652. * [8][9] : voltage
  653. */
  654. unsigned int bat_flags = PMU_BATT_TYPE_SMART;
  655. int amperage;
  656. unsigned int capa, max, voltage;
  657. if (req->reply[1] & 0x01)
  658. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  659. else
  660. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  661. capa = max = amperage = voltage = 0;
  662. if (req->reply[1] & 0x04) {
  663. bat_flags |= PMU_BATT_PRESENT;
  664. switch(req->reply[0]) {
  665. case 3:
  666. case 4: capa = req->reply[2];
  667. max = req->reply[3];
  668. amperage = *((signed char *)&req->reply[4]);
  669. voltage = req->reply[5];
  670. break;
  671. case 5: capa = (req->reply[2] << 8) | req->reply[3];
  672. max = (req->reply[4] << 8) | req->reply[5];
  673. amperage = *((signed short *)&req->reply[6]);
  674. voltage = (req->reply[8] << 8) | req->reply[9];
  675. break;
  676. default:
  677. pr_warn("pmu.c: unrecognized battery info, "
  678. "len: %d, %4ph\n", req->reply_len,
  679. req->reply);
  680. break;
  681. }
  682. }
  683. if ((req->reply[1] & 0x01) && (amperage > 0))
  684. bat_flags |= PMU_BATT_CHARGING;
  685. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  686. pmu_batteries[pmu_cur_battery].charge = capa;
  687. pmu_batteries[pmu_cur_battery].max_charge = max;
  688. pmu_batteries[pmu_cur_battery].amperage = amperage;
  689. pmu_batteries[pmu_cur_battery].voltage = voltage;
  690. if (amperage) {
  691. if ((req->reply[1] & 0x01) && (amperage > 0))
  692. pmu_batteries[pmu_cur_battery].time_remaining
  693. = ((max-capa) * 3600) / amperage;
  694. else
  695. pmu_batteries[pmu_cur_battery].time_remaining
  696. = (capa * 3600) / (-amperage);
  697. } else
  698. pmu_batteries[pmu_cur_battery].time_remaining = 0;
  699. pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
  700. clear_bit(0, &async_req_locks);
  701. }
  702. static void
  703. query_battery_state(void)
  704. {
  705. if (test_and_set_bit(0, &async_req_locks))
  706. return;
  707. if (pmu_kind == PMU_OHARE_BASED)
  708. pmu_request(&batt_req, done_battery_state_ohare,
  709. 1, PMU_BATTERY_STATE);
  710. else
  711. pmu_request(&batt_req, done_battery_state_smart,
  712. 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
  713. }
  714. static int pmu_info_proc_show(struct seq_file *m, void *v)
  715. {
  716. seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
  717. seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
  718. seq_printf(m, "AC Power : %d\n",
  719. ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
  720. seq_printf(m, "Battery count : %d\n", pmu_battery_count);
  721. return 0;
  722. }
  723. static int pmu_info_proc_open(struct inode *inode, struct file *file)
  724. {
  725. return single_open(file, pmu_info_proc_show, NULL);
  726. }
  727. static const struct file_operations pmu_info_proc_fops = {
  728. .owner = THIS_MODULE,
  729. .open = pmu_info_proc_open,
  730. .read = seq_read,
  731. .llseek = seq_lseek,
  732. .release = single_release,
  733. };
  734. static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
  735. {
  736. int i;
  737. static const char *irq_names[] = {
  738. "Total CB1 triggered events",
  739. "Total GPIO1 triggered events",
  740. "PC-Card eject button",
  741. "Sound/Brightness button",
  742. "ADB message",
  743. "Battery state change",
  744. "Environment interrupt",
  745. "Tick timer",
  746. "Ghost interrupt (zero len)",
  747. "Empty interrupt (empty mask)",
  748. "Max irqs in a row"
  749. };
  750. for (i=0; i<11; i++) {
  751. seq_printf(m, " %2u: %10u (%s)\n",
  752. i, pmu_irq_stats[i], irq_names[i]);
  753. }
  754. return 0;
  755. }
  756. static int pmu_irqstats_proc_open(struct inode *inode, struct file *file)
  757. {
  758. return single_open(file, pmu_irqstats_proc_show, NULL);
  759. }
  760. static const struct file_operations pmu_irqstats_proc_fops = {
  761. .owner = THIS_MODULE,
  762. .open = pmu_irqstats_proc_open,
  763. .read = seq_read,
  764. .llseek = seq_lseek,
  765. .release = single_release,
  766. };
  767. static int pmu_battery_proc_show(struct seq_file *m, void *v)
  768. {
  769. long batnum = (long)m->private;
  770. seq_putc(m, '\n');
  771. seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
  772. seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
  773. seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
  774. seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
  775. seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
  776. seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
  777. return 0;
  778. }
  779. static int pmu_battery_proc_open(struct inode *inode, struct file *file)
  780. {
  781. return single_open(file, pmu_battery_proc_show, PDE_DATA(inode));
  782. }
  783. static const struct file_operations pmu_battery_proc_fops = {
  784. .owner = THIS_MODULE,
  785. .open = pmu_battery_proc_open,
  786. .read = seq_read,
  787. .llseek = seq_lseek,
  788. .release = single_release,
  789. };
  790. static int pmu_options_proc_show(struct seq_file *m, void *v)
  791. {
  792. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  793. if (pmu_kind == PMU_KEYLARGO_BASED &&
  794. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  795. seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
  796. #endif
  797. if (pmu_kind == PMU_KEYLARGO_BASED)
  798. seq_printf(m, "server_mode=%d\n", option_server_mode);
  799. return 0;
  800. }
  801. static int pmu_options_proc_open(struct inode *inode, struct file *file)
  802. {
  803. return single_open(file, pmu_options_proc_show, NULL);
  804. }
  805. static ssize_t pmu_options_proc_write(struct file *file,
  806. const char __user *buffer, size_t count, loff_t *pos)
  807. {
  808. char tmp[33];
  809. char *label, *val;
  810. size_t fcount = count;
  811. if (!count)
  812. return -EINVAL;
  813. if (count > 32)
  814. count = 32;
  815. if (copy_from_user(tmp, buffer, count))
  816. return -EFAULT;
  817. tmp[count] = 0;
  818. label = tmp;
  819. while(*label == ' ')
  820. label++;
  821. val = label;
  822. while(*val && (*val != '=')) {
  823. if (*val == ' ')
  824. *val = 0;
  825. val++;
  826. }
  827. if ((*val) == 0)
  828. return -EINVAL;
  829. *(val++) = 0;
  830. while(*val == ' ')
  831. val++;
  832. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  833. if (pmu_kind == PMU_KEYLARGO_BASED &&
  834. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  835. if (!strcmp(label, "lid_wakeup"))
  836. option_lid_wakeup = ((*val) == '1');
  837. #endif
  838. if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
  839. int new_value;
  840. new_value = ((*val) == '1');
  841. if (new_value != option_server_mode)
  842. pmu_set_server_mode(new_value);
  843. }
  844. return fcount;
  845. }
  846. static const struct file_operations pmu_options_proc_fops = {
  847. .owner = THIS_MODULE,
  848. .open = pmu_options_proc_open,
  849. .read = seq_read,
  850. .llseek = seq_lseek,
  851. .release = single_release,
  852. .write = pmu_options_proc_write,
  853. };
  854. #ifdef CONFIG_ADB
  855. /* Send an ADB command */
  856. static int pmu_send_request(struct adb_request *req, int sync)
  857. {
  858. int i, ret;
  859. if ((vias == NULL) || (!pmu_fully_inited)) {
  860. req->complete = 1;
  861. return -ENXIO;
  862. }
  863. ret = -EINVAL;
  864. switch (req->data[0]) {
  865. case PMU_PACKET:
  866. for (i = 0; i < req->nbytes - 1; ++i)
  867. req->data[i] = req->data[i+1];
  868. --req->nbytes;
  869. if (pmu_data_len[req->data[0]][1] != 0) {
  870. req->reply[0] = ADB_RET_OK;
  871. req->reply_len = 1;
  872. } else
  873. req->reply_len = 0;
  874. ret = pmu_queue_request(req);
  875. break;
  876. case CUDA_PACKET:
  877. switch (req->data[1]) {
  878. case CUDA_GET_TIME:
  879. if (req->nbytes != 2)
  880. break;
  881. req->data[0] = PMU_READ_RTC;
  882. req->nbytes = 1;
  883. req->reply_len = 3;
  884. req->reply[0] = CUDA_PACKET;
  885. req->reply[1] = 0;
  886. req->reply[2] = CUDA_GET_TIME;
  887. ret = pmu_queue_request(req);
  888. break;
  889. case CUDA_SET_TIME:
  890. if (req->nbytes != 6)
  891. break;
  892. req->data[0] = PMU_SET_RTC;
  893. req->nbytes = 5;
  894. for (i = 1; i <= 4; ++i)
  895. req->data[i] = req->data[i+1];
  896. req->reply_len = 3;
  897. req->reply[0] = CUDA_PACKET;
  898. req->reply[1] = 0;
  899. req->reply[2] = CUDA_SET_TIME;
  900. ret = pmu_queue_request(req);
  901. break;
  902. }
  903. break;
  904. case ADB_PACKET:
  905. if (!pmu_has_adb)
  906. return -ENXIO;
  907. for (i = req->nbytes - 1; i > 1; --i)
  908. req->data[i+2] = req->data[i];
  909. req->data[3] = req->nbytes - 2;
  910. req->data[2] = pmu_adb_flags;
  911. /*req->data[1] = req->data[1];*/
  912. req->data[0] = PMU_ADB_CMD;
  913. req->nbytes += 2;
  914. req->reply_expected = 1;
  915. req->reply_len = 0;
  916. ret = pmu_queue_request(req);
  917. break;
  918. }
  919. if (ret) {
  920. req->complete = 1;
  921. return ret;
  922. }
  923. if (sync)
  924. while (!req->complete)
  925. pmu_poll();
  926. return 0;
  927. }
  928. /* Enable/disable autopolling */
  929. static int __pmu_adb_autopoll(int devs)
  930. {
  931. struct adb_request req;
  932. if (devs) {
  933. pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
  934. adb_dev_map >> 8, adb_dev_map);
  935. pmu_adb_flags = 2;
  936. } else {
  937. pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
  938. pmu_adb_flags = 0;
  939. }
  940. while (!req.complete)
  941. pmu_poll();
  942. return 0;
  943. }
  944. static int pmu_adb_autopoll(int devs)
  945. {
  946. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  947. return -ENXIO;
  948. adb_dev_map = devs;
  949. return __pmu_adb_autopoll(devs);
  950. }
  951. /* Reset the ADB bus */
  952. static int pmu_adb_reset_bus(void)
  953. {
  954. struct adb_request req;
  955. int save_autopoll = adb_dev_map;
  956. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  957. return -ENXIO;
  958. /* anyone got a better idea?? */
  959. __pmu_adb_autopoll(0);
  960. req.nbytes = 4;
  961. req.done = NULL;
  962. req.data[0] = PMU_ADB_CMD;
  963. req.data[1] = ADB_BUSRESET;
  964. req.data[2] = 0;
  965. req.data[3] = 0;
  966. req.data[4] = 0;
  967. req.reply_len = 0;
  968. req.reply_expected = 1;
  969. if (pmu_queue_request(&req) != 0) {
  970. printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
  971. return -EIO;
  972. }
  973. pmu_wait_complete(&req);
  974. if (save_autopoll != 0)
  975. __pmu_adb_autopoll(save_autopoll);
  976. return 0;
  977. }
  978. #endif /* CONFIG_ADB */
  979. /* Construct and send a pmu request */
  980. int
  981. pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
  982. int nbytes, ...)
  983. {
  984. va_list list;
  985. int i;
  986. if (vias == NULL)
  987. return -ENXIO;
  988. if (nbytes < 0 || nbytes > 32) {
  989. printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
  990. req->complete = 1;
  991. return -EINVAL;
  992. }
  993. req->nbytes = nbytes;
  994. req->done = done;
  995. va_start(list, nbytes);
  996. for (i = 0; i < nbytes; ++i)
  997. req->data[i] = va_arg(list, int);
  998. va_end(list);
  999. req->reply_len = 0;
  1000. req->reply_expected = 0;
  1001. return pmu_queue_request(req);
  1002. }
  1003. int
  1004. pmu_queue_request(struct adb_request *req)
  1005. {
  1006. unsigned long flags;
  1007. int nsend;
  1008. if (via == NULL) {
  1009. req->complete = 1;
  1010. return -ENXIO;
  1011. }
  1012. if (req->nbytes <= 0) {
  1013. req->complete = 1;
  1014. return 0;
  1015. }
  1016. nsend = pmu_data_len[req->data[0]][0];
  1017. if (nsend >= 0 && req->nbytes != nsend + 1) {
  1018. req->complete = 1;
  1019. return -EINVAL;
  1020. }
  1021. req->next = NULL;
  1022. req->sent = 0;
  1023. req->complete = 0;
  1024. spin_lock_irqsave(&pmu_lock, flags);
  1025. if (current_req != 0) {
  1026. last_req->next = req;
  1027. last_req = req;
  1028. } else {
  1029. current_req = req;
  1030. last_req = req;
  1031. if (pmu_state == idle)
  1032. pmu_start();
  1033. }
  1034. spin_unlock_irqrestore(&pmu_lock, flags);
  1035. return 0;
  1036. }
  1037. static inline void
  1038. wait_for_ack(void)
  1039. {
  1040. /* Sightly increased the delay, I had one occurrence of the message
  1041. * reported
  1042. */
  1043. int timeout = 4000;
  1044. while ((in_8(&via[B]) & TACK) == 0) {
  1045. if (--timeout < 0) {
  1046. printk(KERN_ERR "PMU not responding (!ack)\n");
  1047. return;
  1048. }
  1049. udelay(10);
  1050. }
  1051. }
  1052. /* New PMU seems to be very sensitive to those timings, so we make sure
  1053. * PCI is flushed immediately */
  1054. static inline void
  1055. send_byte(int x)
  1056. {
  1057. volatile unsigned char __iomem *v = via;
  1058. out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
  1059. out_8(&v[SR], x);
  1060. out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
  1061. (void)in_8(&v[B]);
  1062. }
  1063. static inline void
  1064. recv_byte(void)
  1065. {
  1066. volatile unsigned char __iomem *v = via;
  1067. out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
  1068. in_8(&v[SR]); /* resets SR */
  1069. out_8(&v[B], in_8(&v[B]) & ~TREQ);
  1070. (void)in_8(&v[B]);
  1071. }
  1072. static inline void
  1073. pmu_done(struct adb_request *req)
  1074. {
  1075. void (*done)(struct adb_request *) = req->done;
  1076. mb();
  1077. req->complete = 1;
  1078. /* Here, we assume that if the request has a done member, the
  1079. * struct request will survive to setting req->complete to 1
  1080. */
  1081. if (done)
  1082. (*done)(req);
  1083. }
  1084. static void
  1085. pmu_start(void)
  1086. {
  1087. struct adb_request *req;
  1088. /* assert pmu_state == idle */
  1089. /* get the packet to send */
  1090. req = current_req;
  1091. if (req == 0 || pmu_state != idle
  1092. || (/*req->reply_expected && */req_awaiting_reply))
  1093. return;
  1094. pmu_state = sending;
  1095. data_index = 1;
  1096. data_len = pmu_data_len[req->data[0]][0];
  1097. /* Sounds safer to make sure ACK is high before writing. This helped
  1098. * kill a problem with ADB and some iBooks
  1099. */
  1100. wait_for_ack();
  1101. /* set the shift register to shift out and send a byte */
  1102. send_byte(req->data[0]);
  1103. }
  1104. void
  1105. pmu_poll(void)
  1106. {
  1107. if (!via)
  1108. return;
  1109. if (disable_poll)
  1110. return;
  1111. via_pmu_interrupt(0, NULL);
  1112. }
  1113. void
  1114. pmu_poll_adb(void)
  1115. {
  1116. if (!via)
  1117. return;
  1118. if (disable_poll)
  1119. return;
  1120. /* Kicks ADB read when PMU is suspended */
  1121. adb_int_pending = 1;
  1122. do {
  1123. via_pmu_interrupt(0, NULL);
  1124. } while (pmu_suspended && (adb_int_pending || pmu_state != idle
  1125. || req_awaiting_reply));
  1126. }
  1127. void
  1128. pmu_wait_complete(struct adb_request *req)
  1129. {
  1130. if (!via)
  1131. return;
  1132. while((pmu_state != idle && pmu_state != locked) || !req->complete)
  1133. via_pmu_interrupt(0, NULL);
  1134. }
  1135. /* This function loops until the PMU is idle and prevents it from
  1136. * anwsering to ADB interrupts. pmu_request can still be called.
  1137. * This is done to avoid spurrious shutdowns when we know we'll have
  1138. * interrupts switched off for a long time
  1139. */
  1140. void
  1141. pmu_suspend(void)
  1142. {
  1143. unsigned long flags;
  1144. if (!via)
  1145. return;
  1146. spin_lock_irqsave(&pmu_lock, flags);
  1147. pmu_suspended++;
  1148. if (pmu_suspended > 1) {
  1149. spin_unlock_irqrestore(&pmu_lock, flags);
  1150. return;
  1151. }
  1152. do {
  1153. spin_unlock_irqrestore(&pmu_lock, flags);
  1154. if (req_awaiting_reply)
  1155. adb_int_pending = 1;
  1156. via_pmu_interrupt(0, NULL);
  1157. spin_lock_irqsave(&pmu_lock, flags);
  1158. if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
  1159. if (gpio_irq >= 0)
  1160. disable_irq_nosync(gpio_irq);
  1161. out_8(&via[IER], CB1_INT | IER_CLR);
  1162. spin_unlock_irqrestore(&pmu_lock, flags);
  1163. break;
  1164. }
  1165. } while (1);
  1166. }
  1167. void
  1168. pmu_resume(void)
  1169. {
  1170. unsigned long flags;
  1171. if (!via || (pmu_suspended < 1))
  1172. return;
  1173. spin_lock_irqsave(&pmu_lock, flags);
  1174. pmu_suspended--;
  1175. if (pmu_suspended > 0) {
  1176. spin_unlock_irqrestore(&pmu_lock, flags);
  1177. return;
  1178. }
  1179. adb_int_pending = 1;
  1180. if (gpio_irq >= 0)
  1181. enable_irq(gpio_irq);
  1182. out_8(&via[IER], CB1_INT | IER_SET);
  1183. spin_unlock_irqrestore(&pmu_lock, flags);
  1184. pmu_poll();
  1185. }
  1186. /* Interrupt data could be the result data from an ADB cmd */
  1187. static void
  1188. pmu_handle_data(unsigned char *data, int len)
  1189. {
  1190. unsigned char ints, pirq;
  1191. int i = 0;
  1192. asleep = 0;
  1193. if (drop_interrupts || len < 1) {
  1194. adb_int_pending = 0;
  1195. pmu_irq_stats[8]++;
  1196. return;
  1197. }
  1198. /* Get PMU interrupt mask */
  1199. ints = data[0];
  1200. /* Record zero interrupts for stats */
  1201. if (ints == 0)
  1202. pmu_irq_stats[9]++;
  1203. /* Hack to deal with ADB autopoll flag */
  1204. if (ints & PMU_INT_ADB)
  1205. ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
  1206. next:
  1207. if (ints == 0) {
  1208. if (i > pmu_irq_stats[10])
  1209. pmu_irq_stats[10] = i;
  1210. return;
  1211. }
  1212. for (pirq = 0; pirq < 8; pirq++)
  1213. if (ints & (1 << pirq))
  1214. break;
  1215. pmu_irq_stats[pirq]++;
  1216. i++;
  1217. ints &= ~(1 << pirq);
  1218. /* Note: for some reason, we get an interrupt with len=1,
  1219. * data[0]==0 after each normal ADB interrupt, at least
  1220. * on the Pismo. Still investigating... --BenH
  1221. */
  1222. if ((1 << pirq) & PMU_INT_ADB) {
  1223. if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
  1224. struct adb_request *req = req_awaiting_reply;
  1225. if (req == 0) {
  1226. printk(KERN_ERR "PMU: extra ADB reply\n");
  1227. return;
  1228. }
  1229. req_awaiting_reply = NULL;
  1230. if (len <= 2)
  1231. req->reply_len = 0;
  1232. else {
  1233. memcpy(req->reply, data + 1, len - 1);
  1234. req->reply_len = len - 1;
  1235. }
  1236. pmu_done(req);
  1237. } else {
  1238. if (len == 4 && data[1] == 0x2c) {
  1239. extern int xmon_wants_key, xmon_adb_keycode;
  1240. if (xmon_wants_key) {
  1241. xmon_adb_keycode = data[2];
  1242. return;
  1243. }
  1244. }
  1245. #ifdef CONFIG_ADB
  1246. /*
  1247. * XXX On the [23]400 the PMU gives us an up
  1248. * event for keycodes 0x74 or 0x75 when the PC
  1249. * card eject buttons are released, so we
  1250. * ignore those events.
  1251. */
  1252. if (!(pmu_kind == PMU_OHARE_BASED && len == 4
  1253. && data[1] == 0x2c && data[3] == 0xff
  1254. && (data[2] & ~1) == 0xf4))
  1255. adb_input(data+1, len-1, 1);
  1256. #endif /* CONFIG_ADB */
  1257. }
  1258. }
  1259. /* Sound/brightness button pressed */
  1260. else if ((1 << pirq) & PMU_INT_SNDBRT) {
  1261. #ifdef CONFIG_PMAC_BACKLIGHT
  1262. if (len == 3)
  1263. pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
  1264. #endif
  1265. }
  1266. /* Tick interrupt */
  1267. else if ((1 << pirq) & PMU_INT_TICK) {
  1268. /* Environement or tick interrupt, query batteries */
  1269. if (pmu_battery_count) {
  1270. if ((--query_batt_timer) == 0) {
  1271. query_battery_state();
  1272. query_batt_timer = BATTERY_POLLING_COUNT;
  1273. }
  1274. }
  1275. }
  1276. else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
  1277. if (pmu_battery_count)
  1278. query_battery_state();
  1279. pmu_pass_intr(data, len);
  1280. /* len == 6 is probably a bad check. But how do I
  1281. * know what PMU versions send what events here? */
  1282. if (len == 6) {
  1283. via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
  1284. via_pmu_event(PMU_EVT_LID, data[1]&1);
  1285. }
  1286. } else {
  1287. pmu_pass_intr(data, len);
  1288. }
  1289. goto next;
  1290. }
  1291. static struct adb_request*
  1292. pmu_sr_intr(void)
  1293. {
  1294. struct adb_request *req;
  1295. int bite = 0;
  1296. if (in_8(&via[B]) & TREQ) {
  1297. printk(KERN_ERR "PMU: spurious SR intr (%x)\n", in_8(&via[B]));
  1298. out_8(&via[IFR], SR_INT);
  1299. return NULL;
  1300. }
  1301. /* The ack may not yet be low when we get the interrupt */
  1302. while ((in_8(&via[B]) & TACK) != 0)
  1303. ;
  1304. /* if reading grab the byte, and reset the interrupt */
  1305. if (pmu_state == reading || pmu_state == reading_intr)
  1306. bite = in_8(&via[SR]);
  1307. /* reset TREQ and wait for TACK to go high */
  1308. out_8(&via[B], in_8(&via[B]) | TREQ);
  1309. wait_for_ack();
  1310. switch (pmu_state) {
  1311. case sending:
  1312. req = current_req;
  1313. if (data_len < 0) {
  1314. data_len = req->nbytes - 1;
  1315. send_byte(data_len);
  1316. break;
  1317. }
  1318. if (data_index <= data_len) {
  1319. send_byte(req->data[data_index++]);
  1320. break;
  1321. }
  1322. req->sent = 1;
  1323. data_len = pmu_data_len[req->data[0]][1];
  1324. if (data_len == 0) {
  1325. pmu_state = idle;
  1326. current_req = req->next;
  1327. if (req->reply_expected)
  1328. req_awaiting_reply = req;
  1329. else
  1330. return req;
  1331. } else {
  1332. pmu_state = reading;
  1333. data_index = 0;
  1334. reply_ptr = req->reply + req->reply_len;
  1335. recv_byte();
  1336. }
  1337. break;
  1338. case intack:
  1339. data_index = 0;
  1340. data_len = -1;
  1341. pmu_state = reading_intr;
  1342. reply_ptr = interrupt_data[int_data_last];
  1343. recv_byte();
  1344. if (gpio_irq >= 0 && !gpio_irq_enabled) {
  1345. enable_irq(gpio_irq);
  1346. gpio_irq_enabled = 1;
  1347. }
  1348. break;
  1349. case reading:
  1350. case reading_intr:
  1351. if (data_len == -1) {
  1352. data_len = bite;
  1353. if (bite > 32)
  1354. printk(KERN_ERR "PMU: bad reply len %d\n", bite);
  1355. } else if (data_index < 32) {
  1356. reply_ptr[data_index++] = bite;
  1357. }
  1358. if (data_index < data_len) {
  1359. recv_byte();
  1360. break;
  1361. }
  1362. if (pmu_state == reading_intr) {
  1363. pmu_state = idle;
  1364. int_data_state[int_data_last] = int_data_ready;
  1365. interrupt_data_len[int_data_last] = data_len;
  1366. } else {
  1367. req = current_req;
  1368. /*
  1369. * For PMU sleep and freq change requests, we lock the
  1370. * PMU until it's explicitly unlocked. This avoids any
  1371. * spurrious event polling getting in
  1372. */
  1373. current_req = req->next;
  1374. req->reply_len += data_index;
  1375. if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
  1376. pmu_state = locked;
  1377. else
  1378. pmu_state = idle;
  1379. return req;
  1380. }
  1381. break;
  1382. default:
  1383. printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
  1384. pmu_state);
  1385. }
  1386. return NULL;
  1387. }
  1388. static irqreturn_t
  1389. via_pmu_interrupt(int irq, void *arg)
  1390. {
  1391. unsigned long flags;
  1392. int intr;
  1393. int nloop = 0;
  1394. int int_data = -1;
  1395. struct adb_request *req = NULL;
  1396. int handled = 0;
  1397. /* This is a bit brutal, we can probably do better */
  1398. spin_lock_irqsave(&pmu_lock, flags);
  1399. ++disable_poll;
  1400. for (;;) {
  1401. intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
  1402. if (intr == 0)
  1403. break;
  1404. handled = 1;
  1405. if (++nloop > 1000) {
  1406. printk(KERN_DEBUG "PMU: stuck in intr loop, "
  1407. "intr=%x, ier=%x pmu_state=%d\n",
  1408. intr, in_8(&via[IER]), pmu_state);
  1409. break;
  1410. }
  1411. out_8(&via[IFR], intr);
  1412. if (intr & CB1_INT) {
  1413. adb_int_pending = 1;
  1414. pmu_irq_stats[0]++;
  1415. }
  1416. if (intr & SR_INT) {
  1417. req = pmu_sr_intr();
  1418. if (req)
  1419. break;
  1420. }
  1421. }
  1422. recheck:
  1423. if (pmu_state == idle) {
  1424. if (adb_int_pending) {
  1425. if (int_data_state[0] == int_data_empty)
  1426. int_data_last = 0;
  1427. else if (int_data_state[1] == int_data_empty)
  1428. int_data_last = 1;
  1429. else
  1430. goto no_free_slot;
  1431. pmu_state = intack;
  1432. int_data_state[int_data_last] = int_data_fill;
  1433. /* Sounds safer to make sure ACK is high before writing.
  1434. * This helped kill a problem with ADB and some iBooks
  1435. */
  1436. wait_for_ack();
  1437. send_byte(PMU_INT_ACK);
  1438. adb_int_pending = 0;
  1439. } else if (current_req)
  1440. pmu_start();
  1441. }
  1442. no_free_slot:
  1443. /* Mark the oldest buffer for flushing */
  1444. if (int_data_state[!int_data_last] == int_data_ready) {
  1445. int_data_state[!int_data_last] = int_data_flush;
  1446. int_data = !int_data_last;
  1447. } else if (int_data_state[int_data_last] == int_data_ready) {
  1448. int_data_state[int_data_last] = int_data_flush;
  1449. int_data = int_data_last;
  1450. }
  1451. --disable_poll;
  1452. spin_unlock_irqrestore(&pmu_lock, flags);
  1453. /* Deal with completed PMU requests outside of the lock */
  1454. if (req) {
  1455. pmu_done(req);
  1456. req = NULL;
  1457. }
  1458. /* Deal with interrupt datas outside of the lock */
  1459. if (int_data >= 0) {
  1460. pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
  1461. spin_lock_irqsave(&pmu_lock, flags);
  1462. ++disable_poll;
  1463. int_data_state[int_data] = int_data_empty;
  1464. int_data = -1;
  1465. goto recheck;
  1466. }
  1467. return IRQ_RETVAL(handled);
  1468. }
  1469. void
  1470. pmu_unlock(void)
  1471. {
  1472. unsigned long flags;
  1473. spin_lock_irqsave(&pmu_lock, flags);
  1474. if (pmu_state == locked)
  1475. pmu_state = idle;
  1476. adb_int_pending = 1;
  1477. spin_unlock_irqrestore(&pmu_lock, flags);
  1478. }
  1479. static irqreturn_t
  1480. gpio1_interrupt(int irq, void *arg)
  1481. {
  1482. unsigned long flags;
  1483. if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
  1484. spin_lock_irqsave(&pmu_lock, flags);
  1485. if (gpio_irq_enabled > 0) {
  1486. disable_irq_nosync(gpio_irq);
  1487. gpio_irq_enabled = 0;
  1488. }
  1489. pmu_irq_stats[1]++;
  1490. adb_int_pending = 1;
  1491. spin_unlock_irqrestore(&pmu_lock, flags);
  1492. via_pmu_interrupt(0, NULL);
  1493. return IRQ_HANDLED;
  1494. }
  1495. return IRQ_NONE;
  1496. }
  1497. void
  1498. pmu_enable_irled(int on)
  1499. {
  1500. struct adb_request req;
  1501. if (vias == NULL)
  1502. return ;
  1503. if (pmu_kind == PMU_KEYLARGO_BASED)
  1504. return ;
  1505. pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
  1506. (on ? PMU_POW_ON : PMU_POW_OFF));
  1507. pmu_wait_complete(&req);
  1508. }
  1509. void
  1510. pmu_restart(void)
  1511. {
  1512. struct adb_request req;
  1513. if (via == NULL)
  1514. return;
  1515. local_irq_disable();
  1516. drop_interrupts = 1;
  1517. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1518. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1519. PMU_INT_TICK );
  1520. while(!req.complete)
  1521. pmu_poll();
  1522. }
  1523. pmu_request(&req, NULL, 1, PMU_RESET);
  1524. pmu_wait_complete(&req);
  1525. for (;;)
  1526. ;
  1527. }
  1528. void
  1529. pmu_shutdown(void)
  1530. {
  1531. struct adb_request req;
  1532. if (via == NULL)
  1533. return;
  1534. local_irq_disable();
  1535. drop_interrupts = 1;
  1536. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1537. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1538. PMU_INT_TICK );
  1539. pmu_wait_complete(&req);
  1540. } else {
  1541. /* Disable server mode on shutdown or we'll just
  1542. * wake up again
  1543. */
  1544. pmu_set_server_mode(0);
  1545. }
  1546. pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
  1547. 'M', 'A', 'T', 'T');
  1548. pmu_wait_complete(&req);
  1549. for (;;)
  1550. ;
  1551. }
  1552. int
  1553. pmu_present(void)
  1554. {
  1555. return via != 0;
  1556. }
  1557. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1558. /*
  1559. * Put the powerbook to sleep.
  1560. */
  1561. static u32 save_via[8];
  1562. static void
  1563. save_via_state(void)
  1564. {
  1565. save_via[0] = in_8(&via[ANH]);
  1566. save_via[1] = in_8(&via[DIRA]);
  1567. save_via[2] = in_8(&via[B]);
  1568. save_via[3] = in_8(&via[DIRB]);
  1569. save_via[4] = in_8(&via[PCR]);
  1570. save_via[5] = in_8(&via[ACR]);
  1571. save_via[6] = in_8(&via[T1CL]);
  1572. save_via[7] = in_8(&via[T1CH]);
  1573. }
  1574. static void
  1575. restore_via_state(void)
  1576. {
  1577. out_8(&via[ANH], save_via[0]);
  1578. out_8(&via[DIRA], save_via[1]);
  1579. out_8(&via[B], save_via[2]);
  1580. out_8(&via[DIRB], save_via[3]);
  1581. out_8(&via[PCR], save_via[4]);
  1582. out_8(&via[ACR], save_via[5]);
  1583. out_8(&via[T1CL], save_via[6]);
  1584. out_8(&via[T1CH], save_via[7]);
  1585. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  1586. out_8(&via[IFR], 0x7f); /* clear IFR */
  1587. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  1588. }
  1589. #define GRACKLE_PM (1<<7)
  1590. #define GRACKLE_DOZE (1<<5)
  1591. #define GRACKLE_NAP (1<<4)
  1592. #define GRACKLE_SLEEP (1<<3)
  1593. static int powerbook_sleep_grackle(void)
  1594. {
  1595. unsigned long save_l2cr;
  1596. unsigned short pmcr1;
  1597. struct adb_request req;
  1598. struct pci_dev *grackle;
  1599. grackle = pci_get_bus_and_slot(0, 0);
  1600. if (!grackle)
  1601. return -ENODEV;
  1602. /* Turn off various things. Darwin does some retry tests here... */
  1603. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
  1604. pmu_wait_complete(&req);
  1605. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1606. PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1607. pmu_wait_complete(&req);
  1608. /* For 750, save backside cache setting and disable it */
  1609. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1610. if (!__fake_sleep) {
  1611. /* Ask the PMU to put us to sleep */
  1612. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1613. pmu_wait_complete(&req);
  1614. }
  1615. /* The VIA is supposed not to be restored correctly*/
  1616. save_via_state();
  1617. /* We shut down some HW */
  1618. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
  1619. pci_read_config_word(grackle, 0x70, &pmcr1);
  1620. /* Apparently, MacOS uses NAP mode for Grackle ??? */
  1621. pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
  1622. pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
  1623. pci_write_config_word(grackle, 0x70, pmcr1);
  1624. /* Call low-level ASM sleep handler */
  1625. if (__fake_sleep)
  1626. mdelay(5000);
  1627. else
  1628. low_sleep_handler();
  1629. /* We're awake again, stop grackle PM */
  1630. pci_read_config_word(grackle, 0x70, &pmcr1);
  1631. pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
  1632. pci_write_config_word(grackle, 0x70, pmcr1);
  1633. pci_dev_put(grackle);
  1634. /* Make sure the PMU is idle */
  1635. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
  1636. restore_via_state();
  1637. /* Restore L2 cache */
  1638. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1639. _set_L2CR(save_l2cr);
  1640. /* Restore userland MMU context */
  1641. switch_mmu_context(NULL, current->active_mm, NULL);
  1642. /* Power things up */
  1643. pmu_unlock();
  1644. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1645. pmu_wait_complete(&req);
  1646. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
  1647. PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
  1648. pmu_wait_complete(&req);
  1649. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1650. PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1651. pmu_wait_complete(&req);
  1652. return 0;
  1653. }
  1654. static int
  1655. powerbook_sleep_Core99(void)
  1656. {
  1657. unsigned long save_l2cr;
  1658. unsigned long save_l3cr;
  1659. struct adb_request req;
  1660. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
  1661. printk(KERN_ERR "Sleep mode not supported on this machine\n");
  1662. return -ENOSYS;
  1663. }
  1664. if (num_online_cpus() > 1 || cpu_is_offline(0))
  1665. return -EAGAIN;
  1666. /* Stop environment and ADB interrupts */
  1667. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
  1668. pmu_wait_complete(&req);
  1669. /* Tell PMU what events will wake us up */
  1670. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
  1671. 0xff, 0xff);
  1672. pmu_wait_complete(&req);
  1673. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
  1674. 0, PMU_PWR_WAKEUP_KEY |
  1675. (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
  1676. pmu_wait_complete(&req);
  1677. /* Save the state of the L2 and L3 caches */
  1678. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  1679. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1680. if (!__fake_sleep) {
  1681. /* Ask the PMU to put us to sleep */
  1682. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1683. pmu_wait_complete(&req);
  1684. }
  1685. /* The VIA is supposed not to be restored correctly*/
  1686. save_via_state();
  1687. /* Shut down various ASICs. There's a chance that we can no longer
  1688. * talk to the PMU after this, so I moved it to _after_ sending the
  1689. * sleep command to it. Still need to be checked.
  1690. */
  1691. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1692. /* Call low-level ASM sleep handler */
  1693. if (__fake_sleep)
  1694. mdelay(5000);
  1695. else
  1696. low_sleep_handler();
  1697. /* Restore Apple core ASICs state */
  1698. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1699. /* Restore VIA */
  1700. restore_via_state();
  1701. /* tweak LPJ before cpufreq is there */
  1702. loops_per_jiffy *= 2;
  1703. /* Restore video */
  1704. pmac_call_early_video_resume();
  1705. /* Restore L2 cache */
  1706. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1707. _set_L2CR(save_l2cr);
  1708. /* Restore L3 cache */
  1709. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  1710. _set_L3CR(save_l3cr);
  1711. /* Restore userland MMU context */
  1712. switch_mmu_context(NULL, current->active_mm, NULL);
  1713. /* Tell PMU we are ready */
  1714. pmu_unlock();
  1715. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  1716. pmu_wait_complete(&req);
  1717. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1718. pmu_wait_complete(&req);
  1719. /* Restore LPJ, cpufreq will adjust the cpu frequency */
  1720. loops_per_jiffy /= 2;
  1721. return 0;
  1722. }
  1723. #define PB3400_MEM_CTRL 0xf8000000
  1724. #define PB3400_MEM_CTRL_SLEEP 0x70
  1725. static void __iomem *pb3400_mem_ctrl;
  1726. static void powerbook_sleep_init_3400(void)
  1727. {
  1728. /* map in the memory controller registers */
  1729. pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
  1730. if (pb3400_mem_ctrl == NULL)
  1731. printk(KERN_WARNING "ioremap failed: sleep won't be possible");
  1732. }
  1733. static int powerbook_sleep_3400(void)
  1734. {
  1735. int i, x;
  1736. unsigned int hid0;
  1737. unsigned long msr;
  1738. struct adb_request sleep_req;
  1739. unsigned int __iomem *mem_ctrl_sleep;
  1740. if (pb3400_mem_ctrl == NULL)
  1741. return -ENOMEM;
  1742. mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
  1743. /* Set the memory controller to keep the memory refreshed
  1744. while we're asleep */
  1745. for (i = 0x403f; i >= 0x4000; --i) {
  1746. out_be32(mem_ctrl_sleep, i);
  1747. do {
  1748. x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
  1749. } while (x == 0);
  1750. if (x >= 0x100)
  1751. break;
  1752. }
  1753. /* Ask the PMU to put us to sleep */
  1754. pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1755. pmu_wait_complete(&sleep_req);
  1756. pmu_unlock();
  1757. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1758. asleep = 1;
  1759. /* Put the CPU into sleep mode */
  1760. hid0 = mfspr(SPRN_HID0);
  1761. hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
  1762. mtspr(SPRN_HID0, hid0);
  1763. local_irq_enable();
  1764. msr = mfmsr() | MSR_POW;
  1765. while (asleep) {
  1766. mb();
  1767. mtmsr(msr);
  1768. isync();
  1769. }
  1770. local_irq_disable();
  1771. /* OK, we're awake again, start restoring things */
  1772. out_be32(mem_ctrl_sleep, 0x3f);
  1773. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1774. return 0;
  1775. }
  1776. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  1777. /*
  1778. * Support for /dev/pmu device
  1779. */
  1780. #define RB_SIZE 0x10
  1781. struct pmu_private {
  1782. struct list_head list;
  1783. int rb_get;
  1784. int rb_put;
  1785. struct rb_entry {
  1786. unsigned short len;
  1787. unsigned char data[16];
  1788. } rb_buf[RB_SIZE];
  1789. wait_queue_head_t wait;
  1790. spinlock_t lock;
  1791. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1792. int backlight_locker;
  1793. #endif
  1794. };
  1795. static LIST_HEAD(all_pmu_pvt);
  1796. static DEFINE_SPINLOCK(all_pvt_lock);
  1797. static void
  1798. pmu_pass_intr(unsigned char *data, int len)
  1799. {
  1800. struct pmu_private *pp;
  1801. struct list_head *list;
  1802. int i;
  1803. unsigned long flags;
  1804. if (len > sizeof(pp->rb_buf[0].data))
  1805. len = sizeof(pp->rb_buf[0].data);
  1806. spin_lock_irqsave(&all_pvt_lock, flags);
  1807. for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
  1808. pp = list_entry(list, struct pmu_private, list);
  1809. spin_lock(&pp->lock);
  1810. i = pp->rb_put + 1;
  1811. if (i >= RB_SIZE)
  1812. i = 0;
  1813. if (i != pp->rb_get) {
  1814. struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
  1815. rp->len = len;
  1816. memcpy(rp->data, data, len);
  1817. pp->rb_put = i;
  1818. wake_up_interruptible(&pp->wait);
  1819. }
  1820. spin_unlock(&pp->lock);
  1821. }
  1822. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1823. }
  1824. static int
  1825. pmu_open(struct inode *inode, struct file *file)
  1826. {
  1827. struct pmu_private *pp;
  1828. unsigned long flags;
  1829. pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
  1830. if (pp == 0)
  1831. return -ENOMEM;
  1832. pp->rb_get = pp->rb_put = 0;
  1833. spin_lock_init(&pp->lock);
  1834. init_waitqueue_head(&pp->wait);
  1835. mutex_lock(&pmu_info_proc_mutex);
  1836. spin_lock_irqsave(&all_pvt_lock, flags);
  1837. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1838. pp->backlight_locker = 0;
  1839. #endif
  1840. list_add(&pp->list, &all_pmu_pvt);
  1841. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1842. file->private_data = pp;
  1843. mutex_unlock(&pmu_info_proc_mutex);
  1844. return 0;
  1845. }
  1846. static ssize_t
  1847. pmu_read(struct file *file, char __user *buf,
  1848. size_t count, loff_t *ppos)
  1849. {
  1850. struct pmu_private *pp = file->private_data;
  1851. DECLARE_WAITQUEUE(wait, current);
  1852. unsigned long flags;
  1853. int ret = 0;
  1854. if (count < 1 || pp == 0)
  1855. return -EINVAL;
  1856. if (!access_ok(VERIFY_WRITE, buf, count))
  1857. return -EFAULT;
  1858. spin_lock_irqsave(&pp->lock, flags);
  1859. add_wait_queue(&pp->wait, &wait);
  1860. set_current_state(TASK_INTERRUPTIBLE);
  1861. for (;;) {
  1862. ret = -EAGAIN;
  1863. if (pp->rb_get != pp->rb_put) {
  1864. int i = pp->rb_get;
  1865. struct rb_entry *rp = &pp->rb_buf[i];
  1866. ret = rp->len;
  1867. spin_unlock_irqrestore(&pp->lock, flags);
  1868. if (ret > count)
  1869. ret = count;
  1870. if (ret > 0 && copy_to_user(buf, rp->data, ret))
  1871. ret = -EFAULT;
  1872. if (++i >= RB_SIZE)
  1873. i = 0;
  1874. spin_lock_irqsave(&pp->lock, flags);
  1875. pp->rb_get = i;
  1876. }
  1877. if (ret >= 0)
  1878. break;
  1879. if (file->f_flags & O_NONBLOCK)
  1880. break;
  1881. ret = -ERESTARTSYS;
  1882. if (signal_pending(current))
  1883. break;
  1884. spin_unlock_irqrestore(&pp->lock, flags);
  1885. schedule();
  1886. spin_lock_irqsave(&pp->lock, flags);
  1887. }
  1888. __set_current_state(TASK_RUNNING);
  1889. remove_wait_queue(&pp->wait, &wait);
  1890. spin_unlock_irqrestore(&pp->lock, flags);
  1891. return ret;
  1892. }
  1893. static ssize_t
  1894. pmu_write(struct file *file, const char __user *buf,
  1895. size_t count, loff_t *ppos)
  1896. {
  1897. return 0;
  1898. }
  1899. static unsigned int
  1900. pmu_fpoll(struct file *filp, poll_table *wait)
  1901. {
  1902. struct pmu_private *pp = filp->private_data;
  1903. unsigned int mask = 0;
  1904. unsigned long flags;
  1905. if (pp == 0)
  1906. return 0;
  1907. poll_wait(filp, &pp->wait, wait);
  1908. spin_lock_irqsave(&pp->lock, flags);
  1909. if (pp->rb_get != pp->rb_put)
  1910. mask |= POLLIN;
  1911. spin_unlock_irqrestore(&pp->lock, flags);
  1912. return mask;
  1913. }
  1914. static int
  1915. pmu_release(struct inode *inode, struct file *file)
  1916. {
  1917. struct pmu_private *pp = file->private_data;
  1918. unsigned long flags;
  1919. if (pp != 0) {
  1920. file->private_data = NULL;
  1921. spin_lock_irqsave(&all_pvt_lock, flags);
  1922. list_del(&pp->list);
  1923. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1924. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1925. if (pp->backlight_locker)
  1926. pmac_backlight_enable();
  1927. #endif
  1928. kfree(pp);
  1929. }
  1930. return 0;
  1931. }
  1932. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1933. static void pmac_suspend_disable_irqs(void)
  1934. {
  1935. /* Call platform functions marked "on sleep" */
  1936. pmac_pfunc_i2c_suspend();
  1937. pmac_pfunc_base_suspend();
  1938. }
  1939. static int powerbook_sleep(suspend_state_t state)
  1940. {
  1941. int error = 0;
  1942. /* Wait for completion of async requests */
  1943. while (!batt_req.complete)
  1944. pmu_poll();
  1945. /* Giveup the lazy FPU & vec so we don't have to back them
  1946. * up from the low level code
  1947. */
  1948. enable_kernel_fp();
  1949. #ifdef CONFIG_ALTIVEC
  1950. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  1951. enable_kernel_altivec();
  1952. #endif /* CONFIG_ALTIVEC */
  1953. switch (pmu_kind) {
  1954. case PMU_OHARE_BASED:
  1955. error = powerbook_sleep_3400();
  1956. break;
  1957. case PMU_HEATHROW_BASED:
  1958. case PMU_PADDINGTON_BASED:
  1959. error = powerbook_sleep_grackle();
  1960. break;
  1961. case PMU_KEYLARGO_BASED:
  1962. error = powerbook_sleep_Core99();
  1963. break;
  1964. default:
  1965. return -ENOSYS;
  1966. }
  1967. if (error)
  1968. return error;
  1969. mdelay(100);
  1970. return 0;
  1971. }
  1972. static void pmac_suspend_enable_irqs(void)
  1973. {
  1974. /* Force a poll of ADB interrupts */
  1975. adb_int_pending = 1;
  1976. via_pmu_interrupt(0, NULL);
  1977. mdelay(10);
  1978. /* Call platform functions marked "on wake" */
  1979. pmac_pfunc_base_resume();
  1980. pmac_pfunc_i2c_resume();
  1981. }
  1982. static int pmu_sleep_valid(suspend_state_t state)
  1983. {
  1984. return state == PM_SUSPEND_MEM
  1985. && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
  1986. }
  1987. static const struct platform_suspend_ops pmu_pm_ops = {
  1988. .enter = powerbook_sleep,
  1989. .valid = pmu_sleep_valid,
  1990. };
  1991. static int register_pmu_pm_ops(void)
  1992. {
  1993. if (pmu_kind == PMU_OHARE_BASED)
  1994. powerbook_sleep_init_3400();
  1995. ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
  1996. ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
  1997. suspend_set_ops(&pmu_pm_ops);
  1998. return 0;
  1999. }
  2000. device_initcall(register_pmu_pm_ops);
  2001. #endif
  2002. static int pmu_ioctl(struct file *filp,
  2003. u_int cmd, u_long arg)
  2004. {
  2005. __u32 __user *argp = (__u32 __user *)arg;
  2006. int error = -EINVAL;
  2007. switch (cmd) {
  2008. case PMU_IOC_SLEEP:
  2009. if (!capable(CAP_SYS_ADMIN))
  2010. return -EACCES;
  2011. return pm_suspend(PM_SUSPEND_MEM);
  2012. case PMU_IOC_CAN_SLEEP:
  2013. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
  2014. return put_user(0, argp);
  2015. else
  2016. return put_user(1, argp);
  2017. #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
  2018. /* Compatibility ioctl's for backlight */
  2019. case PMU_IOC_GET_BACKLIGHT:
  2020. {
  2021. int brightness;
  2022. brightness = pmac_backlight_get_legacy_brightness();
  2023. if (brightness < 0)
  2024. return brightness;
  2025. else
  2026. return put_user(brightness, argp);
  2027. }
  2028. case PMU_IOC_SET_BACKLIGHT:
  2029. {
  2030. int brightness;
  2031. error = get_user(brightness, argp);
  2032. if (error)
  2033. return error;
  2034. return pmac_backlight_set_legacy_brightness(brightness);
  2035. }
  2036. #ifdef CONFIG_INPUT_ADBHID
  2037. case PMU_IOC_GRAB_BACKLIGHT: {
  2038. struct pmu_private *pp = filp->private_data;
  2039. if (pp->backlight_locker)
  2040. return 0;
  2041. pp->backlight_locker = 1;
  2042. pmac_backlight_disable();
  2043. return 0;
  2044. }
  2045. #endif /* CONFIG_INPUT_ADBHID */
  2046. #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
  2047. case PMU_IOC_GET_MODEL:
  2048. return put_user(pmu_kind, argp);
  2049. case PMU_IOC_HAS_ADB:
  2050. return put_user(pmu_has_adb, argp);
  2051. }
  2052. return error;
  2053. }
  2054. static long pmu_unlocked_ioctl(struct file *filp,
  2055. u_int cmd, u_long arg)
  2056. {
  2057. int ret;
  2058. mutex_lock(&pmu_info_proc_mutex);
  2059. ret = pmu_ioctl(filp, cmd, arg);
  2060. mutex_unlock(&pmu_info_proc_mutex);
  2061. return ret;
  2062. }
  2063. #ifdef CONFIG_COMPAT
  2064. #define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
  2065. #define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
  2066. #define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
  2067. #define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
  2068. #define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
  2069. #define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
  2070. static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
  2071. {
  2072. switch (cmd) {
  2073. case PMU_IOC_SLEEP:
  2074. break;
  2075. case PMU_IOC_GET_BACKLIGHT32:
  2076. cmd = PMU_IOC_GET_BACKLIGHT;
  2077. break;
  2078. case PMU_IOC_SET_BACKLIGHT32:
  2079. cmd = PMU_IOC_SET_BACKLIGHT;
  2080. break;
  2081. case PMU_IOC_GET_MODEL32:
  2082. cmd = PMU_IOC_GET_MODEL;
  2083. break;
  2084. case PMU_IOC_HAS_ADB32:
  2085. cmd = PMU_IOC_HAS_ADB;
  2086. break;
  2087. case PMU_IOC_CAN_SLEEP32:
  2088. cmd = PMU_IOC_CAN_SLEEP;
  2089. break;
  2090. case PMU_IOC_GRAB_BACKLIGHT32:
  2091. cmd = PMU_IOC_GRAB_BACKLIGHT;
  2092. break;
  2093. default:
  2094. return -ENOIOCTLCMD;
  2095. }
  2096. return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
  2097. }
  2098. #endif
  2099. static const struct file_operations pmu_device_fops = {
  2100. .read = pmu_read,
  2101. .write = pmu_write,
  2102. .poll = pmu_fpoll,
  2103. .unlocked_ioctl = pmu_unlocked_ioctl,
  2104. #ifdef CONFIG_COMPAT
  2105. .compat_ioctl = compat_pmu_ioctl,
  2106. #endif
  2107. .open = pmu_open,
  2108. .release = pmu_release,
  2109. .llseek = noop_llseek,
  2110. };
  2111. static struct miscdevice pmu_device = {
  2112. PMU_MINOR, "pmu", &pmu_device_fops
  2113. };
  2114. static int pmu_device_init(void)
  2115. {
  2116. if (!via)
  2117. return 0;
  2118. if (misc_register(&pmu_device) < 0)
  2119. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  2120. return 0;
  2121. }
  2122. device_initcall(pmu_device_init);
  2123. #ifdef DEBUG_SLEEP
  2124. static inline void
  2125. polled_handshake(volatile unsigned char __iomem *via)
  2126. {
  2127. via[B] &= ~TREQ; eieio();
  2128. while ((via[B] & TACK) != 0)
  2129. ;
  2130. via[B] |= TREQ; eieio();
  2131. while ((via[B] & TACK) == 0)
  2132. ;
  2133. }
  2134. static inline void
  2135. polled_send_byte(volatile unsigned char __iomem *via, int x)
  2136. {
  2137. via[ACR] |= SR_OUT | SR_EXT; eieio();
  2138. via[SR] = x; eieio();
  2139. polled_handshake(via);
  2140. }
  2141. static inline int
  2142. polled_recv_byte(volatile unsigned char __iomem *via)
  2143. {
  2144. int x;
  2145. via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
  2146. x = via[SR]; eieio();
  2147. polled_handshake(via);
  2148. x = via[SR]; eieio();
  2149. return x;
  2150. }
  2151. int
  2152. pmu_polled_request(struct adb_request *req)
  2153. {
  2154. unsigned long flags;
  2155. int i, l, c;
  2156. volatile unsigned char __iomem *v = via;
  2157. req->complete = 1;
  2158. c = req->data[0];
  2159. l = pmu_data_len[c][0];
  2160. if (l >= 0 && req->nbytes != l + 1)
  2161. return -EINVAL;
  2162. local_irq_save(flags);
  2163. while (pmu_state != idle)
  2164. pmu_poll();
  2165. while ((via[B] & TACK) == 0)
  2166. ;
  2167. polled_send_byte(v, c);
  2168. if (l < 0) {
  2169. l = req->nbytes - 1;
  2170. polled_send_byte(v, l);
  2171. }
  2172. for (i = 1; i <= l; ++i)
  2173. polled_send_byte(v, req->data[i]);
  2174. l = pmu_data_len[c][1];
  2175. if (l < 0)
  2176. l = polled_recv_byte(v);
  2177. for (i = 0; i < l; ++i)
  2178. req->reply[i + req->reply_len] = polled_recv_byte(v);
  2179. if (req->done)
  2180. (*req->done)(req);
  2181. local_irq_restore(flags);
  2182. return 0;
  2183. }
  2184. /* N.B. This doesn't work on the 3400 */
  2185. void pmu_blink(int n)
  2186. {
  2187. struct adb_request req;
  2188. memset(&req, 0, sizeof(req));
  2189. for (; n > 0; --n) {
  2190. req.nbytes = 4;
  2191. req.done = NULL;
  2192. req.data[0] = 0xee;
  2193. req.data[1] = 4;
  2194. req.data[2] = 0;
  2195. req.data[3] = 1;
  2196. req.reply[0] = ADB_RET_OK;
  2197. req.reply_len = 1;
  2198. req.reply_expected = 0;
  2199. pmu_polled_request(&req);
  2200. mdelay(50);
  2201. req.nbytes = 4;
  2202. req.done = NULL;
  2203. req.data[0] = 0xee;
  2204. req.data[1] = 4;
  2205. req.data[2] = 0;
  2206. req.data[3] = 0;
  2207. req.reply[0] = ADB_RET_OK;
  2208. req.reply_len = 1;
  2209. req.reply_expected = 0;
  2210. pmu_polled_request(&req);
  2211. mdelay(50);
  2212. }
  2213. mdelay(50);
  2214. }
  2215. #endif /* DEBUG_SLEEP */
  2216. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  2217. int pmu_sys_suspended;
  2218. static int pmu_syscore_suspend(void)
  2219. {
  2220. /* Suspend PMU event interrupts */
  2221. pmu_suspend();
  2222. pmu_sys_suspended = 1;
  2223. #ifdef CONFIG_PMAC_BACKLIGHT
  2224. /* Tell backlight code not to muck around with the chip anymore */
  2225. pmu_backlight_set_sleep(1);
  2226. #endif
  2227. return 0;
  2228. }
  2229. static void pmu_syscore_resume(void)
  2230. {
  2231. struct adb_request req;
  2232. if (!pmu_sys_suspended)
  2233. return;
  2234. /* Tell PMU we are ready */
  2235. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  2236. pmu_wait_complete(&req);
  2237. #ifdef CONFIG_PMAC_BACKLIGHT
  2238. /* Tell backlight code it can use the chip again */
  2239. pmu_backlight_set_sleep(0);
  2240. #endif
  2241. /* Resume PMU event interrupts */
  2242. pmu_resume();
  2243. pmu_sys_suspended = 0;
  2244. }
  2245. static struct syscore_ops pmu_syscore_ops = {
  2246. .suspend = pmu_syscore_suspend,
  2247. .resume = pmu_syscore_resume,
  2248. };
  2249. static int pmu_syscore_register(void)
  2250. {
  2251. register_syscore_ops(&pmu_syscore_ops);
  2252. return 0;
  2253. }
  2254. subsys_initcall(pmu_syscore_register);
  2255. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  2256. EXPORT_SYMBOL(pmu_request);
  2257. EXPORT_SYMBOL(pmu_queue_request);
  2258. EXPORT_SYMBOL(pmu_poll);
  2259. EXPORT_SYMBOL(pmu_poll_adb);
  2260. EXPORT_SYMBOL(pmu_wait_complete);
  2261. EXPORT_SYMBOL(pmu_suspend);
  2262. EXPORT_SYMBOL(pmu_resume);
  2263. EXPORT_SYMBOL(pmu_unlock);
  2264. #if defined(CONFIG_PPC32)
  2265. EXPORT_SYMBOL(pmu_enable_irled);
  2266. EXPORT_SYMBOL(pmu_battery_count);
  2267. EXPORT_SYMBOL(pmu_batteries);
  2268. EXPORT_SYMBOL(pmu_power_flags);
  2269. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */