pinctrl-samsung.c 34 KB

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  1. /*
  2. * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. * Copyright (c) 2012 Linaro Ltd
  7. * http://www.linaro.org
  8. *
  9. * Author: Thomas Abraham <[email protected]>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This driver implements the Samsung pinctrl driver. It supports setting up of
  17. * pinmux and pinconf configurations. The gpiolib interface is also included.
  18. * External interrupt (gpio and wakeup) support are not included in this driver
  19. * but provides extensions to which platform specific implementation of the gpio
  20. * and wakeup interrupts can be hooked to.
  21. */
  22. #include <linux/module.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/io.h>
  25. #include <linux/slab.h>
  26. #include <linux/err.h>
  27. #include <linux/gpio.h>
  28. #include <linux/irqdomain.h>
  29. #include <linux/spinlock.h>
  30. #include <linux/syscore_ops.h>
  31. #include "../core.h"
  32. #include "pinctrl-samsung.h"
  33. /* list of all possible config options supported */
  34. static struct pin_config {
  35. const char *property;
  36. enum pincfg_type param;
  37. } cfg_params[] = {
  38. { "samsung,pin-pud", PINCFG_TYPE_PUD },
  39. { "samsung,pin-drv", PINCFG_TYPE_DRV },
  40. { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
  41. { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
  42. { "samsung,pin-val", PINCFG_TYPE_DAT },
  43. };
  44. /* Global list of devices (struct samsung_pinctrl_drv_data) */
  45. static LIST_HEAD(drvdata_list);
  46. static unsigned int pin_base;
  47. static int samsung_get_group_count(struct pinctrl_dev *pctldev)
  48. {
  49. struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
  50. return pmx->nr_groups;
  51. }
  52. static const char *samsung_get_group_name(struct pinctrl_dev *pctldev,
  53. unsigned group)
  54. {
  55. struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
  56. return pmx->pin_groups[group].name;
  57. }
  58. static int samsung_get_group_pins(struct pinctrl_dev *pctldev,
  59. unsigned group,
  60. const unsigned **pins,
  61. unsigned *num_pins)
  62. {
  63. struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
  64. *pins = pmx->pin_groups[group].pins;
  65. *num_pins = pmx->pin_groups[group].num_pins;
  66. return 0;
  67. }
  68. static int reserve_map(struct device *dev, struct pinctrl_map **map,
  69. unsigned *reserved_maps, unsigned *num_maps,
  70. unsigned reserve)
  71. {
  72. unsigned old_num = *reserved_maps;
  73. unsigned new_num = *num_maps + reserve;
  74. struct pinctrl_map *new_map;
  75. if (old_num >= new_num)
  76. return 0;
  77. new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
  78. if (!new_map) {
  79. dev_err(dev, "krealloc(map) failed\n");
  80. return -ENOMEM;
  81. }
  82. memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
  83. *map = new_map;
  84. *reserved_maps = new_num;
  85. return 0;
  86. }
  87. static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps,
  88. unsigned *num_maps, const char *group,
  89. const char *function)
  90. {
  91. if (WARN_ON(*num_maps == *reserved_maps))
  92. return -ENOSPC;
  93. (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
  94. (*map)[*num_maps].data.mux.group = group;
  95. (*map)[*num_maps].data.mux.function = function;
  96. (*num_maps)++;
  97. return 0;
  98. }
  99. static int add_map_configs(struct device *dev, struct pinctrl_map **map,
  100. unsigned *reserved_maps, unsigned *num_maps,
  101. const char *group, unsigned long *configs,
  102. unsigned num_configs)
  103. {
  104. unsigned long *dup_configs;
  105. if (WARN_ON(*num_maps == *reserved_maps))
  106. return -ENOSPC;
  107. dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
  108. GFP_KERNEL);
  109. if (!dup_configs) {
  110. dev_err(dev, "kmemdup(configs) failed\n");
  111. return -ENOMEM;
  112. }
  113. (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
  114. (*map)[*num_maps].data.configs.group_or_pin = group;
  115. (*map)[*num_maps].data.configs.configs = dup_configs;
  116. (*map)[*num_maps].data.configs.num_configs = num_configs;
  117. (*num_maps)++;
  118. return 0;
  119. }
  120. static int add_config(struct device *dev, unsigned long **configs,
  121. unsigned *num_configs, unsigned long config)
  122. {
  123. unsigned old_num = *num_configs;
  124. unsigned new_num = old_num + 1;
  125. unsigned long *new_configs;
  126. new_configs = krealloc(*configs, sizeof(*new_configs) * new_num,
  127. GFP_KERNEL);
  128. if (!new_configs) {
  129. dev_err(dev, "krealloc(configs) failed\n");
  130. return -ENOMEM;
  131. }
  132. new_configs[old_num] = config;
  133. *configs = new_configs;
  134. *num_configs = new_num;
  135. return 0;
  136. }
  137. static void samsung_dt_free_map(struct pinctrl_dev *pctldev,
  138. struct pinctrl_map *map,
  139. unsigned num_maps)
  140. {
  141. int i;
  142. for (i = 0; i < num_maps; i++)
  143. if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
  144. kfree(map[i].data.configs.configs);
  145. kfree(map);
  146. }
  147. static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata,
  148. struct device *dev,
  149. struct device_node *np,
  150. struct pinctrl_map **map,
  151. unsigned *reserved_maps,
  152. unsigned *num_maps)
  153. {
  154. int ret, i;
  155. u32 val;
  156. unsigned long config;
  157. unsigned long *configs = NULL;
  158. unsigned num_configs = 0;
  159. unsigned reserve;
  160. struct property *prop;
  161. const char *group;
  162. bool has_func = false;
  163. ret = of_property_read_u32(np, "samsung,pin-function", &val);
  164. if (!ret)
  165. has_func = true;
  166. for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
  167. ret = of_property_read_u32(np, cfg_params[i].property, &val);
  168. if (!ret) {
  169. config = PINCFG_PACK(cfg_params[i].param, val);
  170. ret = add_config(dev, &configs, &num_configs, config);
  171. if (ret < 0)
  172. goto exit;
  173. /* EINVAL=missing, which is fine since it's optional */
  174. } else if (ret != -EINVAL) {
  175. dev_err(dev, "could not parse property %s\n",
  176. cfg_params[i].property);
  177. }
  178. }
  179. reserve = 0;
  180. if (has_func)
  181. reserve++;
  182. if (num_configs)
  183. reserve++;
  184. ret = of_property_count_strings(np, "samsung,pins");
  185. if (ret < 0) {
  186. dev_err(dev, "could not parse property samsung,pins\n");
  187. goto exit;
  188. }
  189. reserve *= ret;
  190. ret = reserve_map(dev, map, reserved_maps, num_maps, reserve);
  191. if (ret < 0)
  192. goto exit;
  193. of_property_for_each_string(np, "samsung,pins", prop, group) {
  194. if (has_func) {
  195. ret = add_map_mux(map, reserved_maps,
  196. num_maps, group, np->full_name);
  197. if (ret < 0)
  198. goto exit;
  199. }
  200. if (num_configs) {
  201. ret = add_map_configs(dev, map, reserved_maps,
  202. num_maps, group, configs,
  203. num_configs);
  204. if (ret < 0)
  205. goto exit;
  206. }
  207. }
  208. ret = 0;
  209. exit:
  210. kfree(configs);
  211. return ret;
  212. }
  213. static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev,
  214. struct device_node *np_config,
  215. struct pinctrl_map **map,
  216. unsigned *num_maps)
  217. {
  218. struct samsung_pinctrl_drv_data *drvdata;
  219. unsigned reserved_maps;
  220. struct device_node *np;
  221. int ret;
  222. drvdata = pinctrl_dev_get_drvdata(pctldev);
  223. reserved_maps = 0;
  224. *map = NULL;
  225. *num_maps = 0;
  226. if (!of_get_child_count(np_config))
  227. return samsung_dt_subnode_to_map(drvdata, pctldev->dev,
  228. np_config, map,
  229. &reserved_maps,
  230. num_maps);
  231. for_each_child_of_node(np_config, np) {
  232. ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map,
  233. &reserved_maps, num_maps);
  234. if (ret < 0) {
  235. samsung_dt_free_map(pctldev, *map, *num_maps);
  236. return ret;
  237. }
  238. }
  239. return 0;
  240. }
  241. /* list of pinctrl callbacks for the pinctrl core */
  242. static const struct pinctrl_ops samsung_pctrl_ops = {
  243. .get_groups_count = samsung_get_group_count,
  244. .get_group_name = samsung_get_group_name,
  245. .get_group_pins = samsung_get_group_pins,
  246. .dt_node_to_map = samsung_dt_node_to_map,
  247. .dt_free_map = samsung_dt_free_map,
  248. };
  249. /* check if the selector is a valid pin function selector */
  250. static int samsung_get_functions_count(struct pinctrl_dev *pctldev)
  251. {
  252. struct samsung_pinctrl_drv_data *drvdata;
  253. drvdata = pinctrl_dev_get_drvdata(pctldev);
  254. return drvdata->nr_functions;
  255. }
  256. /* return the name of the pin function specified */
  257. static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev,
  258. unsigned selector)
  259. {
  260. struct samsung_pinctrl_drv_data *drvdata;
  261. drvdata = pinctrl_dev_get_drvdata(pctldev);
  262. return drvdata->pmx_functions[selector].name;
  263. }
  264. /* return the groups associated for the specified function selector */
  265. static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev,
  266. unsigned selector, const char * const **groups,
  267. unsigned * const num_groups)
  268. {
  269. struct samsung_pinctrl_drv_data *drvdata;
  270. drvdata = pinctrl_dev_get_drvdata(pctldev);
  271. *groups = drvdata->pmx_functions[selector].groups;
  272. *num_groups = drvdata->pmx_functions[selector].num_groups;
  273. return 0;
  274. }
  275. /*
  276. * given a pin number that is local to a pin controller, find out the pin bank
  277. * and the register base of the pin bank.
  278. */
  279. static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata,
  280. unsigned pin, void __iomem **reg, u32 *offset,
  281. struct samsung_pin_bank **bank)
  282. {
  283. struct samsung_pin_bank *b;
  284. b = drvdata->pin_banks;
  285. while ((pin >= b->pin_base) &&
  286. ((b->pin_base + b->nr_pins - 1) < pin))
  287. b++;
  288. *reg = drvdata->virt_base + b->pctl_offset;
  289. *offset = pin - b->pin_base;
  290. if (bank)
  291. *bank = b;
  292. }
  293. /* enable or disable a pinmux function */
  294. static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
  295. unsigned group, bool enable)
  296. {
  297. struct samsung_pinctrl_drv_data *drvdata;
  298. const struct samsung_pin_bank_type *type;
  299. struct samsung_pin_bank *bank;
  300. void __iomem *reg;
  301. u32 mask, shift, data, pin_offset;
  302. unsigned long flags;
  303. const struct samsung_pmx_func *func;
  304. const struct samsung_pin_group *grp;
  305. drvdata = pinctrl_dev_get_drvdata(pctldev);
  306. func = &drvdata->pmx_functions[selector];
  307. grp = &drvdata->pin_groups[group];
  308. pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base,
  309. &reg, &pin_offset, &bank);
  310. type = bank->type;
  311. mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
  312. shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
  313. if (shift >= 32) {
  314. /* Some banks have two config registers */
  315. shift -= 32;
  316. reg += 4;
  317. }
  318. spin_lock_irqsave(&bank->slock, flags);
  319. data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]);
  320. data &= ~(mask << shift);
  321. if (enable)
  322. data |= func->val << shift;
  323. writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]);
  324. spin_unlock_irqrestore(&bank->slock, flags);
  325. }
  326. /* enable a specified pinmux by writing to registers */
  327. static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev,
  328. unsigned selector,
  329. unsigned group)
  330. {
  331. samsung_pinmux_setup(pctldev, selector, group, true);
  332. return 0;
  333. }
  334. /* list of pinmux callbacks for the pinmux vertical in pinctrl core */
  335. static const struct pinmux_ops samsung_pinmux_ops = {
  336. .get_functions_count = samsung_get_functions_count,
  337. .get_function_name = samsung_pinmux_get_fname,
  338. .get_function_groups = samsung_pinmux_get_groups,
  339. .set_mux = samsung_pinmux_set_mux,
  340. };
  341. /* set or get the pin config settings for a specified pin */
  342. static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
  343. unsigned long *config, bool set)
  344. {
  345. struct samsung_pinctrl_drv_data *drvdata;
  346. const struct samsung_pin_bank_type *type;
  347. struct samsung_pin_bank *bank;
  348. void __iomem *reg_base;
  349. enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
  350. u32 data, width, pin_offset, mask, shift;
  351. u32 cfg_value, cfg_reg;
  352. unsigned long flags;
  353. drvdata = pinctrl_dev_get_drvdata(pctldev);
  354. pin_to_reg_bank(drvdata, pin - drvdata->pin_base, &reg_base,
  355. &pin_offset, &bank);
  356. type = bank->type;
  357. if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
  358. return -EINVAL;
  359. width = type->fld_width[cfg_type];
  360. cfg_reg = type->reg_offset[cfg_type];
  361. spin_lock_irqsave(&bank->slock, flags);
  362. mask = (1 << width) - 1;
  363. shift = pin_offset * width;
  364. data = readl(reg_base + cfg_reg);
  365. if (set) {
  366. cfg_value = PINCFG_UNPACK_VALUE(*config);
  367. data &= ~(mask << shift);
  368. data |= (cfg_value << shift);
  369. writel(data, reg_base + cfg_reg);
  370. } else {
  371. data >>= shift;
  372. data &= mask;
  373. *config = PINCFG_PACK(cfg_type, data);
  374. }
  375. spin_unlock_irqrestore(&bank->slock, flags);
  376. return 0;
  377. }
  378. /* set the pin config settings for a specified pin */
  379. static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
  380. unsigned long *configs, unsigned num_configs)
  381. {
  382. int i, ret;
  383. for (i = 0; i < num_configs; i++) {
  384. ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true);
  385. if (ret < 0)
  386. return ret;
  387. } /* for each config */
  388. return 0;
  389. }
  390. /* get the pin config settings for a specified pin */
  391. static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
  392. unsigned long *config)
  393. {
  394. return samsung_pinconf_rw(pctldev, pin, config, false);
  395. }
  396. /* set the pin config settings for a specified pin group */
  397. static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev,
  398. unsigned group, unsigned long *configs,
  399. unsigned num_configs)
  400. {
  401. struct samsung_pinctrl_drv_data *drvdata;
  402. const unsigned int *pins;
  403. unsigned int cnt;
  404. drvdata = pinctrl_dev_get_drvdata(pctldev);
  405. pins = drvdata->pin_groups[group].pins;
  406. for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++)
  407. samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs);
  408. return 0;
  409. }
  410. /* get the pin config settings for a specified pin group */
  411. static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev,
  412. unsigned int group, unsigned long *config)
  413. {
  414. struct samsung_pinctrl_drv_data *drvdata;
  415. const unsigned int *pins;
  416. drvdata = pinctrl_dev_get_drvdata(pctldev);
  417. pins = drvdata->pin_groups[group].pins;
  418. samsung_pinconf_get(pctldev, pins[0], config);
  419. return 0;
  420. }
  421. /* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */
  422. static const struct pinconf_ops samsung_pinconf_ops = {
  423. .pin_config_get = samsung_pinconf_get,
  424. .pin_config_set = samsung_pinconf_set,
  425. .pin_config_group_get = samsung_pinconf_group_get,
  426. .pin_config_group_set = samsung_pinconf_group_set,
  427. };
  428. /*
  429. * The samsung_gpio_set_vlaue() should be called with "bank->slock" held
  430. * to avoid race condition.
  431. */
  432. static void samsung_gpio_set_value(struct gpio_chip *gc,
  433. unsigned offset, int value)
  434. {
  435. struct samsung_pin_bank *bank = gpiochip_get_data(gc);
  436. const struct samsung_pin_bank_type *type = bank->type;
  437. void __iomem *reg;
  438. u32 data;
  439. reg = bank->drvdata->virt_base + bank->pctl_offset;
  440. data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
  441. data &= ~(1 << offset);
  442. if (value)
  443. data |= 1 << offset;
  444. writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]);
  445. }
  446. /* gpiolib gpio_set callback function */
  447. static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
  448. {
  449. struct samsung_pin_bank *bank = gpiochip_get_data(gc);
  450. unsigned long flags;
  451. spin_lock_irqsave(&bank->slock, flags);
  452. samsung_gpio_set_value(gc, offset, value);
  453. spin_unlock_irqrestore(&bank->slock, flags);
  454. }
  455. /* gpiolib gpio_get callback function */
  456. static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
  457. {
  458. void __iomem *reg;
  459. u32 data;
  460. struct samsung_pin_bank *bank = gpiochip_get_data(gc);
  461. const struct samsung_pin_bank_type *type = bank->type;
  462. reg = bank->drvdata->virt_base + bank->pctl_offset;
  463. data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
  464. data >>= offset;
  465. data &= 1;
  466. return data;
  467. }
  468. /*
  469. * The samsung_gpio_set_direction() should be called with "bank->slock" held
  470. * to avoid race condition.
  471. * The calls to gpio_direction_output() and gpio_direction_input()
  472. * leads to this function call.
  473. */
  474. static int samsung_gpio_set_direction(struct gpio_chip *gc,
  475. unsigned offset, bool input)
  476. {
  477. const struct samsung_pin_bank_type *type;
  478. struct samsung_pin_bank *bank;
  479. struct samsung_pinctrl_drv_data *drvdata;
  480. void __iomem *reg;
  481. u32 data, mask, shift;
  482. bank = gpiochip_get_data(gc);
  483. type = bank->type;
  484. drvdata = bank->drvdata;
  485. reg = drvdata->virt_base + bank->pctl_offset +
  486. type->reg_offset[PINCFG_TYPE_FUNC];
  487. mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
  488. shift = offset * type->fld_width[PINCFG_TYPE_FUNC];
  489. if (shift >= 32) {
  490. /* Some banks have two config registers */
  491. shift -= 32;
  492. reg += 4;
  493. }
  494. data = readl(reg);
  495. data &= ~(mask << shift);
  496. if (!input)
  497. data |= FUNC_OUTPUT << shift;
  498. writel(data, reg);
  499. return 0;
  500. }
  501. /* gpiolib gpio_direction_input callback function. */
  502. static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
  503. {
  504. struct samsung_pin_bank *bank = gpiochip_get_data(gc);
  505. unsigned long flags;
  506. int ret;
  507. spin_lock_irqsave(&bank->slock, flags);
  508. ret = samsung_gpio_set_direction(gc, offset, true);
  509. spin_unlock_irqrestore(&bank->slock, flags);
  510. return ret;
  511. }
  512. /* gpiolib gpio_direction_output callback function. */
  513. static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
  514. int value)
  515. {
  516. struct samsung_pin_bank *bank = gpiochip_get_data(gc);
  517. unsigned long flags;
  518. int ret;
  519. spin_lock_irqsave(&bank->slock, flags);
  520. samsung_gpio_set_value(gc, offset, value);
  521. ret = samsung_gpio_set_direction(gc, offset, false);
  522. spin_unlock_irqrestore(&bank->slock, flags);
  523. return ret;
  524. }
  525. /*
  526. * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin
  527. * and a virtual IRQ, if not already present.
  528. */
  529. static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
  530. {
  531. struct samsung_pin_bank *bank = gpiochip_get_data(gc);
  532. unsigned int virq;
  533. if (!bank->irq_domain)
  534. return -ENXIO;
  535. virq = irq_create_mapping(bank->irq_domain, offset);
  536. return (virq) ? : -ENXIO;
  537. }
  538. static struct samsung_pin_group *samsung_pinctrl_create_groups(
  539. struct device *dev,
  540. struct samsung_pinctrl_drv_data *drvdata,
  541. unsigned int *cnt)
  542. {
  543. struct pinctrl_desc *ctrldesc = &drvdata->pctl;
  544. struct samsung_pin_group *groups, *grp;
  545. const struct pinctrl_pin_desc *pdesc;
  546. int i;
  547. groups = devm_kzalloc(dev, ctrldesc->npins * sizeof(*groups),
  548. GFP_KERNEL);
  549. if (!groups)
  550. return ERR_PTR(-EINVAL);
  551. grp = groups;
  552. pdesc = ctrldesc->pins;
  553. for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) {
  554. grp->name = pdesc->name;
  555. grp->pins = &pdesc->number;
  556. grp->num_pins = 1;
  557. }
  558. *cnt = ctrldesc->npins;
  559. return groups;
  560. }
  561. static int samsung_pinctrl_create_function(struct device *dev,
  562. struct samsung_pinctrl_drv_data *drvdata,
  563. struct device_node *func_np,
  564. struct samsung_pmx_func *func)
  565. {
  566. int npins;
  567. int ret;
  568. int i;
  569. if (of_property_read_u32(func_np, "samsung,pin-function", &func->val))
  570. return 0;
  571. npins = of_property_count_strings(func_np, "samsung,pins");
  572. if (npins < 1) {
  573. dev_err(dev, "invalid pin list in %s node", func_np->name);
  574. return -EINVAL;
  575. }
  576. func->name = func_np->full_name;
  577. func->groups = devm_kzalloc(dev, npins * sizeof(char *), GFP_KERNEL);
  578. if (!func->groups)
  579. return -ENOMEM;
  580. for (i = 0; i < npins; ++i) {
  581. const char *gname;
  582. ret = of_property_read_string_index(func_np, "samsung,pins",
  583. i, &gname);
  584. if (ret) {
  585. dev_err(dev,
  586. "failed to read pin name %d from %s node\n",
  587. i, func_np->name);
  588. return ret;
  589. }
  590. func->groups[i] = gname;
  591. }
  592. func->num_groups = npins;
  593. return 1;
  594. }
  595. static struct samsung_pmx_func *samsung_pinctrl_create_functions(
  596. struct device *dev,
  597. struct samsung_pinctrl_drv_data *drvdata,
  598. unsigned int *cnt)
  599. {
  600. struct samsung_pmx_func *functions, *func;
  601. struct device_node *dev_np = dev->of_node;
  602. struct device_node *cfg_np;
  603. unsigned int func_cnt = 0;
  604. int ret;
  605. /*
  606. * Iterate over all the child nodes of the pin controller node
  607. * and create pin groups and pin function lists.
  608. */
  609. for_each_child_of_node(dev_np, cfg_np) {
  610. struct device_node *func_np;
  611. if (!of_get_child_count(cfg_np)) {
  612. if (!of_find_property(cfg_np,
  613. "samsung,pin-function", NULL))
  614. continue;
  615. ++func_cnt;
  616. continue;
  617. }
  618. for_each_child_of_node(cfg_np, func_np) {
  619. if (!of_find_property(func_np,
  620. "samsung,pin-function", NULL))
  621. continue;
  622. ++func_cnt;
  623. }
  624. }
  625. functions = devm_kzalloc(dev, func_cnt * sizeof(*functions),
  626. GFP_KERNEL);
  627. if (!functions) {
  628. dev_err(dev, "failed to allocate memory for function list\n");
  629. return ERR_PTR(-EINVAL);
  630. }
  631. func = functions;
  632. /*
  633. * Iterate over all the child nodes of the pin controller node
  634. * and create pin groups and pin function lists.
  635. */
  636. func_cnt = 0;
  637. for_each_child_of_node(dev_np, cfg_np) {
  638. struct device_node *func_np;
  639. if (!of_get_child_count(cfg_np)) {
  640. ret = samsung_pinctrl_create_function(dev, drvdata,
  641. cfg_np, func);
  642. if (ret < 0)
  643. return ERR_PTR(ret);
  644. if (ret > 0) {
  645. ++func;
  646. ++func_cnt;
  647. }
  648. continue;
  649. }
  650. for_each_child_of_node(cfg_np, func_np) {
  651. ret = samsung_pinctrl_create_function(dev, drvdata,
  652. func_np, func);
  653. if (ret < 0)
  654. return ERR_PTR(ret);
  655. if (ret > 0) {
  656. ++func;
  657. ++func_cnt;
  658. }
  659. }
  660. }
  661. *cnt = func_cnt;
  662. return functions;
  663. }
  664. /*
  665. * Parse the information about all the available pin groups and pin functions
  666. * from device node of the pin-controller. A pin group is formed with all
  667. * the pins listed in the "samsung,pins" property.
  668. */
  669. static int samsung_pinctrl_parse_dt(struct platform_device *pdev,
  670. struct samsung_pinctrl_drv_data *drvdata)
  671. {
  672. struct device *dev = &pdev->dev;
  673. struct samsung_pin_group *groups;
  674. struct samsung_pmx_func *functions;
  675. unsigned int grp_cnt = 0, func_cnt = 0;
  676. groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt);
  677. if (IS_ERR(groups)) {
  678. dev_err(dev, "failed to parse pin groups\n");
  679. return PTR_ERR(groups);
  680. }
  681. functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt);
  682. if (IS_ERR(functions)) {
  683. dev_err(dev, "failed to parse pin functions\n");
  684. return PTR_ERR(functions);
  685. }
  686. drvdata->pin_groups = groups;
  687. drvdata->nr_groups = grp_cnt;
  688. drvdata->pmx_functions = functions;
  689. drvdata->nr_functions = func_cnt;
  690. return 0;
  691. }
  692. /* register the pinctrl interface with the pinctrl subsystem */
  693. static int samsung_pinctrl_register(struct platform_device *pdev,
  694. struct samsung_pinctrl_drv_data *drvdata)
  695. {
  696. struct pinctrl_desc *ctrldesc = &drvdata->pctl;
  697. struct pinctrl_pin_desc *pindesc, *pdesc;
  698. struct samsung_pin_bank *pin_bank;
  699. char *pin_names;
  700. int pin, bank, ret;
  701. ctrldesc->name = "samsung-pinctrl";
  702. ctrldesc->owner = THIS_MODULE;
  703. ctrldesc->pctlops = &samsung_pctrl_ops;
  704. ctrldesc->pmxops = &samsung_pinmux_ops;
  705. ctrldesc->confops = &samsung_pinconf_ops;
  706. pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) *
  707. drvdata->nr_pins, GFP_KERNEL);
  708. if (!pindesc) {
  709. dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n");
  710. return -ENOMEM;
  711. }
  712. ctrldesc->pins = pindesc;
  713. ctrldesc->npins = drvdata->nr_pins;
  714. /* dynamically populate the pin number and pin name for pindesc */
  715. for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
  716. pdesc->number = pin + drvdata->pin_base;
  717. /*
  718. * allocate space for storing the dynamically generated names for all
  719. * the pins which belong to this pin-controller.
  720. */
  721. pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH *
  722. drvdata->nr_pins, GFP_KERNEL);
  723. if (!pin_names) {
  724. dev_err(&pdev->dev, "mem alloc for pin names failed\n");
  725. return -ENOMEM;
  726. }
  727. /* for each pin, the name of the pin is pin-bank name + pin number */
  728. for (bank = 0; bank < drvdata->nr_banks; bank++) {
  729. pin_bank = &drvdata->pin_banks[bank];
  730. for (pin = 0; pin < pin_bank->nr_pins; pin++) {
  731. sprintf(pin_names, "%s-%d", pin_bank->name, pin);
  732. pdesc = pindesc + pin_bank->pin_base + pin;
  733. pdesc->name = pin_names;
  734. pin_names += PIN_NAME_LENGTH;
  735. }
  736. }
  737. ret = samsung_pinctrl_parse_dt(pdev, drvdata);
  738. if (ret)
  739. return ret;
  740. drvdata->pctl_dev = devm_pinctrl_register(&pdev->dev, ctrldesc,
  741. drvdata);
  742. if (IS_ERR(drvdata->pctl_dev)) {
  743. dev_err(&pdev->dev, "could not register pinctrl driver\n");
  744. return PTR_ERR(drvdata->pctl_dev);
  745. }
  746. for (bank = 0; bank < drvdata->nr_banks; ++bank) {
  747. pin_bank = &drvdata->pin_banks[bank];
  748. pin_bank->grange.name = pin_bank->name;
  749. pin_bank->grange.id = bank;
  750. pin_bank->grange.pin_base = drvdata->pin_base
  751. + pin_bank->pin_base;
  752. pin_bank->grange.base = pin_bank->gpio_chip.base;
  753. pin_bank->grange.npins = pin_bank->gpio_chip.ngpio;
  754. pin_bank->grange.gc = &pin_bank->gpio_chip;
  755. pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
  756. }
  757. return 0;
  758. }
  759. static const struct gpio_chip samsung_gpiolib_chip = {
  760. .request = gpiochip_generic_request,
  761. .free = gpiochip_generic_free,
  762. .set = samsung_gpio_set,
  763. .get = samsung_gpio_get,
  764. .direction_input = samsung_gpio_direction_input,
  765. .direction_output = samsung_gpio_direction_output,
  766. .to_irq = samsung_gpio_to_irq,
  767. .owner = THIS_MODULE,
  768. };
  769. /* register the gpiolib interface with the gpiolib subsystem */
  770. static int samsung_gpiolib_register(struct platform_device *pdev,
  771. struct samsung_pinctrl_drv_data *drvdata)
  772. {
  773. struct samsung_pin_bank *bank = drvdata->pin_banks;
  774. struct gpio_chip *gc;
  775. int ret;
  776. int i;
  777. for (i = 0; i < drvdata->nr_banks; ++i, ++bank) {
  778. bank->gpio_chip = samsung_gpiolib_chip;
  779. gc = &bank->gpio_chip;
  780. gc->base = drvdata->pin_base + bank->pin_base;
  781. gc->ngpio = bank->nr_pins;
  782. gc->parent = &pdev->dev;
  783. gc->of_node = bank->of_node;
  784. gc->label = bank->name;
  785. ret = gpiochip_add_data(gc, bank);
  786. if (ret) {
  787. dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n",
  788. gc->label, ret);
  789. goto fail;
  790. }
  791. }
  792. return 0;
  793. fail:
  794. for (--i, --bank; i >= 0; --i, --bank)
  795. gpiochip_remove(&bank->gpio_chip);
  796. return ret;
  797. }
  798. /* unregister the gpiolib interface with the gpiolib subsystem */
  799. static int samsung_gpiolib_unregister(struct platform_device *pdev,
  800. struct samsung_pinctrl_drv_data *drvdata)
  801. {
  802. struct samsung_pin_bank *bank = drvdata->pin_banks;
  803. int i;
  804. for (i = 0; i < drvdata->nr_banks; ++i, ++bank)
  805. gpiochip_remove(&bank->gpio_chip);
  806. return 0;
  807. }
  808. static const struct of_device_id samsung_pinctrl_dt_match[];
  809. /* retrieve the soc specific data */
  810. static const struct samsung_pin_ctrl *
  811. samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
  812. struct platform_device *pdev)
  813. {
  814. int id;
  815. const struct of_device_id *match;
  816. struct device_node *node = pdev->dev.of_node;
  817. struct device_node *np;
  818. const struct samsung_pin_bank_data *bdata;
  819. const struct samsung_pin_ctrl *ctrl;
  820. struct samsung_pin_bank *bank;
  821. int i;
  822. id = of_alias_get_id(node, "pinctrl");
  823. if (id < 0) {
  824. dev_err(&pdev->dev, "failed to get alias id\n");
  825. return ERR_PTR(-ENOENT);
  826. }
  827. match = of_match_node(samsung_pinctrl_dt_match, node);
  828. ctrl = (struct samsung_pin_ctrl *)match->data + id;
  829. d->suspend = ctrl->suspend;
  830. d->resume = ctrl->resume;
  831. d->nr_banks = ctrl->nr_banks;
  832. d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks,
  833. sizeof(*d->pin_banks), GFP_KERNEL);
  834. if (!d->pin_banks)
  835. return ERR_PTR(-ENOMEM);
  836. bank = d->pin_banks;
  837. bdata = ctrl->pin_banks;
  838. for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) {
  839. bank->type = bdata->type;
  840. bank->pctl_offset = bdata->pctl_offset;
  841. bank->nr_pins = bdata->nr_pins;
  842. bank->eint_func = bdata->eint_func;
  843. bank->eint_type = bdata->eint_type;
  844. bank->eint_mask = bdata->eint_mask;
  845. bank->eint_offset = bdata->eint_offset;
  846. bank->name = bdata->name;
  847. spin_lock_init(&bank->slock);
  848. bank->drvdata = d;
  849. bank->pin_base = d->nr_pins;
  850. d->nr_pins += bank->nr_pins;
  851. }
  852. for_each_child_of_node(node, np) {
  853. if (!of_find_property(np, "gpio-controller", NULL))
  854. continue;
  855. bank = d->pin_banks;
  856. for (i = 0; i < d->nr_banks; ++i, ++bank) {
  857. if (!strcmp(bank->name, np->name)) {
  858. bank->of_node = np;
  859. break;
  860. }
  861. }
  862. }
  863. d->pin_base = pin_base;
  864. pin_base += d->nr_pins;
  865. return ctrl;
  866. }
  867. static int samsung_pinctrl_probe(struct platform_device *pdev)
  868. {
  869. struct samsung_pinctrl_drv_data *drvdata;
  870. const struct samsung_pin_ctrl *ctrl;
  871. struct device *dev = &pdev->dev;
  872. struct resource *res;
  873. int ret;
  874. drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
  875. if (!drvdata)
  876. return -ENOMEM;
  877. ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev);
  878. if (IS_ERR(ctrl)) {
  879. dev_err(&pdev->dev, "driver data not available\n");
  880. return PTR_ERR(ctrl);
  881. }
  882. drvdata->dev = dev;
  883. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  884. drvdata->virt_base = devm_ioremap_resource(&pdev->dev, res);
  885. if (IS_ERR(drvdata->virt_base))
  886. return PTR_ERR(drvdata->virt_base);
  887. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  888. if (res)
  889. drvdata->irq = res->start;
  890. ret = samsung_gpiolib_register(pdev, drvdata);
  891. if (ret)
  892. return ret;
  893. ret = samsung_pinctrl_register(pdev, drvdata);
  894. if (ret) {
  895. samsung_gpiolib_unregister(pdev, drvdata);
  896. return ret;
  897. }
  898. if (ctrl->eint_gpio_init)
  899. ctrl->eint_gpio_init(drvdata);
  900. if (ctrl->eint_wkup_init)
  901. ctrl->eint_wkup_init(drvdata);
  902. platform_set_drvdata(pdev, drvdata);
  903. /* Add to the global list */
  904. list_add_tail(&drvdata->node, &drvdata_list);
  905. return 0;
  906. }
  907. #ifdef CONFIG_PM
  908. /**
  909. * samsung_pinctrl_suspend_dev - save pinctrl state for suspend for a device
  910. *
  911. * Save data for all banks handled by this device.
  912. */
  913. static void samsung_pinctrl_suspend_dev(
  914. struct samsung_pinctrl_drv_data *drvdata)
  915. {
  916. void __iomem *virt_base = drvdata->virt_base;
  917. int i;
  918. for (i = 0; i < drvdata->nr_banks; i++) {
  919. struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
  920. void __iomem *reg = virt_base + bank->pctl_offset;
  921. const u8 *offs = bank->type->reg_offset;
  922. const u8 *widths = bank->type->fld_width;
  923. enum pincfg_type type;
  924. /* Registers without a powerdown config aren't lost */
  925. if (!widths[PINCFG_TYPE_CON_PDN])
  926. continue;
  927. for (type = 0; type < PINCFG_TYPE_NUM; type++)
  928. if (widths[type])
  929. bank->pm_save[type] = readl(reg + offs[type]);
  930. if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
  931. /* Some banks have two config registers */
  932. bank->pm_save[PINCFG_TYPE_NUM] =
  933. readl(reg + offs[PINCFG_TYPE_FUNC] + 4);
  934. pr_debug("Save %s @ %p (con %#010x %08x)\n",
  935. bank->name, reg,
  936. bank->pm_save[PINCFG_TYPE_FUNC],
  937. bank->pm_save[PINCFG_TYPE_NUM]);
  938. } else {
  939. pr_debug("Save %s @ %p (con %#010x)\n", bank->name,
  940. reg, bank->pm_save[PINCFG_TYPE_FUNC]);
  941. }
  942. }
  943. if (drvdata->suspend)
  944. drvdata->suspend(drvdata);
  945. }
  946. /**
  947. * samsung_pinctrl_resume_dev - restore pinctrl state from suspend for a device
  948. *
  949. * Restore one of the banks that was saved during suspend.
  950. *
  951. * We don't bother doing anything complicated to avoid glitching lines since
  952. * we're called before pad retention is turned off.
  953. */
  954. static void samsung_pinctrl_resume_dev(struct samsung_pinctrl_drv_data *drvdata)
  955. {
  956. void __iomem *virt_base = drvdata->virt_base;
  957. int i;
  958. if (drvdata->resume)
  959. drvdata->resume(drvdata);
  960. for (i = 0; i < drvdata->nr_banks; i++) {
  961. struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
  962. void __iomem *reg = virt_base + bank->pctl_offset;
  963. const u8 *offs = bank->type->reg_offset;
  964. const u8 *widths = bank->type->fld_width;
  965. enum pincfg_type type;
  966. /* Registers without a powerdown config aren't lost */
  967. if (!widths[PINCFG_TYPE_CON_PDN])
  968. continue;
  969. if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
  970. /* Some banks have two config registers */
  971. pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n",
  972. bank->name, reg,
  973. readl(reg + offs[PINCFG_TYPE_FUNC]),
  974. readl(reg + offs[PINCFG_TYPE_FUNC] + 4),
  975. bank->pm_save[PINCFG_TYPE_FUNC],
  976. bank->pm_save[PINCFG_TYPE_NUM]);
  977. writel(bank->pm_save[PINCFG_TYPE_NUM],
  978. reg + offs[PINCFG_TYPE_FUNC] + 4);
  979. } else {
  980. pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name,
  981. reg, readl(reg + offs[PINCFG_TYPE_FUNC]),
  982. bank->pm_save[PINCFG_TYPE_FUNC]);
  983. }
  984. for (type = 0; type < PINCFG_TYPE_NUM; type++)
  985. if (widths[type])
  986. writel(bank->pm_save[type], reg + offs[type]);
  987. }
  988. }
  989. /**
  990. * samsung_pinctrl_suspend - save pinctrl state for suspend
  991. *
  992. * Save data for all banks across all devices.
  993. */
  994. static int samsung_pinctrl_suspend(void)
  995. {
  996. struct samsung_pinctrl_drv_data *drvdata;
  997. list_for_each_entry(drvdata, &drvdata_list, node) {
  998. samsung_pinctrl_suspend_dev(drvdata);
  999. }
  1000. return 0;
  1001. }
  1002. /**
  1003. * samsung_pinctrl_resume - restore pinctrl state for suspend
  1004. *
  1005. * Restore data for all banks across all devices.
  1006. */
  1007. static void samsung_pinctrl_resume(void)
  1008. {
  1009. struct samsung_pinctrl_drv_data *drvdata;
  1010. list_for_each_entry_reverse(drvdata, &drvdata_list, node) {
  1011. samsung_pinctrl_resume_dev(drvdata);
  1012. }
  1013. }
  1014. #else
  1015. #define samsung_pinctrl_suspend NULL
  1016. #define samsung_pinctrl_resume NULL
  1017. #endif
  1018. static struct syscore_ops samsung_pinctrl_syscore_ops = {
  1019. .suspend = samsung_pinctrl_suspend,
  1020. .resume = samsung_pinctrl_resume,
  1021. };
  1022. static const struct of_device_id samsung_pinctrl_dt_match[] = {
  1023. #ifdef CONFIG_PINCTRL_EXYNOS
  1024. { .compatible = "samsung,exynos3250-pinctrl",
  1025. .data = (void *)exynos3250_pin_ctrl },
  1026. { .compatible = "samsung,exynos4210-pinctrl",
  1027. .data = (void *)exynos4210_pin_ctrl },
  1028. { .compatible = "samsung,exynos4x12-pinctrl",
  1029. .data = (void *)exynos4x12_pin_ctrl },
  1030. { .compatible = "samsung,exynos4415-pinctrl",
  1031. .data = (void *)exynos4415_pin_ctrl },
  1032. { .compatible = "samsung,exynos5250-pinctrl",
  1033. .data = (void *)exynos5250_pin_ctrl },
  1034. { .compatible = "samsung,exynos5260-pinctrl",
  1035. .data = (void *)exynos5260_pin_ctrl },
  1036. { .compatible = "samsung,exynos5410-pinctrl",
  1037. .data = (void *)exynos5410_pin_ctrl },
  1038. { .compatible = "samsung,exynos5420-pinctrl",
  1039. .data = (void *)exynos5420_pin_ctrl },
  1040. { .compatible = "samsung,exynos5433-pinctrl",
  1041. .data = (void *)exynos5433_pin_ctrl },
  1042. { .compatible = "samsung,s5pv210-pinctrl",
  1043. .data = (void *)s5pv210_pin_ctrl },
  1044. { .compatible = "samsung,exynos7-pinctrl",
  1045. .data = (void *)exynos7_pin_ctrl },
  1046. #endif
  1047. #ifdef CONFIG_PINCTRL_S3C64XX
  1048. { .compatible = "samsung,s3c64xx-pinctrl",
  1049. .data = s3c64xx_pin_ctrl },
  1050. #endif
  1051. #ifdef CONFIG_PINCTRL_S3C24XX
  1052. { .compatible = "samsung,s3c2412-pinctrl",
  1053. .data = s3c2412_pin_ctrl },
  1054. { .compatible = "samsung,s3c2416-pinctrl",
  1055. .data = s3c2416_pin_ctrl },
  1056. { .compatible = "samsung,s3c2440-pinctrl",
  1057. .data = s3c2440_pin_ctrl },
  1058. { .compatible = "samsung,s3c2450-pinctrl",
  1059. .data = s3c2450_pin_ctrl },
  1060. #endif
  1061. {},
  1062. };
  1063. MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match);
  1064. static struct platform_driver samsung_pinctrl_driver = {
  1065. .probe = samsung_pinctrl_probe,
  1066. .driver = {
  1067. .name = "samsung-pinctrl",
  1068. .of_match_table = samsung_pinctrl_dt_match,
  1069. .suppress_bind_attrs = true,
  1070. },
  1071. };
  1072. static int __init samsung_pinctrl_drv_register(void)
  1073. {
  1074. /*
  1075. * Register syscore ops for save/restore of registers across suspend.
  1076. * It's important to ensure that this driver is running at an earlier
  1077. * initcall level than any arch-specific init calls that install syscore
  1078. * ops that turn off pad retention (like exynos_pm_resume).
  1079. */
  1080. register_syscore_ops(&samsung_pinctrl_syscore_ops);
  1081. return platform_driver_register(&samsung_pinctrl_driver);
  1082. }
  1083. postcore_initcall(samsung_pinctrl_drv_register);
  1084. static void __exit samsung_pinctrl_drv_unregister(void)
  1085. {
  1086. platform_driver_unregister(&samsung_pinctrl_driver);
  1087. }
  1088. module_exit(samsung_pinctrl_drv_unregister);
  1089. MODULE_AUTHOR("Thomas Abraham <[email protected]>");
  1090. MODULE_DESCRIPTION("Samsung pinctrl driver");
  1091. MODULE_LICENSE("GPL v2");