reset-syscfg.c 5.0 KB

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  1. /*
  2. * Copyright (C) 2013 STMicroelectronics Limited
  3. * Author: Stephen Gallimore <[email protected]>
  4. *
  5. * Inspired by mach-imx/src.c
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/module.h>
  15. #include <linux/err.h>
  16. #include <linux/types.h>
  17. #include <linux/of_device.h>
  18. #include <linux/regmap.h>
  19. #include <linux/mfd/syscon.h>
  20. #include "reset-syscfg.h"
  21. /**
  22. * Reset channel regmap configuration
  23. *
  24. * @reset: regmap field for the channel's reset bit.
  25. * @ack: regmap field for the channel's ack bit (optional).
  26. */
  27. struct syscfg_reset_channel {
  28. struct regmap_field *reset;
  29. struct regmap_field *ack;
  30. };
  31. /**
  32. * A reset controller which groups together a set of related reset bits, which
  33. * may be located in different system configuration registers.
  34. *
  35. * @rst: base reset controller structure.
  36. * @active_low: are the resets in this controller active low, i.e. clearing
  37. * the reset bit puts the hardware into reset.
  38. * @channels: An array of reset channels for this controller.
  39. */
  40. struct syscfg_reset_controller {
  41. struct reset_controller_dev rst;
  42. bool active_low;
  43. struct syscfg_reset_channel *channels;
  44. };
  45. #define to_syscfg_reset_controller(_rst) \
  46. container_of(_rst, struct syscfg_reset_controller, rst)
  47. static int syscfg_reset_program_hw(struct reset_controller_dev *rcdev,
  48. unsigned long idx, int assert)
  49. {
  50. struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
  51. const struct syscfg_reset_channel *ch;
  52. u32 ctrl_val = rst->active_low ? !assert : !!assert;
  53. int err;
  54. if (idx >= rcdev->nr_resets)
  55. return -EINVAL;
  56. ch = &rst->channels[idx];
  57. err = regmap_field_write(ch->reset, ctrl_val);
  58. if (err)
  59. return err;
  60. if (ch->ack) {
  61. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  62. u32 ack_val;
  63. while (true) {
  64. err = regmap_field_read(ch->ack, &ack_val);
  65. if (err)
  66. return err;
  67. if (ack_val == ctrl_val)
  68. break;
  69. if (time_after(jiffies, timeout))
  70. return -ETIME;
  71. cpu_relax();
  72. }
  73. }
  74. return 0;
  75. }
  76. static int syscfg_reset_assert(struct reset_controller_dev *rcdev,
  77. unsigned long idx)
  78. {
  79. return syscfg_reset_program_hw(rcdev, idx, true);
  80. }
  81. static int syscfg_reset_deassert(struct reset_controller_dev *rcdev,
  82. unsigned long idx)
  83. {
  84. return syscfg_reset_program_hw(rcdev, idx, false);
  85. }
  86. static int syscfg_reset_dev(struct reset_controller_dev *rcdev,
  87. unsigned long idx)
  88. {
  89. int err;
  90. err = syscfg_reset_assert(rcdev, idx);
  91. if (err)
  92. return err;
  93. return syscfg_reset_deassert(rcdev, idx);
  94. }
  95. static int syscfg_reset_status(struct reset_controller_dev *rcdev,
  96. unsigned long idx)
  97. {
  98. struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
  99. const struct syscfg_reset_channel *ch;
  100. u32 ret_val = 0;
  101. int err;
  102. if (idx >= rcdev->nr_resets)
  103. return -EINVAL;
  104. ch = &rst->channels[idx];
  105. if (ch->ack)
  106. err = regmap_field_read(ch->ack, &ret_val);
  107. else
  108. err = regmap_field_read(ch->reset, &ret_val);
  109. if (err)
  110. return err;
  111. return rst->active_low ? !ret_val : !!ret_val;
  112. }
  113. static const struct reset_control_ops syscfg_reset_ops = {
  114. .reset = syscfg_reset_dev,
  115. .assert = syscfg_reset_assert,
  116. .deassert = syscfg_reset_deassert,
  117. .status = syscfg_reset_status,
  118. };
  119. static int syscfg_reset_controller_register(struct device *dev,
  120. const struct syscfg_reset_controller_data *data)
  121. {
  122. struct syscfg_reset_controller *rc;
  123. size_t size;
  124. int i, err;
  125. rc = devm_kzalloc(dev, sizeof(*rc), GFP_KERNEL);
  126. if (!rc)
  127. return -ENOMEM;
  128. size = sizeof(struct syscfg_reset_channel) * data->nr_channels;
  129. rc->channels = devm_kzalloc(dev, size, GFP_KERNEL);
  130. if (!rc->channels)
  131. return -ENOMEM;
  132. rc->rst.ops = &syscfg_reset_ops,
  133. rc->rst.of_node = dev->of_node;
  134. rc->rst.nr_resets = data->nr_channels;
  135. rc->active_low = data->active_low;
  136. for (i = 0; i < data->nr_channels; i++) {
  137. struct regmap *map;
  138. struct regmap_field *f;
  139. const char *compatible = data->channels[i].compatible;
  140. map = syscon_regmap_lookup_by_compatible(compatible);
  141. if (IS_ERR(map))
  142. return PTR_ERR(map);
  143. f = devm_regmap_field_alloc(dev, map, data->channels[i].reset);
  144. if (IS_ERR(f))
  145. return PTR_ERR(f);
  146. rc->channels[i].reset = f;
  147. if (!data->wait_for_ack)
  148. continue;
  149. f = devm_regmap_field_alloc(dev, map, data->channels[i].ack);
  150. if (IS_ERR(f))
  151. return PTR_ERR(f);
  152. rc->channels[i].ack = f;
  153. }
  154. err = reset_controller_register(&rc->rst);
  155. if (!err)
  156. dev_info(dev, "registered\n");
  157. return err;
  158. }
  159. int syscfg_reset_probe(struct platform_device *pdev)
  160. {
  161. struct device *dev = pdev ? &pdev->dev : NULL;
  162. const struct of_device_id *match;
  163. if (!dev || !dev->driver)
  164. return -ENODEV;
  165. match = of_match_device(dev->driver->of_match_table, dev);
  166. if (!match || !match->data)
  167. return -EINVAL;
  168. return syscfg_reset_controller_register(dev, match->data);
  169. }