llcc-amon.c 14 KB

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  1. /* Copyright (c) 2016, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/of.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/irq.h>
  17. #include <linux/sysfs.h>
  18. #include <linux/kobject.h>
  19. #include <linux/regmap.h>
  20. #include <linux/mfd/syscon.h>
  21. #include <linux/platform_device.h>
  22. #define MODULE_NAME "LLCC AMON deadlock detector"
  23. static bool qcom_llcc_amon_panic = IS_ENABLED(
  24. CONFIG_QCOM_LLCC_AMON_PANIC) ? true:false;
  25. module_param(qcom_llcc_amon_panic, bool, S_IRUGO | S_IWUSR);
  26. MODULE_PARM_DESC(qcom_llcc_amon_panic,
  27. "Enables deadlock detection by AMON");
  28. static int amon_interrupt_mode;
  29. module_param(amon_interrupt_mode, int, S_IRUGO | S_IWUSR);
  30. MODULE_PARM_DESC(amon_interrupt_mode,
  31. "Controls whether to use interrupt or poll mode");
  32. enum channel_type {
  33. AMON_READ,
  34. AMON_WRITE,
  35. AMON_EVICT,
  36. };
  37. #define LLCC_AMON_FG_CNT_MASK 0x70
  38. #define LLCC_AMON_CG_CNT_MASK 0x380
  39. #define LLCC_AMON_FG_CNT_SHIFT 0x4
  40. #define LLCC_AMON_CG_CNT_SHIFT 0x7
  41. #define LLCC_COMMON_IRQ_AMON 0x8
  42. #define LLCC_AMON_STATUS0_MASK 0x3ff
  43. #define LLCC_AMON_CHAN_SHIFT 0x4
  44. #define LLCC_AMON_CNTR_SATURATED_SOURCE_TYPE(x) (0x1 << x)
  45. #define LLCC_AMON_CFG0_DLDM_SHIFT 0x2
  46. /* AMON register offsets */
  47. #define LLCC_AMON_START 0x3d000
  48. #define LLCC_AMON_CFG0 0x3d000
  49. #define LLCC_AMON_EVICT_REGS 0x3d020
  50. #define LLCC_AMON_WRITE_REGS 0x3d060
  51. #define LLCC_AMON_READ_REGS 0x3d100
  52. #define LLCC_AMON_IRQ_STATUS 0x3d200
  53. #define LLCC_AMON_IRQ_CLEAR 0x3d208
  54. #define LLCC_AMON_IRQ_ENABLE 0x3d20c
  55. #define LLCC_AMON_STATUS_0 0x3d210
  56. /* AMON configuration register bits */
  57. #define LLCC_AMON_CFG0_ENABLE 0x0 /* Enable AMON */
  58. #define LLCC_AMON_CFG0_DLDM 0x2 /* AMON deadlock detection mode */
  59. #define LLCC_AMON_CFG0_SCRM 0x3 /* Enable SCID based deadlock detection */
  60. /* Number of entries maintained by AMON */
  61. #define NR_READ_ENTRIES 40
  62. #define NR_WRITE_ENTRIES 16
  63. #define NR_EVICT_ENTRIES 8
  64. #define AMON_IRQ_BIT 0x0
  65. #define CHAN_OFF(x) (x << 2)
  66. /**
  67. * llcc_amon_data: Data structure containing AMON driver data
  68. *
  69. * @llcc_amon_regmap: map of AMON register block
  70. * @dev: LLCC activiy monitor device
  71. * @amon_irq: LLCC activity monitor irq number
  72. * @amon_fg_cnt: LLCC activity monitor fine grained counter overflow bit
  73. * @amon_work: LLCC activity monitor work item to poll and
  74. * dump AMON CSRs
  75. * @amon_wq: LLCC activity monitor workqueue to poll and
  76. * dump AMON CSRs
  77. * @amon_lock: lock to access and change AMON driver data
  78. *
  79. **/
  80. struct llcc_amon_data {
  81. struct regmap *llcc_amon_regmap;
  82. struct device *dev;
  83. u32 amon_irq;
  84. u32 amon_fg_cnt;
  85. struct work_struct amon_work;
  86. struct workqueue_struct *amon_wq;
  87. struct mutex amon_lock;
  88. };
  89. static void amon_dump_channel_status(struct device *dev, u32 chnum, u32 type)
  90. {
  91. u32 llcc_amon_csr;
  92. struct llcc_amon_data *amon_data = dev_get_drvdata(dev);
  93. switch (type) {
  94. case AMON_READ:
  95. regmap_read(amon_data->llcc_amon_regmap,
  96. (LLCC_AMON_READ_REGS + CHAN_OFF(chnum)),
  97. &llcc_amon_csr);
  98. dev_err(dev, "READ entry %u : %8x\n",
  99. chnum, llcc_amon_csr);
  100. break;
  101. case AMON_WRITE:
  102. regmap_read(amon_data->llcc_amon_regmap,
  103. (LLCC_AMON_WRITE_REGS + CHAN_OFF(chnum)),
  104. &llcc_amon_csr);
  105. dev_err(dev, "WRITE entry %u : %8x\n",
  106. chnum, llcc_amon_csr);
  107. break;
  108. case AMON_EVICT:
  109. regmap_read(amon_data->llcc_amon_regmap,
  110. (LLCC_AMON_EVICT_REGS + CHAN_OFF(chnum)),
  111. &llcc_amon_csr);
  112. dev_err(dev, "EVICT entry %u : %8x\n",
  113. chnum, llcc_amon_csr);
  114. break;
  115. }
  116. }
  117. static void amon_dump_read_channel_status(struct device *dev, u32 chnum)
  118. {
  119. amon_dump_channel_status(dev, chnum, AMON_READ);
  120. }
  121. static void amon_dump_write_channel_status(struct device *dev, u32 chnum)
  122. {
  123. amon_dump_channel_status(dev, chnum, AMON_WRITE);
  124. }
  125. static void amon_dump_evict_channel_status(struct device *dev, u32 chnum)
  126. {
  127. amon_dump_channel_status(dev, chnum, AMON_EVICT);
  128. }
  129. static ssize_t amon_fg_count_store(struct device *dev,
  130. struct device_attribute *attr,
  131. const char *buf, size_t n)
  132. {
  133. struct llcc_amon_data *amon_data;
  134. int ret;
  135. u32 count;
  136. amon_data = dev_get_drvdata(dev);
  137. if (!amon_data)
  138. return -ENODEV;
  139. mutex_lock(&amon_data->amon_lock);
  140. ret = kstrtouint(buf, 0, &count);
  141. if (ret) {
  142. dev_err(amon_data->dev, "invalid user input\n");
  143. mutex_unlock(&amon_data->amon_lock);
  144. return ret;
  145. }
  146. /* Set fine grained counter */
  147. regmap_update_bits(amon_data->llcc_amon_regmap, LLCC_AMON_CFG0,
  148. LLCC_AMON_FG_CNT_MASK, (count << LLCC_AMON_FG_CNT_SHIFT));
  149. mutex_unlock(&amon_data->amon_lock);
  150. return n;
  151. }
  152. static ssize_t amon_fg_count_show(struct device *dev,
  153. struct device_attribute *attr,
  154. char *buf)
  155. {
  156. struct llcc_amon_data *amon_data;
  157. int ret;
  158. u32 count, llcc_amon_cfg0;
  159. amon_data = dev_get_drvdata(dev);
  160. if (!amon_data)
  161. return -ENODEV;
  162. mutex_lock(&amon_data->amon_lock);
  163. /* Get fine grained counter */
  164. regmap_read(amon_data->llcc_amon_regmap, LLCC_AMON_CFG0,
  165. &llcc_amon_cfg0);
  166. count = (llcc_amon_cfg0 & LLCC_AMON_FG_CNT_MASK)
  167. >> LLCC_AMON_FG_CNT_SHIFT;
  168. ret = snprintf(buf, PAGE_SIZE, "%u\n", count);
  169. mutex_unlock(&amon_data->amon_lock);
  170. return ret;
  171. }
  172. static ssize_t amon_deadlock_mode_store(struct device *dev,
  173. struct device_attribute *attr,
  174. const char *buf, size_t n)
  175. {
  176. struct llcc_amon_data *amon_data;
  177. int ret;
  178. u32 mode;
  179. amon_data = dev_get_drvdata(dev);
  180. if (!amon_data)
  181. return -ENODEV;
  182. mutex_lock(&amon_data->amon_lock);
  183. ret = kstrtouint(buf, 0, &mode);
  184. if (ret) {
  185. dev_err(amon_data->dev, "invalid user input\n");
  186. mutex_unlock(&amon_data->amon_lock);
  187. return ret;
  188. }
  189. /* Set deadlock detection mode */
  190. regmap_update_bits(amon_data->llcc_amon_regmap, LLCC_AMON_CFG0,
  191. BIT(LLCC_AMON_CFG0_DLDM), mode);
  192. mutex_unlock(&amon_data->amon_lock);
  193. return n;
  194. }
  195. static ssize_t amon_deadlock_mode_show(struct device *dev,
  196. struct device_attribute *attr,
  197. char *buf)
  198. {
  199. struct llcc_amon_data *amon_data;
  200. int ret;
  201. u32 val, llcc_amon_cfg0;
  202. amon_data = dev_get_drvdata(dev);
  203. if (!amon_data)
  204. return -ENODEV;
  205. mutex_lock(&amon_data->amon_lock);
  206. /* Get deadlock detection mode */
  207. regmap_read(amon_data->llcc_amon_regmap, LLCC_AMON_CFG0,
  208. &llcc_amon_cfg0);
  209. val = llcc_amon_cfg0 & BIT(LLCC_AMON_CFG0_DLDM);
  210. ret = snprintf(buf, PAGE_SIZE, "%d\n",
  211. val >> LLCC_AMON_CFG0_DLDM_SHIFT);
  212. mutex_unlock(&amon_data->amon_lock);
  213. return ret;
  214. }
  215. static DEVICE_ATTR(amon_fg_count, S_IRUGO | S_IWUSR,
  216. amon_fg_count_show, amon_fg_count_store);
  217. static DEVICE_ATTR(amon_deadlock_mode, S_IRUGO | S_IWUSR,
  218. amon_deadlock_mode_show, amon_deadlock_mode_store);
  219. static const struct device_attribute *llcc_amon_attrs[] = {
  220. &dev_attr_amon_fg_count,
  221. &dev_attr_amon_deadlock_mode,
  222. NULL,
  223. };
  224. static int amon_create_sysfs_files(struct device *dev,
  225. const struct device_attribute **attrs)
  226. {
  227. int ret = 0, i;
  228. for (i = 0; attrs[i] != NULL; i++) {
  229. ret = device_create_file(dev, attrs[i]);
  230. if (ret) {
  231. dev_err(dev, "AMON: Couldn't create sysfs entry: %s!\n",
  232. attrs[i]->attr.name);
  233. break;
  234. }
  235. }
  236. return ret;
  237. }
  238. static int amon_remove_sysfs_files(struct device *dev,
  239. const struct device_attribute **attrs)
  240. {
  241. int ret = 0, i;
  242. for (i = 0; attrs[i] != NULL; i++)
  243. device_remove_file(dev, attrs[i]);
  244. return ret;
  245. }
  246. static void enable_qcom_amon_interrupt(struct llcc_amon_data *amon_data)
  247. {
  248. regmap_update_bits(amon_data->llcc_amon_regmap, LLCC_AMON_IRQ_ENABLE,
  249. BIT(AMON_IRQ_BIT), BIT(AMON_IRQ_BIT));
  250. }
  251. void disable_qcom_amon_interrupt(struct llcc_amon_data *amon_data)
  252. {
  253. regmap_update_bits(amon_data->llcc_amon_regmap, LLCC_AMON_IRQ_ENABLE,
  254. AMON_IRQ_BIT, AMON_IRQ_BIT);
  255. }
  256. static void clear_qcom_amon_interrupt(struct llcc_amon_data *amon_data)
  257. {
  258. regmap_update_bits(amon_data->llcc_amon_regmap, LLCC_AMON_IRQ_CLEAR,
  259. BIT(AMON_IRQ_BIT), BIT(AMON_IRQ_BIT));
  260. }
  261. static void amon_poll_work(struct work_struct *work)
  262. {
  263. u32 llcc_amon_status0, llcc_amon_irq_status, chnum;
  264. struct llcc_amon_data *amon_data = container_of(work,
  265. struct llcc_amon_data, amon_work);
  266. /* Check for deadlock */
  267. regmap_read(amon_data->llcc_amon_regmap, LLCC_AMON_IRQ_STATUS,
  268. &llcc_amon_irq_status);
  269. if (!(llcc_amon_irq_status & BIT(AMON_IRQ_BIT)))
  270. /* No deadlock interrupt */
  271. return;
  272. regmap_read(amon_data->llcc_amon_regmap, LLCC_AMON_STATUS_0,
  273. &llcc_amon_status0);
  274. if (!llcc_amon_status0)
  275. return;
  276. chnum = (llcc_amon_status0 & LLCC_AMON_STATUS0_MASK) >>
  277. LLCC_AMON_CHAN_SHIFT;
  278. if (llcc_amon_status0 &
  279. LLCC_AMON_CNTR_SATURATED_SOURCE_TYPE(AMON_READ)) {
  280. /* Read channel error */
  281. amon_dump_read_channel_status(amon_data->dev, chnum);
  282. } else if (llcc_amon_status0 &
  283. LLCC_AMON_CNTR_SATURATED_SOURCE_TYPE(AMON_WRITE)) {
  284. /* Write channel error */
  285. amon_dump_write_channel_status(amon_data->dev, chnum);
  286. } else if (llcc_amon_status0 &
  287. LLCC_AMON_CNTR_SATURATED_SOURCE_TYPE(AMON_EVICT)) {
  288. /* Evict channel error */
  289. amon_dump_evict_channel_status(amon_data->dev, chnum);
  290. }
  291. clear_qcom_amon_interrupt(amon_data);
  292. if (qcom_llcc_amon_panic)
  293. panic("AMON deadlock detected");
  294. }
  295. static irqreturn_t llcc_amon_irq_handler(int irq, void *dev_data)
  296. {
  297. u32 llcc_amon_status0, llcc_amon_irq_status;
  298. int chnum;
  299. struct llcc_amon_data *amon_data = dev_data;
  300. regmap_read(amon_data->llcc_amon_regmap, LLCC_AMON_IRQ_STATUS,
  301. &llcc_amon_irq_status);
  302. if (!(llcc_amon_irq_status & BIT(AMON_IRQ_BIT)))
  303. /* No deadlock interrupt */
  304. return IRQ_NONE;
  305. regmap_read(amon_data->llcc_amon_regmap, LLCC_AMON_STATUS_0,
  306. &llcc_amon_status0);
  307. if (unlikely(llcc_amon_status0 == 0))
  308. return IRQ_NONE;
  309. /*
  310. * Check type of interrupt and channel number.
  311. * Call corresponding handler with channel number.
  312. */
  313. chnum = (llcc_amon_status0 & LLCC_AMON_STATUS0_MASK) >>
  314. LLCC_AMON_CHAN_SHIFT;
  315. if (llcc_amon_status0 &
  316. LLCC_AMON_CNTR_SATURATED_SOURCE_TYPE(AMON_READ)) {
  317. /* Read channel error */
  318. amon_dump_read_channel_status(amon_data->dev, chnum);
  319. } else if (llcc_amon_status0 &
  320. LLCC_AMON_CNTR_SATURATED_SOURCE_TYPE(AMON_WRITE)) {
  321. /* Write channel error */
  322. amon_dump_write_channel_status(amon_data->dev, chnum);
  323. } else if (llcc_amon_status0 &
  324. LLCC_AMON_CNTR_SATURATED_SOURCE_TYPE(AMON_EVICT)) {
  325. /* Evict channel error */
  326. amon_dump_evict_channel_status(amon_data->dev, chnum);
  327. }
  328. clear_qcom_amon_interrupt(amon_data);
  329. if (qcom_llcc_amon_panic)
  330. panic("AMON deadlock detected");
  331. return IRQ_HANDLED;
  332. }
  333. static int qcom_llcc_amon_dt_to_pdata(struct platform_device *pdev,
  334. struct llcc_amon_data *pdata)
  335. {
  336. struct device_node *node = pdev->dev.of_node;
  337. pdata->dev = &pdev->dev;
  338. pdata->llcc_amon_regmap = syscon_node_to_regmap(
  339. pdata->dev->parent->of_node);
  340. if (IS_ERR(pdata->llcc_amon_regmap)) {
  341. dev_err(pdata->dev, "No regmap for syscon amon parent\n");
  342. return -ENOMEM;
  343. }
  344. pdata->amon_irq = platform_get_irq(pdev, 0);
  345. if (!pdata->amon_irq)
  346. return -ENODEV;
  347. of_property_read_u32(node, "qcom,fg-cnt",
  348. &pdata->amon_fg_cnt);
  349. return 0;
  350. }
  351. static int qcom_llcc_amon_probe(struct platform_device *pdev)
  352. {
  353. int ret;
  354. struct llcc_amon_data *amon_data;
  355. u32 cnt;
  356. if (!pdev->dev.of_node)
  357. return -ENODEV;
  358. amon_data = devm_kzalloc(&pdev->dev, sizeof(struct llcc_amon_data),
  359. GFP_KERNEL);
  360. if (!amon_data)
  361. return -ENOMEM;
  362. ret = qcom_llcc_amon_dt_to_pdata(pdev, amon_data);
  363. if (ret) {
  364. dev_err(amon_data->dev, "failed to get amon data\n");
  365. return ret;
  366. }
  367. amon_data->dev = &pdev->dev;
  368. platform_set_drvdata(pdev, amon_data);
  369. /* Enable Activity Monitor */
  370. regmap_update_bits(amon_data->llcc_amon_regmap, LLCC_AMON_CFG0,
  371. BIT(LLCC_AMON_CFG0_ENABLE), 0x1);
  372. /* Enable Activity Monitor (AMON) as deadlock detector */
  373. regmap_update_bits(amon_data->llcc_amon_regmap, LLCC_AMON_CFG0,
  374. BIT(LLCC_AMON_CFG0_DLDM), BIT(LLCC_AMON_CFG0_DLDM));
  375. /* Set fine grained counter */
  376. cnt = amon_data->amon_fg_cnt << LLCC_AMON_FG_CNT_SHIFT;
  377. if (cnt)
  378. regmap_update_bits(amon_data->llcc_amon_regmap,
  379. LLCC_AMON_CFG0, LLCC_AMON_FG_CNT_MASK, cnt);
  380. mutex_init(&amon_data->amon_lock);
  381. ret = amon_create_sysfs_files(&pdev->dev, llcc_amon_attrs);
  382. if (ret) {
  383. dev_err(amon_data->dev,
  384. "failed to create sysfs entries\n");
  385. platform_set_drvdata(pdev, NULL);
  386. return ret;
  387. }
  388. if (amon_interrupt_mode) { /* Interrupt mode */
  389. ret = devm_request_irq(amon_data->dev, amon_data->amon_irq,
  390. llcc_amon_irq_handler, IRQF_TRIGGER_RISING,
  391. "amon_deadlock", amon_data);
  392. if (ret) {
  393. dev_err(amon_data->dev,
  394. "failed to request amon deadlock irq\n");
  395. platform_set_drvdata(pdev, NULL);
  396. return ret;
  397. }
  398. enable_qcom_amon_interrupt(amon_data);
  399. } else { /* Polling mode */
  400. amon_data->amon_wq = create_singlethread_workqueue(
  401. "amon_deadlock_detector");
  402. if (!amon_data->amon_wq) {
  403. dev_err(amon_data->dev,
  404. "failed to create polling work queue\n");
  405. platform_set_drvdata(pdev, NULL);
  406. return -ENOMEM;
  407. }
  408. INIT_WORK(&amon_data->amon_work, amon_poll_work);
  409. queue_work(amon_data->amon_wq, &amon_data->amon_work);
  410. }
  411. return 0;
  412. }
  413. static int qcom_llcc_amon_remove(struct platform_device *pdev)
  414. {
  415. struct llcc_amon_data *amon_data = platform_get_drvdata(pdev);
  416. disable_qcom_amon_interrupt(amon_data);
  417. clear_qcom_amon_interrupt(amon_data);
  418. /* Disable Activity Monitor (AMON) as deadlock detector */
  419. regmap_update_bits(amon_data->llcc_amon_regmap, LLCC_AMON_CFG0,
  420. BIT(LLCC_AMON_CFG0_DLDM), 0x0);
  421. /* Disable Activity Monitor */
  422. regmap_update_bits(amon_data->llcc_amon_regmap, LLCC_AMON_CFG0,
  423. BIT(LLCC_AMON_CFG0_ENABLE), 0x0);
  424. amon_remove_sysfs_files(&pdev->dev, llcc_amon_attrs);
  425. destroy_workqueue(amon_data->amon_wq);
  426. platform_set_drvdata(pdev, NULL);
  427. return 0;
  428. }
  429. static const struct of_device_id qcom_llcc_amon_match_table[] = {
  430. { .compatible = "qcom,llcc-amon" },
  431. {},
  432. };
  433. static struct platform_driver qcom_llcc_amon_driver = {
  434. .probe = qcom_llcc_amon_probe,
  435. .remove = qcom_llcc_amon_remove,
  436. .driver = {
  437. .name = MODULE_NAME,
  438. .owner = THIS_MODULE,
  439. .of_match_table = qcom_llcc_amon_match_table,
  440. },
  441. };
  442. static int __init init_qcom_llcc_amon(void)
  443. {
  444. return platform_driver_register(&qcom_llcc_amon_driver);
  445. }
  446. module_init(init_qcom_llcc_amon);
  447. static void __exit exit_qcom_llcc_amon(void)
  448. {
  449. return platform_driver_unregister(&qcom_llcc_amon_driver);
  450. }
  451. module_exit(exit_qcom_llcc_amon);
  452. MODULE_DESCRIPTION("QTI LLCC Activity Monitor Driver");
  453. MODULE_LICENSE("GPL v2");