spi-cavium-octeon.c 2.5 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2011, 2012 Cavium, Inc.
  7. */
  8. #include <linux/platform_device.h>
  9. #include <linux/spi/spi.h>
  10. #include <linux/module.h>
  11. #include <linux/io.h>
  12. #include <linux/of.h>
  13. #include <asm/octeon/octeon.h>
  14. #include "spi-cavium.h"
  15. static int octeon_spi_probe(struct platform_device *pdev)
  16. {
  17. struct resource *res_mem;
  18. void __iomem *reg_base;
  19. struct spi_master *master;
  20. struct octeon_spi *p;
  21. int err = -ENOENT;
  22. master = spi_alloc_master(&pdev->dev, sizeof(struct octeon_spi));
  23. if (!master)
  24. return -ENOMEM;
  25. p = spi_master_get_devdata(master);
  26. platform_set_drvdata(pdev, master);
  27. res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  28. reg_base = devm_ioremap_resource(&pdev->dev, res_mem);
  29. if (IS_ERR(reg_base)) {
  30. err = PTR_ERR(reg_base);
  31. goto fail;
  32. }
  33. p->register_base = reg_base;
  34. p->sys_freq = octeon_get_io_clock_rate();
  35. p->regs.config = 0;
  36. p->regs.status = 0x08;
  37. p->regs.tx = 0x10;
  38. p->regs.data = 0x80;
  39. master->num_chipselect = 4;
  40. master->mode_bits = SPI_CPHA |
  41. SPI_CPOL |
  42. SPI_CS_HIGH |
  43. SPI_LSB_FIRST |
  44. SPI_3WIRE;
  45. master->transfer_one_message = octeon_spi_transfer_one_message;
  46. master->bits_per_word_mask = SPI_BPW_MASK(8);
  47. master->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ;
  48. master->dev.of_node = pdev->dev.of_node;
  49. err = devm_spi_register_master(&pdev->dev, master);
  50. if (err) {
  51. dev_err(&pdev->dev, "register master failed: %d\n", err);
  52. goto fail;
  53. }
  54. dev_info(&pdev->dev, "OCTEON SPI bus driver\n");
  55. return 0;
  56. fail:
  57. spi_master_put(master);
  58. return err;
  59. }
  60. static int octeon_spi_remove(struct platform_device *pdev)
  61. {
  62. struct spi_master *master = platform_get_drvdata(pdev);
  63. struct octeon_spi *p = spi_master_get_devdata(master);
  64. /* Clear the CSENA* and put everything in a known state. */
  65. writeq(0, p->register_base + OCTEON_SPI_CFG(p));
  66. return 0;
  67. }
  68. static const struct of_device_id octeon_spi_match[] = {
  69. { .compatible = "cavium,octeon-3010-spi", },
  70. {},
  71. };
  72. MODULE_DEVICE_TABLE(of, octeon_spi_match);
  73. static struct platform_driver octeon_spi_driver = {
  74. .driver = {
  75. .name = "spi-octeon",
  76. .of_match_table = octeon_spi_match,
  77. },
  78. .probe = octeon_spi_probe,
  79. .remove = octeon_spi_remove,
  80. };
  81. module_platform_driver(octeon_spi_driver);
  82. MODULE_DESCRIPTION("Cavium, Inc. OCTEON SPI bus driver");
  83. MODULE_AUTHOR("David Daney");
  84. MODULE_LICENSE("GPL");