pxa.c 22 KB

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  1. /*
  2. * Based on drivers/serial/8250.c by Russell King.
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Feb 20, 2003
  6. * Copyright: (C) 2003 Monta Vista Software, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * Note 1: This driver is made separate from the already too overloaded
  14. * 8250.c because it needs some kirks of its own and that'll make it
  15. * easier to add DMA support.
  16. *
  17. * Note 2: I'm too sick of device allocation policies for serial ports.
  18. * If someone else wants to request an "official" allocation of major/minor
  19. * for this driver please be my guest. And don't forget that new hardware
  20. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  21. * hope for a better port registration and dynamic device allocation scheme
  22. * with the serial core maintainer satisfaction to appear soon.
  23. */
  24. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  25. #define SUPPORT_SYSRQ
  26. #endif
  27. #include <linux/ioport.h>
  28. #include <linux/init.h>
  29. #include <linux/console.h>
  30. #include <linux/sysrq.h>
  31. #include <linux/serial_reg.h>
  32. #include <linux/circ_buf.h>
  33. #include <linux/delay.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/of.h>
  36. #include <linux/platform_device.h>
  37. #include <linux/tty.h>
  38. #include <linux/tty_flip.h>
  39. #include <linux/serial_core.h>
  40. #include <linux/clk.h>
  41. #include <linux/io.h>
  42. #include <linux/slab.h>
  43. #define PXA_NAME_LEN 8
  44. struct uart_pxa_port {
  45. struct uart_port port;
  46. unsigned char ier;
  47. unsigned char lcr;
  48. unsigned char mcr;
  49. unsigned int lsr_break_flag;
  50. struct clk *clk;
  51. char name[PXA_NAME_LEN];
  52. };
  53. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  54. {
  55. offset <<= 2;
  56. return readl(up->port.membase + offset);
  57. }
  58. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  59. {
  60. offset <<= 2;
  61. writel(value, up->port.membase + offset);
  62. }
  63. static void serial_pxa_enable_ms(struct uart_port *port)
  64. {
  65. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  66. up->ier |= UART_IER_MSI;
  67. serial_out(up, UART_IER, up->ier);
  68. }
  69. static void serial_pxa_stop_tx(struct uart_port *port)
  70. {
  71. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  72. if (up->ier & UART_IER_THRI) {
  73. up->ier &= ~UART_IER_THRI;
  74. serial_out(up, UART_IER, up->ier);
  75. }
  76. }
  77. static void serial_pxa_stop_rx(struct uart_port *port)
  78. {
  79. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  80. up->ier &= ~UART_IER_RLSI;
  81. up->port.read_status_mask &= ~UART_LSR_DR;
  82. serial_out(up, UART_IER, up->ier);
  83. }
  84. static inline void receive_chars(struct uart_pxa_port *up, int *status)
  85. {
  86. unsigned int ch, flag;
  87. int max_count = 256;
  88. do {
  89. /* work around Errata #20 according to
  90. * Intel(R) PXA27x Processor Family
  91. * Specification Update (May 2005)
  92. *
  93. * Step 2
  94. * Disable the Reciever Time Out Interrupt via IER[RTOEI]
  95. */
  96. up->ier &= ~UART_IER_RTOIE;
  97. serial_out(up, UART_IER, up->ier);
  98. ch = serial_in(up, UART_RX);
  99. flag = TTY_NORMAL;
  100. up->port.icount.rx++;
  101. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  102. UART_LSR_FE | UART_LSR_OE))) {
  103. /*
  104. * For statistics only
  105. */
  106. if (*status & UART_LSR_BI) {
  107. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  108. up->port.icount.brk++;
  109. /*
  110. * We do the SysRQ and SAK checking
  111. * here because otherwise the break
  112. * may get masked by ignore_status_mask
  113. * or read_status_mask.
  114. */
  115. if (uart_handle_break(&up->port))
  116. goto ignore_char;
  117. } else if (*status & UART_LSR_PE)
  118. up->port.icount.parity++;
  119. else if (*status & UART_LSR_FE)
  120. up->port.icount.frame++;
  121. if (*status & UART_LSR_OE)
  122. up->port.icount.overrun++;
  123. /*
  124. * Mask off conditions which should be ignored.
  125. */
  126. *status &= up->port.read_status_mask;
  127. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  128. if (up->port.line == up->port.cons->index) {
  129. /* Recover the break flag from console xmit */
  130. *status |= up->lsr_break_flag;
  131. up->lsr_break_flag = 0;
  132. }
  133. #endif
  134. if (*status & UART_LSR_BI) {
  135. flag = TTY_BREAK;
  136. } else if (*status & UART_LSR_PE)
  137. flag = TTY_PARITY;
  138. else if (*status & UART_LSR_FE)
  139. flag = TTY_FRAME;
  140. }
  141. if (uart_handle_sysrq_char(&up->port, ch))
  142. goto ignore_char;
  143. uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
  144. ignore_char:
  145. *status = serial_in(up, UART_LSR);
  146. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  147. tty_flip_buffer_push(&up->port.state->port);
  148. /* work around Errata #20 according to
  149. * Intel(R) PXA27x Processor Family
  150. * Specification Update (May 2005)
  151. *
  152. * Step 6:
  153. * No more data in FIFO: Re-enable RTO interrupt via IER[RTOIE]
  154. */
  155. up->ier |= UART_IER_RTOIE;
  156. serial_out(up, UART_IER, up->ier);
  157. }
  158. static void transmit_chars(struct uart_pxa_port *up)
  159. {
  160. struct circ_buf *xmit = &up->port.state->xmit;
  161. int count;
  162. if (up->port.x_char) {
  163. serial_out(up, UART_TX, up->port.x_char);
  164. up->port.icount.tx++;
  165. up->port.x_char = 0;
  166. return;
  167. }
  168. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  169. serial_pxa_stop_tx(&up->port);
  170. return;
  171. }
  172. count = up->port.fifosize / 2;
  173. do {
  174. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  175. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  176. up->port.icount.tx++;
  177. if (uart_circ_empty(xmit))
  178. break;
  179. } while (--count > 0);
  180. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  181. uart_write_wakeup(&up->port);
  182. if (uart_circ_empty(xmit))
  183. serial_pxa_stop_tx(&up->port);
  184. }
  185. static void serial_pxa_start_tx(struct uart_port *port)
  186. {
  187. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  188. if (!(up->ier & UART_IER_THRI)) {
  189. up->ier |= UART_IER_THRI;
  190. serial_out(up, UART_IER, up->ier);
  191. }
  192. }
  193. /* should hold up->port.lock */
  194. static inline void check_modem_status(struct uart_pxa_port *up)
  195. {
  196. int status;
  197. status = serial_in(up, UART_MSR);
  198. if ((status & UART_MSR_ANY_DELTA) == 0)
  199. return;
  200. if (status & UART_MSR_TERI)
  201. up->port.icount.rng++;
  202. if (status & UART_MSR_DDSR)
  203. up->port.icount.dsr++;
  204. if (status & UART_MSR_DDCD)
  205. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  206. if (status & UART_MSR_DCTS)
  207. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  208. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  209. }
  210. /*
  211. * This handles the interrupt from one port.
  212. */
  213. static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
  214. {
  215. struct uart_pxa_port *up = dev_id;
  216. unsigned int iir, lsr;
  217. iir = serial_in(up, UART_IIR);
  218. if (iir & UART_IIR_NO_INT)
  219. return IRQ_NONE;
  220. spin_lock(&up->port.lock);
  221. lsr = serial_in(up, UART_LSR);
  222. if (lsr & UART_LSR_DR)
  223. receive_chars(up, &lsr);
  224. check_modem_status(up);
  225. if (lsr & UART_LSR_THRE)
  226. transmit_chars(up);
  227. spin_unlock(&up->port.lock);
  228. return IRQ_HANDLED;
  229. }
  230. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  231. {
  232. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  233. unsigned long flags;
  234. unsigned int ret;
  235. spin_lock_irqsave(&up->port.lock, flags);
  236. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  237. spin_unlock_irqrestore(&up->port.lock, flags);
  238. return ret;
  239. }
  240. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  241. {
  242. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  243. unsigned char status;
  244. unsigned int ret;
  245. status = serial_in(up, UART_MSR);
  246. ret = 0;
  247. if (status & UART_MSR_DCD)
  248. ret |= TIOCM_CAR;
  249. if (status & UART_MSR_RI)
  250. ret |= TIOCM_RNG;
  251. if (status & UART_MSR_DSR)
  252. ret |= TIOCM_DSR;
  253. if (status & UART_MSR_CTS)
  254. ret |= TIOCM_CTS;
  255. return ret;
  256. }
  257. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  258. {
  259. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  260. unsigned char mcr = 0;
  261. if (mctrl & TIOCM_RTS)
  262. mcr |= UART_MCR_RTS;
  263. if (mctrl & TIOCM_DTR)
  264. mcr |= UART_MCR_DTR;
  265. if (mctrl & TIOCM_OUT1)
  266. mcr |= UART_MCR_OUT1;
  267. if (mctrl & TIOCM_OUT2)
  268. mcr |= UART_MCR_OUT2;
  269. if (mctrl & TIOCM_LOOP)
  270. mcr |= UART_MCR_LOOP;
  271. mcr |= up->mcr;
  272. serial_out(up, UART_MCR, mcr);
  273. }
  274. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  275. {
  276. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  277. unsigned long flags;
  278. spin_lock_irqsave(&up->port.lock, flags);
  279. if (break_state == -1)
  280. up->lcr |= UART_LCR_SBC;
  281. else
  282. up->lcr &= ~UART_LCR_SBC;
  283. serial_out(up, UART_LCR, up->lcr);
  284. spin_unlock_irqrestore(&up->port.lock, flags);
  285. }
  286. static int serial_pxa_startup(struct uart_port *port)
  287. {
  288. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  289. unsigned long flags;
  290. int retval;
  291. if (port->line == 3) /* HWUART */
  292. up->mcr |= UART_MCR_AFE;
  293. else
  294. up->mcr = 0;
  295. up->port.uartclk = clk_get_rate(up->clk);
  296. /*
  297. * Allocate the IRQ
  298. */
  299. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  300. if (retval)
  301. return retval;
  302. /*
  303. * Clear the FIFO buffers and disable them.
  304. * (they will be reenabled in set_termios())
  305. */
  306. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  307. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  308. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  309. serial_out(up, UART_FCR, 0);
  310. /*
  311. * Clear the interrupt registers.
  312. */
  313. (void) serial_in(up, UART_LSR);
  314. (void) serial_in(up, UART_RX);
  315. (void) serial_in(up, UART_IIR);
  316. (void) serial_in(up, UART_MSR);
  317. /*
  318. * Now, initialize the UART
  319. */
  320. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  321. spin_lock_irqsave(&up->port.lock, flags);
  322. up->port.mctrl |= TIOCM_OUT2;
  323. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  324. spin_unlock_irqrestore(&up->port.lock, flags);
  325. /*
  326. * Finally, enable interrupts. Note: Modem status interrupts
  327. * are set via set_termios(), which will be occurring imminently
  328. * anyway, so we don't enable them here.
  329. */
  330. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  331. serial_out(up, UART_IER, up->ier);
  332. /*
  333. * And clear the interrupt registers again for luck.
  334. */
  335. (void) serial_in(up, UART_LSR);
  336. (void) serial_in(up, UART_RX);
  337. (void) serial_in(up, UART_IIR);
  338. (void) serial_in(up, UART_MSR);
  339. return 0;
  340. }
  341. static void serial_pxa_shutdown(struct uart_port *port)
  342. {
  343. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  344. unsigned long flags;
  345. free_irq(up->port.irq, up);
  346. /*
  347. * Disable interrupts from this port
  348. */
  349. up->ier = 0;
  350. serial_out(up, UART_IER, 0);
  351. spin_lock_irqsave(&up->port.lock, flags);
  352. up->port.mctrl &= ~TIOCM_OUT2;
  353. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  354. spin_unlock_irqrestore(&up->port.lock, flags);
  355. /*
  356. * Disable break condition and FIFOs
  357. */
  358. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  359. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  360. UART_FCR_CLEAR_RCVR |
  361. UART_FCR_CLEAR_XMIT);
  362. serial_out(up, UART_FCR, 0);
  363. }
  364. static void
  365. serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
  366. struct ktermios *old)
  367. {
  368. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  369. unsigned char cval, fcr = 0;
  370. unsigned long flags;
  371. unsigned int baud, quot;
  372. unsigned int dll;
  373. switch (termios->c_cflag & CSIZE) {
  374. case CS5:
  375. cval = UART_LCR_WLEN5;
  376. break;
  377. case CS6:
  378. cval = UART_LCR_WLEN6;
  379. break;
  380. case CS7:
  381. cval = UART_LCR_WLEN7;
  382. break;
  383. default:
  384. case CS8:
  385. cval = UART_LCR_WLEN8;
  386. break;
  387. }
  388. if (termios->c_cflag & CSTOPB)
  389. cval |= UART_LCR_STOP;
  390. if (termios->c_cflag & PARENB)
  391. cval |= UART_LCR_PARITY;
  392. if (!(termios->c_cflag & PARODD))
  393. cval |= UART_LCR_EPAR;
  394. /*
  395. * Ask the core to calculate the divisor for us.
  396. */
  397. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  398. quot = uart_get_divisor(port, baud);
  399. if ((up->port.uartclk / quot) < (2400 * 16))
  400. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  401. else if ((up->port.uartclk / quot) < (230400 * 16))
  402. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  403. else
  404. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
  405. /*
  406. * Ok, we're now changing the port state. Do it with
  407. * interrupts disabled.
  408. */
  409. spin_lock_irqsave(&up->port.lock, flags);
  410. /*
  411. * Ensure the port will be enabled.
  412. * This is required especially for serial console.
  413. */
  414. up->ier |= UART_IER_UUE;
  415. /*
  416. * Update the per-port timeout.
  417. */
  418. uart_update_timeout(port, termios->c_cflag, baud);
  419. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  420. if (termios->c_iflag & INPCK)
  421. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  422. if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
  423. up->port.read_status_mask |= UART_LSR_BI;
  424. /*
  425. * Characters to ignore
  426. */
  427. up->port.ignore_status_mask = 0;
  428. if (termios->c_iflag & IGNPAR)
  429. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  430. if (termios->c_iflag & IGNBRK) {
  431. up->port.ignore_status_mask |= UART_LSR_BI;
  432. /*
  433. * If we're ignoring parity and break indicators,
  434. * ignore overruns too (for real raw support).
  435. */
  436. if (termios->c_iflag & IGNPAR)
  437. up->port.ignore_status_mask |= UART_LSR_OE;
  438. }
  439. /*
  440. * ignore all characters if CREAD is not set
  441. */
  442. if ((termios->c_cflag & CREAD) == 0)
  443. up->port.ignore_status_mask |= UART_LSR_DR;
  444. /*
  445. * CTS flow control flag and modem status interrupts
  446. */
  447. up->ier &= ~UART_IER_MSI;
  448. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  449. up->ier |= UART_IER_MSI;
  450. serial_out(up, UART_IER, up->ier);
  451. if (termios->c_cflag & CRTSCTS)
  452. up->mcr |= UART_MCR_AFE;
  453. else
  454. up->mcr &= ~UART_MCR_AFE;
  455. serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
  456. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  457. /*
  458. * work around Errata #75 according to Intel(R) PXA27x Processor Family
  459. * Specification Update (Nov 2005)
  460. */
  461. dll = serial_in(up, UART_DLL);
  462. WARN_ON(dll != (quot & 0xff));
  463. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  464. serial_out(up, UART_LCR, cval); /* reset DLAB */
  465. up->lcr = cval; /* Save LCR */
  466. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  467. serial_out(up, UART_FCR, fcr);
  468. spin_unlock_irqrestore(&up->port.lock, flags);
  469. }
  470. static void
  471. serial_pxa_pm(struct uart_port *port, unsigned int state,
  472. unsigned int oldstate)
  473. {
  474. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  475. if (!state)
  476. clk_prepare_enable(up->clk);
  477. else
  478. clk_disable_unprepare(up->clk);
  479. }
  480. static void serial_pxa_release_port(struct uart_port *port)
  481. {
  482. }
  483. static int serial_pxa_request_port(struct uart_port *port)
  484. {
  485. return 0;
  486. }
  487. static void serial_pxa_config_port(struct uart_port *port, int flags)
  488. {
  489. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  490. up->port.type = PORT_PXA;
  491. }
  492. static int
  493. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  494. {
  495. /* we don't want the core code to modify any port params */
  496. return -EINVAL;
  497. }
  498. static const char *
  499. serial_pxa_type(struct uart_port *port)
  500. {
  501. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  502. return up->name;
  503. }
  504. static struct uart_pxa_port *serial_pxa_ports[4];
  505. static struct uart_driver serial_pxa_reg;
  506. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  507. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  508. /*
  509. * Wait for transmitter & holding register to empty
  510. */
  511. static void wait_for_xmitr(struct uart_pxa_port *up)
  512. {
  513. unsigned int status, tmout = 10000;
  514. /* Wait up to 10ms for the character(s) to be sent. */
  515. do {
  516. status = serial_in(up, UART_LSR);
  517. if (status & UART_LSR_BI)
  518. up->lsr_break_flag = UART_LSR_BI;
  519. if (--tmout == 0)
  520. break;
  521. udelay(1);
  522. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  523. /* Wait up to 1s for flow control if necessary */
  524. if (up->port.flags & UPF_CONS_FLOW) {
  525. tmout = 1000000;
  526. while (--tmout &&
  527. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  528. udelay(1);
  529. }
  530. }
  531. static void serial_pxa_console_putchar(struct uart_port *port, int ch)
  532. {
  533. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  534. wait_for_xmitr(up);
  535. serial_out(up, UART_TX, ch);
  536. }
  537. /*
  538. * Print a string to the serial port trying not to disturb
  539. * any possible real use of the port...
  540. *
  541. * The console_lock must be held when we get here.
  542. */
  543. static void
  544. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  545. {
  546. struct uart_pxa_port *up = serial_pxa_ports[co->index];
  547. unsigned int ier;
  548. unsigned long flags;
  549. int locked = 1;
  550. clk_enable(up->clk);
  551. local_irq_save(flags);
  552. if (up->port.sysrq)
  553. locked = 0;
  554. else if (oops_in_progress)
  555. locked = spin_trylock(&up->port.lock);
  556. else
  557. spin_lock(&up->port.lock);
  558. /*
  559. * First save the IER then disable the interrupts
  560. */
  561. ier = serial_in(up, UART_IER);
  562. serial_out(up, UART_IER, UART_IER_UUE);
  563. uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
  564. /*
  565. * Finally, wait for transmitter to become empty
  566. * and restore the IER
  567. */
  568. wait_for_xmitr(up);
  569. serial_out(up, UART_IER, ier);
  570. if (locked)
  571. spin_unlock(&up->port.lock);
  572. local_irq_restore(flags);
  573. clk_disable(up->clk);
  574. }
  575. #ifdef CONFIG_CONSOLE_POLL
  576. /*
  577. * Console polling routines for writing and reading from the uart while
  578. * in an interrupt or debug context.
  579. */
  580. static int serial_pxa_get_poll_char(struct uart_port *port)
  581. {
  582. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  583. unsigned char lsr = serial_in(up, UART_LSR);
  584. while (!(lsr & UART_LSR_DR))
  585. lsr = serial_in(up, UART_LSR);
  586. return serial_in(up, UART_RX);
  587. }
  588. static void serial_pxa_put_poll_char(struct uart_port *port,
  589. unsigned char c)
  590. {
  591. unsigned int ier;
  592. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  593. /*
  594. * First save the IER then disable the interrupts
  595. */
  596. ier = serial_in(up, UART_IER);
  597. serial_out(up, UART_IER, UART_IER_UUE);
  598. wait_for_xmitr(up);
  599. /*
  600. * Send the character out.
  601. */
  602. serial_out(up, UART_TX, c);
  603. /*
  604. * Finally, wait for transmitter to become empty
  605. * and restore the IER
  606. */
  607. wait_for_xmitr(up);
  608. serial_out(up, UART_IER, ier);
  609. }
  610. #endif /* CONFIG_CONSOLE_POLL */
  611. static int __init
  612. serial_pxa_console_setup(struct console *co, char *options)
  613. {
  614. struct uart_pxa_port *up;
  615. int baud = 9600;
  616. int bits = 8;
  617. int parity = 'n';
  618. int flow = 'n';
  619. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  620. co->index = 0;
  621. up = serial_pxa_ports[co->index];
  622. if (!up)
  623. return -ENODEV;
  624. if (options)
  625. uart_parse_options(options, &baud, &parity, &bits, &flow);
  626. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  627. }
  628. static struct console serial_pxa_console = {
  629. .name = "ttyS",
  630. .write = serial_pxa_console_write,
  631. .device = uart_console_device,
  632. .setup = serial_pxa_console_setup,
  633. .flags = CON_PRINTBUFFER,
  634. .index = -1,
  635. .data = &serial_pxa_reg,
  636. };
  637. #define PXA_CONSOLE &serial_pxa_console
  638. #else
  639. #define PXA_CONSOLE NULL
  640. #endif
  641. static struct uart_ops serial_pxa_pops = {
  642. .tx_empty = serial_pxa_tx_empty,
  643. .set_mctrl = serial_pxa_set_mctrl,
  644. .get_mctrl = serial_pxa_get_mctrl,
  645. .stop_tx = serial_pxa_stop_tx,
  646. .start_tx = serial_pxa_start_tx,
  647. .stop_rx = serial_pxa_stop_rx,
  648. .enable_ms = serial_pxa_enable_ms,
  649. .break_ctl = serial_pxa_break_ctl,
  650. .startup = serial_pxa_startup,
  651. .shutdown = serial_pxa_shutdown,
  652. .set_termios = serial_pxa_set_termios,
  653. .pm = serial_pxa_pm,
  654. .type = serial_pxa_type,
  655. .release_port = serial_pxa_release_port,
  656. .request_port = serial_pxa_request_port,
  657. .config_port = serial_pxa_config_port,
  658. .verify_port = serial_pxa_verify_port,
  659. #if defined(CONFIG_CONSOLE_POLL) && defined(CONFIG_SERIAL_PXA_CONSOLE)
  660. .poll_get_char = serial_pxa_get_poll_char,
  661. .poll_put_char = serial_pxa_put_poll_char,
  662. #endif
  663. };
  664. static struct uart_driver serial_pxa_reg = {
  665. .owner = THIS_MODULE,
  666. .driver_name = "PXA serial",
  667. .dev_name = "ttyS",
  668. .major = TTY_MAJOR,
  669. .minor = 64,
  670. .nr = 4,
  671. .cons = PXA_CONSOLE,
  672. };
  673. #ifdef CONFIG_PM
  674. static int serial_pxa_suspend(struct device *dev)
  675. {
  676. struct uart_pxa_port *sport = dev_get_drvdata(dev);
  677. if (sport)
  678. uart_suspend_port(&serial_pxa_reg, &sport->port);
  679. return 0;
  680. }
  681. static int serial_pxa_resume(struct device *dev)
  682. {
  683. struct uart_pxa_port *sport = dev_get_drvdata(dev);
  684. if (sport)
  685. uart_resume_port(&serial_pxa_reg, &sport->port);
  686. return 0;
  687. }
  688. static const struct dev_pm_ops serial_pxa_pm_ops = {
  689. .suspend = serial_pxa_suspend,
  690. .resume = serial_pxa_resume,
  691. };
  692. #endif
  693. static const struct of_device_id serial_pxa_dt_ids[] = {
  694. { .compatible = "mrvl,pxa-uart", },
  695. { .compatible = "mrvl,mmp-uart", },
  696. {}
  697. };
  698. static int serial_pxa_probe_dt(struct platform_device *pdev,
  699. struct uart_pxa_port *sport)
  700. {
  701. struct device_node *np = pdev->dev.of_node;
  702. int ret;
  703. if (!np)
  704. return 1;
  705. ret = of_alias_get_id(np, "serial");
  706. if (ret < 0) {
  707. dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
  708. return ret;
  709. }
  710. sport->port.line = ret;
  711. return 0;
  712. }
  713. static int serial_pxa_probe(struct platform_device *dev)
  714. {
  715. struct uart_pxa_port *sport;
  716. struct resource *mmres, *irqres;
  717. int ret;
  718. mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
  719. irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
  720. if (!mmres || !irqres)
  721. return -ENODEV;
  722. sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
  723. if (!sport)
  724. return -ENOMEM;
  725. sport->clk = clk_get(&dev->dev, NULL);
  726. if (IS_ERR(sport->clk)) {
  727. ret = PTR_ERR(sport->clk);
  728. goto err_free;
  729. }
  730. ret = clk_prepare(sport->clk);
  731. if (ret) {
  732. clk_put(sport->clk);
  733. goto err_free;
  734. }
  735. sport->port.type = PORT_PXA;
  736. sport->port.iotype = UPIO_MEM;
  737. sport->port.mapbase = mmres->start;
  738. sport->port.irq = irqres->start;
  739. sport->port.fifosize = 64;
  740. sport->port.ops = &serial_pxa_pops;
  741. sport->port.dev = &dev->dev;
  742. sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
  743. sport->port.uartclk = clk_get_rate(sport->clk);
  744. ret = serial_pxa_probe_dt(dev, sport);
  745. if (ret > 0)
  746. sport->port.line = dev->id;
  747. else if (ret < 0)
  748. goto err_clk;
  749. snprintf(sport->name, PXA_NAME_LEN - 1, "UART%d", sport->port.line + 1);
  750. sport->port.membase = ioremap(mmres->start, resource_size(mmres));
  751. if (!sport->port.membase) {
  752. ret = -ENOMEM;
  753. goto err_clk;
  754. }
  755. serial_pxa_ports[sport->port.line] = sport;
  756. uart_add_one_port(&serial_pxa_reg, &sport->port);
  757. platform_set_drvdata(dev, sport);
  758. return 0;
  759. err_clk:
  760. clk_unprepare(sport->clk);
  761. clk_put(sport->clk);
  762. err_free:
  763. kfree(sport);
  764. return ret;
  765. }
  766. static struct platform_driver serial_pxa_driver = {
  767. .probe = serial_pxa_probe,
  768. .driver = {
  769. .name = "pxa2xx-uart",
  770. #ifdef CONFIG_PM
  771. .pm = &serial_pxa_pm_ops,
  772. #endif
  773. .suppress_bind_attrs = true,
  774. .of_match_table = serial_pxa_dt_ids,
  775. },
  776. };
  777. static int __init serial_pxa_init(void)
  778. {
  779. int ret;
  780. ret = uart_register_driver(&serial_pxa_reg);
  781. if (ret != 0)
  782. return ret;
  783. ret = platform_driver_register(&serial_pxa_driver);
  784. if (ret != 0)
  785. uart_unregister_driver(&serial_pxa_reg);
  786. return ret;
  787. }
  788. device_initcall(serial_pxa_init);