mdm-clocks-9607.h 6.6 KB

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  1. /*
  2. * Copyright (c) 2015, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #ifndef __MDM_CLOCKS_9607_H
  14. #define __MDM_CLOCKS_9607_H
  15. /*PLL Sources */
  16. #define clk_gpll0_clk_src 0x5933b69f
  17. #define clk_gpll0_ao_clk_src 0x6b2fb034
  18. #define clk_gpll2_clk_src 0x7c34503b
  19. #define clk_gpll1_clk_src 0x916f8847
  20. #define clk_a7sspll 0x0b2e5cbd
  21. /*RPM and Voter clocks */
  22. #define clk_pcnoc_clk 0xc1296d0f
  23. #define clk_pcnoc_a_clk 0x9bcffee4
  24. #define clk_pcnoc_msmbus_clk 0x2b53b688
  25. #define clk_pcnoc_msmbus_a_clk 0x9753a54f
  26. #define clk_pcnoc_keepalive_a_clk 0x9464f720
  27. #define clk_pcnoc_usb_clk 0x57adc448
  28. #define clk_pcnoc_usb_a_clk 0x11d6a74e
  29. #define clk_bimc_clk 0x4b80bf00
  30. #define clk_bimc_a_clk 0x4b25668a
  31. #define clk_bimc_msmbus_clk 0xd212feea
  32. #define clk_bimc_msmbus_a_clk 0x71d1a499
  33. #define clk_bimc_usb_clk 0x9bd2b2bf
  34. #define clk_bimc_usb_a_clk 0xea410834
  35. #define clk_qdss_clk 0x1492202a
  36. #define clk_qdss_a_clk 0xdd121669
  37. #define clk_qpic_clk 0x3ce6f7bb
  38. #define clk_qpic_a_clk 0xd70ccb7c
  39. #define clk_xo_clk_src 0x23f5649f
  40. #define clk_xo_a_clk_src 0x2fdd2c7c
  41. #define clk_xo_otg_clk 0x79bca5cc
  42. #define clk_xo_lpm_clk 0x2be48257
  43. #define clk_xo_pil_mss_clk 0xe97a8354
  44. #define clk_bb_clk1 0xf5304268
  45. #define clk_bb_clk1_pin 0x6dd0a779
  46. /* SRCs */
  47. #define clk_apss_ahb_clk_src 0x36f8495f
  48. #define clk_emac_0_125m_clk_src 0x955db353
  49. #define clk_blsp1_qup1_i2c_apps_clk_src 0x17f78f5e
  50. #define clk_blsp1_qup1_spi_apps_clk_src 0xf534c4fa
  51. #define clk_blsp1_qup2_i2c_apps_clk_src 0x8de71c79
  52. #define clk_blsp1_qup2_spi_apps_clk_src 0x33cf809a
  53. #define clk_blsp1_qup3_i2c_apps_clk_src 0xf161b902
  54. #define clk_blsp1_qup3_spi_apps_clk_src 0x5e95683f
  55. #define clk_blsp1_qup4_i2c_apps_clk_src 0xb2ecce68
  56. #define clk_blsp1_qup4_spi_apps_clk_src 0xddb5bbdb
  57. #define clk_blsp1_qup5_i2c_apps_clk_src 0x71ea7804
  58. #define clk_blsp1_qup5_spi_apps_clk_src 0x9752f35f
  59. #define clk_blsp1_qup6_i2c_apps_clk_src 0x28806803
  60. #define clk_blsp1_qup6_spi_apps_clk_src 0x44a1edc4
  61. #define clk_blsp1_uart1_apps_clk_src 0xf8146114
  62. #define clk_blsp1_uart2_apps_clk_src 0xfc9c2f73
  63. #define clk_blsp1_uart3_apps_clk_src 0x600497f2
  64. #define clk_blsp1_uart4_apps_clk_src 0x56bff15c
  65. #define clk_blsp1_uart5_apps_clk_src 0x218ef697
  66. #define clk_blsp1_uart6_apps_clk_src 0x8fbdbe4c
  67. #define clk_crypto_clk_src 0x37a21414
  68. #define clk_gp1_clk_src 0xad85b97a
  69. #define clk_gp2_clk_src 0xfb1f0065
  70. #define clk_gp3_clk_src 0x63b693d6
  71. #define clk_pdm2_clk_src 0x31e494fd
  72. #define clk_sdcc1_apps_clk_src 0xd4975db2
  73. #define clk_sdcc2_apps_clk_src 0xfc46c821
  74. #define clk_emac_0_sys_25m_clk_src 0x92fe3614
  75. #define clk_emac_0_tx_clk_src 0x0487ec76
  76. #define clk_usb_hs_system_clk_src 0x28385546
  77. #define clk_usb_hsic_clk_src 0x141b01df
  78. #define clk_usb_hsic_io_cal_clk_src 0xc83584bd
  79. #define clk_usb_hsic_system_clk_src 0x52ef7224
  80. /*Branch*/
  81. #define clk_gcc_apss_ahb_clk 0x2b0d39ff
  82. #define clk_gcc_apss_axi_clk 0x1d47f4ff
  83. #define clk_gcc_prng_ahb_clk 0x397e7eaa
  84. #define clk_gcc_qdss_dap_clk 0x7fa9aa73
  85. #define clk_gcc_apss_tcu_clk 0xaf56a329
  86. #define clk_gcc_blsp1_ahb_clk 0x8caa5b4f
  87. #define clk_gcc_blsp1_qup1_i2c_apps_clk 0xc303fae9
  88. #define clk_gcc_blsp1_qup1_spi_apps_clk 0x759a76b0
  89. #define clk_gcc_blsp1_qup2_i2c_apps_clk 0x1076f220
  90. #define clk_gcc_blsp1_qup2_spi_apps_clk 0x3e77d48f
  91. #define clk_gcc_blsp1_qup3_i2c_apps_clk 0x9e25ac82
  92. #define clk_gcc_blsp1_qup3_spi_apps_clk 0xfb978880
  93. #define clk_gcc_blsp1_qup4_i2c_apps_clk 0xd7f40f6f
  94. #define clk_gcc_blsp1_qup4_spi_apps_clk 0x80f8722f
  95. #define clk_gcc_blsp1_qup5_i2c_apps_clk 0xacae5604
  96. #define clk_gcc_blsp1_qup5_spi_apps_clk 0xbf3e15d7
  97. #define clk_gcc_blsp1_qup6_i2c_apps_clk 0x5c6ad820
  98. #define clk_gcc_blsp1_qup6_spi_apps_clk 0x780d9f85
  99. #define clk_gcc_blsp1_uart1_apps_clk 0xc7c62f90
  100. #define clk_gcc_blsp1_uart2_apps_clk 0xf8a61c96
  101. #define clk_gcc_blsp1_uart3_apps_clk 0xc3298bd7
  102. #define clk_gcc_blsp1_uart4_apps_clk 0x26be16c0
  103. #define clk_gcc_blsp1_uart5_apps_clk 0x28a6bc74
  104. #define clk_gcc_blsp1_uart6_apps_clk 0x28fd3466
  105. #define clk_gcc_boot_rom_ahb_clk 0xde2adeb1
  106. #define clk_gcc_crypto_ahb_clk 0x94de4919
  107. #define clk_gcc_crypto_axi_clk 0xd4415c9b
  108. #define clk_gcc_crypto_clk 0x00d390d2
  109. #define clk_gcc_gp1_clk 0x057f7b69
  110. #define clk_gcc_gp2_clk 0x9bf83ffd
  111. #define clk_gcc_gp3_clk 0xec6539ee
  112. #define clk_gcc_mss_cfg_ahb_clk 0x111cde81
  113. #define clk_gcc_mss_q6_bimc_axi_clk 0x67544d62
  114. #define clk_gcc_pdm2_clk 0x99d55711
  115. #define clk_gcc_pdm_ahb_clk 0x365664f6
  116. #define clk_gcc_sdcc1_ahb_clk 0x691e0caa
  117. #define clk_gcc_sdcc1_apps_clk 0x9ad6fb96
  118. #define clk_gcc_sdcc2_ahb_clk 0x23d5727f
  119. #define clk_gcc_sdcc2_apps_clk 0x861b20ac
  120. #define clk_gcc_emac_0_125m_clk 0xe556de53
  121. #define clk_gcc_emac_0_ahb_clk 0x6a741d38
  122. #define clk_gcc_emac_0_axi_clk 0xf2b04fb4
  123. #define clk_gcc_emac_0_rx_clk 0x869a4e5c
  124. #define clk_gcc_emac_0_sys_25m_clk 0x5812832b
  125. #define clk_gcc_emac_0_sys_clk 0x34fb62b0
  126. #define clk_gcc_emac_0_tx_clk 0x331d3573
  127. #define clk_gcc_smmu_cfg_clk 0x75eaefa5
  128. #define clk_gcc_usb2a_phy_sleep_clk 0x6caa736f
  129. #define clk_gcc_usb_hs_phy_cfg_ahb_clk 0xe13808fd
  130. #define clk_gcc_usb_hs_ahb_clk 0x72ce8032
  131. #define clk_gcc_usb_hs_system_clk 0xa11972e5
  132. #define clk_gcc_usb_hsic_ahb_clk 0x3ec2631a
  133. #define clk_gcc_usb_hsic_clk 0x8de18b0e
  134. #define clk_gcc_usb_hsic_io_cal_clk 0xbc21f776
  135. #define clk_gcc_usb_hsic_io_cal_sleep_clk 0x20e09a22
  136. #define clk_gcc_usb_hsic_system_clk 0x145e9366
  137. #define clk_gcc_usb2_hs_phy_only_clk 0x0047179d
  138. #define clk_gcc_qusb2_phy_clk 0x996884d5
  139. /* DEBUG */
  140. #define clk_gcc_debug_mux 0x8121ac15
  141. #define clk_apss_debug_pri_mux 0xc691ff55
  142. #define clk_apc0_m_clk 0xce1e9473
  143. #define clk_apc1_m_clk 0x990fbaf7
  144. #define clk_apc2_m_clk 0x252cd4ae
  145. #define clk_apc3_m_clk 0x78c64486
  146. #define clk_l2_m_clk 0x4bedf4d0
  147. #define clk_wcnss_m_clk 0x709f430b
  148. #endif