uniphier-clock.txt 3.0 KB

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  1. UniPhier clock controller
  2. System clock
  3. ------------
  4. Required properties:
  5. - compatible: should be one of the following:
  6. "socionext,uniphier-sld3-clock" - for sLD3 SoC.
  7. "socionext,uniphier-ld4-clock" - for LD4 SoC.
  8. "socionext,uniphier-pro4-clock" - for Pro4 SoC.
  9. "socionext,uniphier-sld8-clock" - for sLD8 SoC.
  10. "socionext,uniphier-pro5-clock" - for Pro5 SoC.
  11. "socionext,uniphier-pxs2-clock" - for PXs2/LD6b SoC.
  12. "socionext,uniphier-ld11-clock" - for LD11 SoC.
  13. "socionext,uniphier-ld20-clock" - for LD20 SoC.
  14. - #clock-cells: should be 1.
  15. Example:
  16. sysctrl@61840000 {
  17. compatible = "socionext,uniphier-sysctrl",
  18. "simple-mfd", "syscon";
  19. reg = <0x61840000 0x4000>;
  20. clock {
  21. compatible = "socionext,uniphier-ld11-clock";
  22. #clock-cells = <1>;
  23. };
  24. other nodes ...
  25. };
  26. Provided clocks:
  27. 8: ST DMAC
  28. 12: GIO (Giga bit stream I/O)
  29. 14: USB3 ch0 host
  30. 15: USB3 ch1 host
  31. 16: USB3 ch0 PHY0
  32. 17: USB3 ch0 PHY1
  33. 20: USB3 ch1 PHY0
  34. 21: USB3 ch1 PHY1
  35. Media I/O (MIO) clock, SD clock
  36. -------------------------------
  37. Required properties:
  38. - compatible: should be one of the following:
  39. "socionext,uniphier-sld3-mio-clock" - for sLD3 SoC.
  40. "socionext,uniphier-ld4-mio-clock" - for LD4 SoC.
  41. "socionext,uniphier-pro4-mio-clock" - for Pro4 SoC.
  42. "socionext,uniphier-sld8-mio-clock" - for sLD8 SoC.
  43. "socionext,uniphier-pro5-sd-clock" - for Pro5 SoC.
  44. "socionext,uniphier-pxs2-sd-clock" - for PXs2/LD6b SoC.
  45. "socionext,uniphier-ld11-mio-clock" - for LD11 SoC.
  46. "socionext,uniphier-ld20-sd-clock" - for LD20 SoC.
  47. - #clock-cells: should be 1.
  48. Example:
  49. mioctrl@59810000 {
  50. compatible = "socionext,uniphier-mioctrl",
  51. "simple-mfd", "syscon";
  52. reg = <0x59810000 0x800>;
  53. clock {
  54. compatible = "socionext,uniphier-ld11-mio-clock";
  55. #clock-cells = <1>;
  56. };
  57. other nodes ...
  58. };
  59. Provided clocks:
  60. 0: SD ch0 host
  61. 1: eMMC host
  62. 2: SD ch1 host
  63. 7: MIO DMAC
  64. 8: USB2 ch0 host
  65. 9: USB2 ch1 host
  66. 10: USB2 ch2 host
  67. 11: USB2 ch3 host
  68. 12: USB2 ch0 PHY
  69. 13: USB2 ch1 PHY
  70. 14: USB2 ch2 PHY
  71. 15: USB2 ch3 PHY
  72. Peripheral clock
  73. ----------------
  74. Required properties:
  75. - compatible: should be one of the following:
  76. "socionext,uniphier-sld3-peri-clock" - for sLD3 SoC.
  77. "socionext,uniphier-ld4-peri-clock" - for LD4 SoC.
  78. "socionext,uniphier-pro4-peri-clock" - for Pro4 SoC.
  79. "socionext,uniphier-sld8-peri-clock" - for sLD8 SoC.
  80. "socionext,uniphier-pro5-peri-clock" - for Pro5 SoC.
  81. "socionext,uniphier-pxs2-peri-clock" - for PXs2/LD6b SoC.
  82. "socionext,uniphier-ld11-peri-clock" - for LD11 SoC.
  83. "socionext,uniphier-ld20-peri-clock" - for LD20 SoC.
  84. - #clock-cells: should be 1.
  85. Example:
  86. perictrl@59820000 {
  87. compatible = "socionext,uniphier-perictrl",
  88. "simple-mfd", "syscon";
  89. reg = <0x59820000 0x200>;
  90. clock {
  91. compatible = "socionext,uniphier-ld11-peri-clock";
  92. #clock-cells = <1>;
  93. };
  94. other nodes ...
  95. };
  96. Provided clocks:
  97. 0: UART ch0
  98. 1: UART ch1
  99. 2: UART ch2
  100. 3: UART ch3
  101. 4: I2C ch0
  102. 5: I2C ch1
  103. 6: I2C ch2
  104. 7: I2C ch3
  105. 8: I2C ch4
  106. 9: I2C ch5
  107. 10: I2C ch6