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- UniPhier clock controller
- System clock
- ------------
- Required properties:
- - compatible: should be one of the following:
- "socionext,uniphier-sld3-clock" - for sLD3 SoC.
- "socionext,uniphier-ld4-clock" - for LD4 SoC.
- "socionext,uniphier-pro4-clock" - for Pro4 SoC.
- "socionext,uniphier-sld8-clock" - for sLD8 SoC.
- "socionext,uniphier-pro5-clock" - for Pro5 SoC.
- "socionext,uniphier-pxs2-clock" - for PXs2/LD6b SoC.
- "socionext,uniphier-ld11-clock" - for LD11 SoC.
- "socionext,uniphier-ld20-clock" - for LD20 SoC.
- - #clock-cells: should be 1.
- Example:
- sysctrl@61840000 {
- compatible = "socionext,uniphier-sysctrl",
- "simple-mfd", "syscon";
- reg = <0x61840000 0x4000>;
- clock {
- compatible = "socionext,uniphier-ld11-clock";
- #clock-cells = <1>;
- };
- other nodes ...
- };
- Provided clocks:
- 8: ST DMAC
- 12: GIO (Giga bit stream I/O)
- 14: USB3 ch0 host
- 15: USB3 ch1 host
- 16: USB3 ch0 PHY0
- 17: USB3 ch0 PHY1
- 20: USB3 ch1 PHY0
- 21: USB3 ch1 PHY1
- Media I/O (MIO) clock, SD clock
- -------------------------------
- Required properties:
- - compatible: should be one of the following:
- "socionext,uniphier-sld3-mio-clock" - for sLD3 SoC.
- "socionext,uniphier-ld4-mio-clock" - for LD4 SoC.
- "socionext,uniphier-pro4-mio-clock" - for Pro4 SoC.
- "socionext,uniphier-sld8-mio-clock" - for sLD8 SoC.
- "socionext,uniphier-pro5-sd-clock" - for Pro5 SoC.
- "socionext,uniphier-pxs2-sd-clock" - for PXs2/LD6b SoC.
- "socionext,uniphier-ld11-mio-clock" - for LD11 SoC.
- "socionext,uniphier-ld20-sd-clock" - for LD20 SoC.
- - #clock-cells: should be 1.
- Example:
- mioctrl@59810000 {
- compatible = "socionext,uniphier-mioctrl",
- "simple-mfd", "syscon";
- reg = <0x59810000 0x800>;
- clock {
- compatible = "socionext,uniphier-ld11-mio-clock";
- #clock-cells = <1>;
- };
- other nodes ...
- };
- Provided clocks:
- 0: SD ch0 host
- 1: eMMC host
- 2: SD ch1 host
- 7: MIO DMAC
- 8: USB2 ch0 host
- 9: USB2 ch1 host
- 10: USB2 ch2 host
- 11: USB2 ch3 host
- 12: USB2 ch0 PHY
- 13: USB2 ch1 PHY
- 14: USB2 ch2 PHY
- 15: USB2 ch3 PHY
- Peripheral clock
- ----------------
- Required properties:
- - compatible: should be one of the following:
- "socionext,uniphier-sld3-peri-clock" - for sLD3 SoC.
- "socionext,uniphier-ld4-peri-clock" - for LD4 SoC.
- "socionext,uniphier-pro4-peri-clock" - for Pro4 SoC.
- "socionext,uniphier-sld8-peri-clock" - for sLD8 SoC.
- "socionext,uniphier-pro5-peri-clock" - for Pro5 SoC.
- "socionext,uniphier-pxs2-peri-clock" - for PXs2/LD6b SoC.
- "socionext,uniphier-ld11-peri-clock" - for LD11 SoC.
- "socionext,uniphier-ld20-peri-clock" - for LD20 SoC.
- - #clock-cells: should be 1.
- Example:
- perictrl@59820000 {
- compatible = "socionext,uniphier-perictrl",
- "simple-mfd", "syscon";
- reg = <0x59820000 0x200>;
- clock {
- compatible = "socionext,uniphier-ld11-peri-clock";
- #clock-cells = <1>;
- };
- other nodes ...
- };
- Provided clocks:
- 0: UART ch0
- 1: UART ch1
- 2: UART ch2
- 3: UART ch3
- 4: I2C ch0
- 5: I2C ch1
- 6: I2C ch2
- 7: I2C ch3
- 8: I2C ch4
- 9: I2C ch5
- 10: I2C ch6
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